Exploring the Exponential Integrators with Krylov Subspace Algorithms for Nonlinear Circuit Simulation

Transcription

1 Exploring te Exponential Integrators wit Krylov Subspace Algorits for Nonlinear Circuit Siulation Xinyuan Wang, Hao Zuang +, Cung-Kuan Ceng CSE and ECE Departents, UC San Diego, La Jolla, CA, USA + ANSYS, San Jose, CA, USA eail: xiw93@eng.ucsd.edu, ao.zuang@ansys.co, cceng@ucsd.edu Abstract We explore Krylov subspace algorits to calculate ϕ functions of exponential integrators for circuit siulation. Higa [] pointed out te potential nuerical stability ris of ϕ functions coputation. However, for te applications to circuit analysis, te coice of etods reains open. Tis wor inspects te accuracy of atrix exponential and vector product wit Krylov subspace etods, and identifies te proper approac to acieving nuerically stable solutions for nonlinear circuits. Epirial results verify te quality of te proposed etods using various orders of ϕ functions. Furterore, instead of Newton-Rapson (NR) iterations in conventional etods, an iterative residue correction algorit is devised for nonlinear syste analysis. Te stability and efficiency of our etods are illustrated wit experients. I. INTRODUCTION SPICE-lie circuit siulation [2], [3], [4] is critical during te cycle of integrated circuits (IC) designs. Given a circuit netlist and device odels, te circuit s beaviors can be forulated as differential algebraic equations (DAE). Te solution of DAE is coputed wit nuerical integration step by step until te end of wole siulation tie span. Terefore, te DAE integration process is one ey coponent in deciding te efficiency and accuracy in SPICE. Te progress of Krylov subspace etods [5], [6] for atrix exponential and related integration functions (so called ϕ functions) ave recently triggered researcers interests. Many wors are proposed to solve DAE using exponential integrators [7], [8], [9] due to its iproveents in iger order approxiation solution and stable explicit forulation over conventional linear ulti-step etods [2], [3], [4]. However, for te application of atrix exponential to circuit analysis tere exists potential nuerical issue wen evaluating ϕ functions appearing in exponential integrators []. Sidje proposed a direct coputation etod for ϕ functions wit an augented atrix [], providing an efficient way to evaluate te integrated solution. Newton-Rapson (NR) iterations are typically adopted to obtain solutions of te nonlinear function in conventional integration etods. In eac NR iteration, circuit siulator needs to linearize and solve te syste, wic fails to fully utilize te explicit nature of exponential integration etod [6]. In tis paper, we apply exponential integrators to circuit siulation wit a sift-and-invert Krylov subspace (rational) etod [], wic is preferred for faster convergence rate wen coputing atrix exponential and vector product (MEVP) copared to standard Krylov subspace and invert Krylov subspace [8], [2], [3]. Te solution expressed as atrix exponential is coputed wit ϕ function direct solver []. A residual ter is used in a copensation iteration for te solution convergence and error control during te tie arcing. Te contributions of tis paper are as follows. We adopt rational Krylov subspace etod for exponential integrators. Te rational Krylov subspace etod iproves te convergence rate. In te eantie, we sip te regularization process [8], [4]. We caracterize te nuerical beaviors using different orders of ϕ functions. Te solution errors are related to te order of ϕ functions, tie step sizes and diension of Krylov subspace. Te caracterization allows us to balance between coputation cost and accuracy. We sip Newton-Rapson iterations. Since te atrix exponential integration etod is explicit, we sip te Newton- Rapson iterations. Te fraewor wit rational Krylov subspace perfor atrix factorization only once at eac tie step. Te convergence of te solution is ceced by copensation iteration wit a correction ter evaluated by results fro Krylov subspace. Te rest of tis paper is organized as follows. Section II introduces te bacground of circuit tie-doain siulation and exponential integrators. Section III presents calculation utilizing ϕ functions for exponential integration, as well as a copensation iteration algorit for solution convergence. Section IV illustrates te MEVP coputation using rational Krylov subspace etod. Section V provides nuerical results to validate our etod. Section VI concludes tis paper. II. BACKGROUND Given a circuit netlist and device odels, a general forulation of circuit siulation is sown as follows, dq(x) + f(x) = Bu(t) () dt were vector x R n lists nodal voltages and branc currents. Vector q R n and function f R n denote te carge/flux and current/voltage ters, respectively. Vector u(t) represents all te external excitations at tie t; B is an incident atrix tat inserts te input signals to te syste; and n is te size of te syste. For a linear circuit, Eq. () could be reduced via odified nodal analysis (MNA) as Cẋ(t) + Gx(t) = Bu(t) (2) were C(x) R n n is a atrix of capacitance and inductance fro q, G(x) Rn n represents te conductance and te incidence x between voltages and currents. Suppose tat C is invertible, we can rewrite (2) as ẋ(t) = g(x, u, t) = Jx(t) + C Bu(t) (3) were J denotes te Jacobian atrix of g(x, u, t) J = C G Given an initial vector x at tie t and tie step, te analytical solution x + of Eq. (2) can be written in atrix exponential expression [2]. x + = e J x + e ( τ)j b(t + τ)dτ (4)

2 were b(t) = C Bu(t). For SPICE-lie siulation, we treat input u(t) as a vector of piece-wise-linear (PWL) functions. Te integral in Eq. (4) can be derived into atrix exponential operators as x + = x + (e J I)J g + (e J J I)J 2 b (5) were te second ter coputes te circuit response to te step input g = C Bu(t ), and te tird ter te rap input b = C B u(t +) u(t ). Equation (5) can be furter written in exponential Euler type [7] x + = x + ϕ (J )g + 2 ϕ 2(J)b (6) Te ϕ s functions are te convolution of te s t order ter in tie doain [7], [5], i.e. ϕ s(z) = (s )! We ave te recursion as e ( θ)z θ s dθ for s (7) ϕ (z) = e z zϕ s(z) = ϕ s (z) (s )! I (8) We adopt an effective etod [] to copute te MEV P in Eq. (6) wit an augented atrix Ã. Given atrix A Cn n, input vector c C n, and e i C p as an i-t unit vector, we define à = ( ) A ce C (n+p) (n+p), E = E e 2... e Cp p p Te atrix exponential of te augented atrix wit tie τ as te forat ( ) ϕ(τa) exp(τã) = F e τj (9) For any order of ϕ functions s p, F ( : n, s) = τ s ϕ s(τa)c () Te above derivation provides ultiple ways of evaluating te exponential ters in Eq. (6), wic can be written in different orders of ϕ functions. Te derivation will be discussed in Section III-A. III. INTEGRATION IN CIRCUIT SIMULATION For nonlinear syste Eq. () could be expressed at tie t wit forulation C(x)ẋ(t) + G(x)x(t) = F (x) + Bu(t) () were te eleents of atrixes C(x) and G(x) are functions of state x(t). Vector F (x) represents te offset of te nonlinear device odels. Starting fro x at tie t and given tie step, x + = x(t + ) can be solved explicitly wit Eq. (2) were C(x), G(x) and F (x) are linearized at x. C ẋ + + G x + = F (x ) + Bu(t + ) (2) A. Evaluation of Exponential Integrators We evaluate te ters in Eq. (6) wit different orders of ϕ functions. Basically, a ϕ s function can be derived fro te augented atrix etod directly. An alternative way is to use Eq. (8) to derive wit lower ordered ϕ functions. were te new vectors ϕ (J x)g = ϕ (J x) g g (3) 2 ϕ 2(J x)b = ϕ (J x) b b g = J b = J b = J = ϕ (J x) b b b (4) g = x G (F (x ) + Bu(t)) b = G u(t + ) u(t) B b = G C G u(t + ) u(t) B In circuit syste, te diension of atrix J can be above illions. Direct coputation of atrix exponential is infeasible. One efficient way is to approxiate te product of atrix function and vector troug Krylov subspace based algorits [5], [6]. Te standard Krylov subspace is constructed using J directly as K (J, v) := span{v, Jv,, J v} wit diension of. Te MEVP is calculated wit a Hessenberg atrix H obtained by Arnoldi process as e J v V e H e, were V is an n ortonoral basis and e is te first unit vector. Terefore, te coputing coplexity of atrix exponential will be reduced drastically, wile te accuracy is aintained via ig order polynoial approxiations [5]. Standard Krylov subspace ay not converge fast enoug for stiff circuit systes. Since H tends to approxiate large agnitude eigenvalues of J [], larger diension of subspace is needed to acieve accuracy. Te perforance of standard Krylov subspace as been described in [7] on power delivery networs. Besides, in te process of generating standard Krylov subspace we ave to copute inverse of C as part of atrix J. For singular C, extra regularization step will be required [8], [4]. Tus, we adopt te rational Krylov subspace as described in Sec. IV-A. We also notice tat inverse of C is incorporated in te vector g and b wic ay suffer te sae proble. Eq. (3) and (4) enable ultiple etods for calculating te exponential ters and C is canceled out in g, b and b. Matrix exponential integrators breas away fro conventional linear ulti-step integrators, wic is liited by te Dalquist barrier. Te adopted Krylov subspace etod is able to obtain ig order precision and tae longer step sizes [2], [4], [6], [9], [8]. B. Approxiation Teory and Copensation Iteration for Convergence Eq.() enforces KCL and KVL laws at tie t and t + wit solutions x and x + relatively. In order to evaluate te undersoot or oversoot, a ter x + is used to express te difference between solution x + fro Eq. (2) and real solution at t + wic satisfies C + (ẋ + + ẋ + ) + G + (x + + x + ) wic is equivalent to te following relation C + ẋ + + G + x + = = F (x + ) + Bu(t + ) (5) (C + ẋ + + G + x + ) + F (x + ) + Bu(t + ) (6) Terefore, x + could be approxiated siilarly to ow te differential equation is solved wit exponential integrators. Te rigt

3 and side of te above equation is defined as te negative residue r + of Eq.(2). r + = C + ẋ + + G + x + (F (x + ) + Bu(t + )) (7) Let us treat te difference as a rap input [9], i.e. u(t + ) r + (8) Ten, x + will be added to original solution as a copensation ter x + = x + + x + x ϕ 2(J)C u(t + ) (9) Te process will be repeated until te solution converges. All te paraeters wit subscript + in above derivation are evaluated by device odels according to te updated x +. Since x converges at t, te residue ter of Eq.(2) sould be alost zero. We can find tat r + updates te difference due to te nonlinearity of te syste r + C + ẋ + + G + x + F (x + ) (2) were C + = C + C, G + = G + G and F (x + ) = F (x + ) F (x ). Terefore, te copensation ter is te response to te cange of te syste paraeters fro state x to state x +. Sec. IV-C provides an iteration process sowing ow te correction ter wors to acieve convergence. IV. EXPONENTIAL INTEGRATORS WITH RATIONAL KRYLOV SUBSPACE In tis section, we adopt te rational Krylov subspace approac to calculate te atrix exponential. We ten copare te error using different orders of ϕ function. Finally, we use one order of calculation to describe te siulation algorit. A. Coputation of MEVP via Rational Krylov Subspace Metod To iprove te efficiency, a rational Krylov subspace basis is designed to confine te spectru of J. Instead of using J directly, (I J) is used to generate te Krylov subspace [] wic is ipleented as (G + C ) ( C ). K ((I J), v) := span{v, (I J) v,, (I J) ( ) v} (2) were is a predefined paraeter. Wit te sift-and-invert of J all its eigenvalues wit sall eigenvalues becoe te large ones and liited by one. Te rational Krylov subspace basis V is constructed wit Arnoldi process. Te corresponding H effectively approxiates sall agnitude eigenvalues of J, wic leads to a fast and accurate coputation of atrix exponential and vector product. Te relation between J and H is (I J) V = V H + +,v +e (22) were e is te -t unit vector. Te atrix exponential can be approxiated as e J v v V e I H e (23) More generally, te coputation of exponential integrators s ϕ s(j)v as discussed in Sec. III-A is troug [6] s ϕ s(j)v s v V I ϕ s( H )e (24) Algorit : Arnoldi process for rational Krylov subspace Input: C, G, v,, Output: H, V v = v v ; 2 for j = : do 3 Solve (G + C )w = C v j and obtain w; 4 for i = : j do 5 i,j = w v i ; 6 w = w i,j v i ; 7 end 8 j+,j = w ; 9 v j+ = w j+,j ; if r(ϕ s, ) < tol abs and r(ϕs,) s v < tol rel ten = j; 2 brea; 3 end 4 end Te evaluation of Eq. (24) can be directly derived wit augented atrix in Eq. (9). Terefore we can express te solution in Eq. (6) as x + = x + g V ϕ I ( H )e + 2 b V 2 ϕ I 2( H 2 )e (25) were and 2 represent diensions of Krylov subspace for eac exponential ter. Te residue of solution is derived wit Eq. (22) for atrix exponential to approxiate te truncated error of Krylov subspace. For a oogeneous syste Cẋ = Gx wit x() in Eq.(23), we ave te residue r = Cẋ + Gx = v (CV H + GV )e I H e = v +,(G + C )v+e H e I H e (26) Te derivation can be applied to Eq. (25), we ave residue for eac exponential ter as r(ϕ s, ) = s g +,(G + C )v+et H ϕ I s( H )e (27) B. Coparison aong Exponential Integrators Algorit sows te Arnoldi process of creating rational Krylov subspace for exponential integrators. According to [5], [8], te Krylov subspace etod wit diension approxiates te exponential integrators in Eq. (24) up to te ( ) t degree of te Taylor expansions. Wen te residue is below a given error tolerance, Arnoldi algorit terinates wit te diension as sown in line of Algorit. An RC es circuit [8] is used to cec te nuerical difference of evaluating te sae exponential integrator wit different ϕ functions. We set te initial state x() of circuit and input u() all zeros, u(t) is piece-wise linear input as P W L(s, A, T, I) were T is te wole tie span and I is pea current. Fro te derivation in previous sections, te solution wit step is x() = 2 ϕ 2(J)(C du dt )

4 pi pi pi2 2 3 x ext() x rat (,,ϕ s) x ext () Fig. : Relative error err(,, ϕ s, ) = vs. tie step and diension of rational Krylov subspace. x rat(,, ϕ s) is coputed wit ϕ (pi), ϕ (pi) ϕ 2(pi2) functions; is fixed; te reference solution is coputed by MATLAB exp function pi pi pi2 Fig. 2: Relative residue corresponding to error in Fig. as r(,,ϕ s) x ext vs. tie step and diension of rational Krylov () subspace. Figure sows te distribution of relative error err(,, ϕ s, ) versus tie step and diension of rational Krylov subspace ( = 5 3 ). Te relative error is defined as x ext() x rat (,,ϕ s) x ext were () te exact solution x ext() is coputed by MATLAB exp function. For large, te relative error reduces quicly wit all ϕ functions and can be furter suppressed by increasing te diension of rational Krylov subspace. Solution calculated wit ϕ function acieves te best accuracy. If sall tie step is required, ten ϕ 2 function wors ore precisely. Te corresponding residue of solution is coputed wit Eq.(27). Te distribution of r(,,ϕs) x ext is plotted in Fig. 2 () wic follows siilar relation as in Fig.. Wit solution evaluated by rational Krylov subspace, residue could be a good estiator for its accuracy and serves as criteria to deterine. Deonstrated in [2], rational Krylov subspace etod perfors best on convergent rate and te lengt of step-size copared to standard and invert Krylov subspace etod. Te Krylov subspace is built wit (G+ C ) wic avoids te factorization of C. According to [], transient siulation wit rational Krylov subspace is not very sensitive to once it is set to around te order near tie step. More coparisons aong standard, invert and rational Krylov subspace based atrix exponential and vector product (MEVP) can be found in [8]. 2 3 C. Integration Algorit for Circuit Siulation Te integration fraewor of transient siulation wit atrix exponential based integration etod is sown in Algorit 2. Te LU decoposition is perfored on (G + C ) for rational Krylov subspace. Eq.(25) is used to copute solution wit step and te exponential integrators are evaluated separately wit ϕ functions. Lines 5- sow te copensation iteration for circuit nonlinear eleents as discussed in Sec. III-B. Te residue ter r + is eleent-wisely copared to an error bound Err. Once te relation r + Err is not satisfied, copensation ter is coputed and added to x + until solution converges. Te fraewor also incorporates an adaptive step etod. If te solution cannot converge witin Iter ax iterations, tie step is srun and solution as to be recalculated. Once solution converges wit a sall nuber of iterations, step will be increased for next step x +2 to accelerate te siulation process. Algorit 2: Integration Kernel for rational Krylov subspace using Copensation Iteration Input: Circuit netlist, input sources, x at tie t and expected tie step Output: solution x + at t + Load te netlist and obtain C, G and F (x ) wit x ; 2 Perfor LU decopose of (G + C ) ; 3 Use Algorit to copute Eq. (3) and Eq. (4); 4 Set iteration nuber i = ; 5 wile r + > Err by Eq. (7) and i < Iters ax do 6 Copute copensation ter wit Algorit x + = 2 ϕ 2 (J)C r + ; 7 x + = x + + x + ; 8 Update r + at x + wit device odel; 9 Increase te iteration nuber i = i + ; end if r + > Err wen i = Iters ax ten 2 i = ; = µ; // Coputed solution x + is rejected. Srin by µ =.5. 3 end 4 else 5 x(t + ) = x + ; t + = t + ; = + ; 6 if i Iters in ten 7 = α; // i is sall, is increased by α > to accelerate te process. Here α =.2 8 end 9 end V. NUMERICAL RESULTS In tis section, te nuerical results are copared for rational Krylov subspace etod wic evaluates te exponential ters wit different ϕ functions. We define as alf of tie step and restrict axiu allowed step witin ns. Table I provides te specification of nonlinear test cases fro industry. In order to verify nuerical difference aong exponential integrators coputed wit ϕ functions, all test cases except for D8 are stiff designs wit non-singular C atrices. Extra regularization process is not required wen te inverse of C is incorporated wit vectors as in Eq. (3) and (6). Size of te test cases varies fro 43 to 4, represented by #Node. #Dev is te nuber of MOSFETs in eac circuit. Te next 2 coluns in Table I are nubers of non-zero eleents of C and G in siulation. We can find D4 - D6 as relatively denser atrices. T is te tie span of transient siulation.

5 TABLE I: Specification of Test Cases Index Design #Node #Dev nnz(c) nnz(g) T (s) D voter D2 counter D3 fadd D4 add D5 eplus D6 ra D7 Inv. cain D8 Power Grid Sae tolerance is set in Algorit for cecing te accuracy of MEVP coputed by rational Krylov subspace. Convergence of nonlinear syste is acieved using copensation iteration wit a correction ter derived fro residue in Eq. (7). Te exponential integrators are evaluated wit ϕ, ϕ and ϕ 2 functions separately in te forat fro Eq. (3) and (4). Coputation of ϕ functions is realized by augented atrix etod. Notice in Table II, ϕ 2 etod is only for Eq. (4) and Eq. (3) is coputed wit ϕ etod. Te siulation results are listed in Table II. DC represents te DC analysis tie of test case. Average diension of rational Krylov subspace in transient siulation is denoted as a wic includes coputation of solution and residue ter in copensation iteration. Total tie steps and runtie are displayed as well. Iter avg is te average iteration nuber for eac step wic reflects convergence rate of circuits. Designs wit ore coplex C and G atrices tend to ave larger Iter avg, lie D4 - D6. Relatively iger for Krylov subspace is observed for tose cases. For all te test cases, ϕ etod costs te least running tie and a.te results are consistent wit te error distribution of ϕ functions as sown in Fig.. To acieve sae accuracy, Krylov subspace wit ϕ requires saller. In Fig. 3, te wavefor of D4 is extracted to copare wit traditional Bacward Euler etod wit Newton-Rapson iteration (BENR). Saller tie step (.ps) is applied to BENR as a reference solution. Solution coputed wit our proposed algorit well fits te reference. We ipleent te algorits for circuit transient siulation in MATLAB 24a and use UMFPACK pacage for atrix factorization. Te experients are perfored on a Linux server wit Intel(R) Xeon(R) CPU E5-264 v3 2.6GHz and 25 GB eory. Device evaluation and atrix staping are done in C/C++ wit BSIM3 odel for MOSFET. Te interactions are troug MATLAB Executable (MEX) external interface wit GCC VI. CONCLUSION We propose an efficient algoritic fraewor for nonlinear circuit tie doain siulation using exponential integrators. Te MEVP is coputed by rational Krylov subspace. In order to reduce te nuber of LU decoposition operations, we reove Newton- Rapson iterations. A residue ter based copensation iteration algorit is devised to aintain te convergence. Te coputation of ϕ functions is realized wit rational Krylov subspace using te augented atrix. Relative error copared to exact solution is used to illustrate nuerical difference aong integrated solution wit ϕ functions. Results in Sec. V sow potential advantage wen coosing ϕ function for te coputation of exponential integrators in order to acieve low coputation cost wile ensuring accuracy. For exaple, wit relatively larger tie step ϕ etod is preferred for its draatic decrease in residue versus increasing. Wile for tiny, ϕ and ϕ 2 etods deonstrate Voltage (V) Rat ns BENR.ps tie (s) -7 Fig. 3: Accuracy coparison of transient siulation wit rational Krylov subspace and a reference by tranditional Bacward Euler wit Newton-Rapson etod; = /2; te reference solution use step size 3 s. potential for lower error. For te future wor, we will address te nuerical stability wen atrix C is singular. In addition, nonlinear integration etods will be explored to accelerate te convergence of te iterations. VII. ACKNOWLEDGMENTS We acnowledge te support fro NSF CCF We also tan te reviewers for teir suggestions. REFERENCES [] N. J. Higa, Accuracy and stability of nuerical algorits. SIAM, 22. [2] L. O. Cua and P.-M. Lin, Coputer Aided Analysis of Electric Circuits: Algorits and Coputational Tecniques. Prentice-Hall, 975. [3] L. Nagel, SPICE2: A coputer progra to siulate seiconductor circuits. P.D. dissertation, 975. [4] F. N. Naj, Circuit siulation. Wiley, 2. [5] Y. Saad, Analysis of soe rylov subspace approxiations to te atrix exponential operator, SIAM J. Nuer. Anal., vol. 29, no., pp , 992. [6] M. Hocbruc and A. Osterann, Exponential integrators, Acta Nuerica, vol. 9, pp , 2. [7] A. H. Al-Moy and N. J. Higa, Coputing te action of te atrix exponential, wit an application to exponential integrators, SIAM journal on scientific coputing, vol. 33, no. 2, pp , 2. [8] S.-H. Weng, Q. Cen, and C. K. Ceng, Tie-doain analysis of largescale circuits by atrix exponential etod wit adaptive control, IEEE TCAD, vol. 3, no. 8, pp. 8 93, 22. [9] H. Zuang, W. Yu, I. Kang, X. Wang, and C. K. Ceng, An algoritic fraewor for efficient large-scale circuit siulation using exponential integrators, in Proc. IEEE/ACM Design Auto. Conf., 25. [] R. B. Sidje, Expoit: A software pacage for coputing atrix exponentials, ACM Transactions on Mateatical Software, vol. 24, no., pp. 3 56, 998.

6 TABLE II: Siulation Perforance of Rational Krylov Subspace etod wit Exponential Integrators Design DC(s) ϕ etod ϕ etod ϕ 2 etod a Step Tran(s) Iter avg a Step Tran(s) Iter avg a Step Tran(s) Iter avg D D D D D D D D * singular C * singular C *C atrix of D8 is singular so evaluation of exponential integrators consisting inverse of C is not applicable. [] J. van den Esof and M. Hocbruc, Preconditioning Lanczos approxiations to te atrix exponential, SIAM J. Sci. Coput., vol. 27, no. 4, pp , 26. [2] Q. Cen, W. Scoenaer, S.-H. Weng, C. K. Ceng, G.-H. Cen, L.-J. Jiang, and N. Wong, A fast tie-doain e-tcad coupled siulation fraewor via atrix exponential, in Proc. IEEE/ACM Int. Conf. Coput.-Aided Design, pp , 22. [3] S.-H. Weng, Q. Cen, N. Wong, and C. K. Ceng, Circuit siulation via atrix exponential etod for stiffness andling and parallel processing, in Proc. IEEE/ACM Int. Conf. Coput.-Aided Design, pp , 22. [4] Q. Cen, S.-H. Weng, and C. K. Ceng, A practical regularization tecnique for odified nodal analysis in large-scale tie-doain circuit siulation, IEEE TCAD, vol. 3, no. 7, pp. 3 4, 22. [5] J. Nissen and W. M. Wrigt, a rylov subspace algorit for evaluating te pi function appearing in exponential integrators, ACM Transactions on Mateatical Software, vol. 38, no. 3, pp. 2, 22. [6] C. Moler and C. Van Loan, Nineteen dubious ways to copute te exponential of a atrix, twenty-five years later, SIAM review, vol. 45, no., pp. 3 49, 23. [7] H. Zuang, W. Yu, S.-H. Weng, I. Kang, J.-H. Lin, X. Zang, R. Coutts, and C.-K. Ceng, Siulation algorits wit exponential integration for tie-doain analysis of large-scale power delivery networs, IEEE TCAD, vol. 35, no., pp , 26. [8] H. Zuang, X. Wang, Q. Cen, P. Cen, and C.-K. Ceng, Fro circuit teory, siulation to spice Diego : A atrix exponential approac for tie-doain analysis of large-scale circuits, IEEE Circuits and Systes Magazine, vol. 6, no. 2, pp. 6 34, 26. [9] H. Zuang, Exponential Tie Integration for Transient Analysis of Large-Scale Circuits. PD tesis, Departent of Coputer Science and Engineering, University of California, San Diego, 26. [2] H. Zuang, S.-H. Weng, J.-H. Lin, and C. K. Ceng, MATEX: A distributed fraewor of transient siulation of power distribution networs, in Proc. IEEE/ACM Design Auto. Conf., pp , 24.