Quantum Engineering of Superconducting Qubits

Transcription

1 Quantum Engineering of Superconducting Qubits William D. Oliver Engineering Quantum Systems (EQuS) Group, MIT Quantum Information and Integrated Nanosystems (QuIIN) Group, MIT-LL Plasma Science and Fusion Center IAP Seminar 10 January 2018 RLE. Engineering Quantum Systems

2 Computing Development Timeline Classical (Electronic) Computing First vacuum tube (1907) ENIAC (1946) Transistor invented (1947) First fully transistor-based computer: TX-0 (1953) 30k transistors: i8088 (1971) 4.5M transistors: Pentium (1998) 5B transistors: Xeon (2014) Quantum Computing Quantum computer proposed (1981) Shor s algorithm & quantum error correctionproposed ( ) Quantum anneling & adiabatic QC proposed ( ) Milestones in Fundamental Elements ( ) SNEQSE- 2 Quantum computing is transitioning from scientific curiosity to technical reality A new discipline quantum engineering is emerging to bridge this gap. 2

3 Worldwide Investment (not an exhaustive list) Canada Inst. for Quantum Computing (est. 2002) U. Waterloo and Perimeter Institute Europe Austria: Institute for Quantum Optics and Information (est. 2003) Netherlands: QuTech (2014) $50M investment from Intel United Kingdom: National Quantum Technologies Program (2014) EU: Quantum Flagship (2016) IonQ United States Joint Quantum Institute (est. 2007) Maryland / NIST / LPS (NSA) Ions, neutral atoms, optical, superconductors Multi-agency government investments Universities, DOE, DOC, DoD, NSA, industry Basic research and systems programs Singapore Research Center on Quantum Information Science and Technology (est. 2007) Japan Gate-based QC RIKEN, universities, Coherent computing: ImPACT program Universities (Tokyo, Osaka, Kyoto, ) Govt. labs (NICT, NII, NTT, RIKEN, ) Industry (Mitsubishi, NEC, Toshiba, ) China Key Lab, Quantum Information, CAS (2001) Key Lab, Solid-State Microstruct. (2004) Q-comm on satellite Australia ARC Centers of Excellence Center for Quantum Computing Technology (est. 2000) Engineered Quantum Systems (est. 2011) $46M investment (banking / Government, 2015) Q-Ctrl Potential value of quantum computing for economic and information security is driving significant worldwide investment currently estimated at $4 billion / year. SNEQSE- 3 Superconducting qubits Ion trap qubits Semiconducting qubits Quantum optics NV centers

4 Outline Introduction to quantum computing Dispersive Engineered TWPA 5x5 mm 2 silicon chip Superconducting qubits Quantum engineering State of field Quantum control & filter engineering 3D integration C. Macklin et al., Science (2015) SNEQSE- 6

5 How is a Quantum Computer Different? Fundamental logic element Classical Computer Bit : classical bit (transistor, spin in magnetic memory, ) Quantum Computer Qubit : quantum bit (any coherent two-level system) 0 ψ Superposition: α 0 + β 1 State 0 Or 1 0 And 1 1 ψ = α β 0 1 Measurement Discrete states Deterministic measurement: Ex: Set as 1, measure as 1 Superposition states Probabilistic measurement: Ex: If α = β, 50% 0, 50% 1 Quantum computers rely on encoding information in a fundamentally different way than classical computers SNEQSE- 7

6 How is a Quantum Computer Different? Fundamental logic element Classical Computer Bit : classical bit (transistor, spin in magnetic memory, ) N bits: One N-bit state Quantum Computer Qubit : quantum bit (any coherent two-level system) N qubits: 2 N components to one state 000, 001,, 111 (N = 3) α β γ 11 1 (N = 3) Computing Change a bit: new calculation (classical parallelism) Quantum parallelism & interference 000 f(000) α 000 f(000) + α f(001) β β f(001) + Quantum computers rely on encoding information in a fundamentally different way than classical computers SNEQSE- 8

7 Three Atoms Eight Classical States For three qubits, eight possible states c 1 coupling coupling c 2 c 3 c 4 atom 1 atom 2 atom 3 c 5 c 6 c 7 c1 c2 c3 c4 c 8 c5 c6 c7 c8 3-atom system (8 states) This state requires eight complex numbers to specify it c 1 c 2, c 3, c 4, c 5, c 6, c 7,, c 8 SNEQSE- 9

8 Quantum Parallelism EM pulse flips spin of atom 1 (p-pulse) coupling coupling atom 1 atom 2 atom 3 before pulse after pulse c 1 c 5 c 2 c 6 c 3 c 7 State amplitudes are shuttled between states c 4 c 5 c 8 c 1 Operates on entire system simultaneously c 6 c 2 Quantum c 7 c 3 Parallelism c 8 c 4 3-atom system 3-atom system SNEQSE- 10

9 Quantum Interference coupling coupling EM pulse puts spin of atom 3 into superposition (p/2-pulse) atom 1 atom 2 atom 3 before pulse after pulse + c 5 c 6 c 7 c 5 c 5 0 c 8 c 1 + c 2 c 3 1 c 4 3-atom system 3-atom system SNEQSE- 11

10 Quantum Interference coupling coupling EM pulse puts spin of atom 3 into superposition (p/2-pulse) atom 1 atom 2 atom 3 c 5 before pulse c 5 + c 6 after pulse + _ c 6 c 7 c 5 - c 6 0 c 8 c 1 c c 3 1 c 4 3-atom system 3-atom system SNEQSE- 12

11 Quantum Interference coupling coupling EM pulse puts spin of atom 3 into superposition (p/2-pulse) atom 1 atom 2 atom 3 c 5 c 6 c 7 c 8 c 1 c 2 c 3 c 4 before pulse c 5 + c 6 c 5 - c 6 after pulse + _ if c 5 =c 6 no amplitude in state Quantum Interference 3-atom system 3-atom system SNEQSE- 13

12 Quantum Interference coupling coupling EM pulse puts spin of atom 3 into superposition (p/2-pulse) atom 1 atom 2 atom 3 before pulse c 5 c 6 c 7 c 8 c 1 c 2 c 3 c 4 3-atom system c 5 + c 6 c 5 - c 6 c 7 + c 8 c 7 - c 8 c 1 + c 2 c 1 - c 2 c 3 + c 4 c 3 - c 4 after pulse 3-atom system if c 5 =c 6 no amplitude in state Quantum Quantum + _ Interference Parallelism SNEQSE- 14

13 Gate-Based Approach: Single-Qubit Operation Classical NOT-gate Quantum NOT-gate example: X-gate X 1 X-gate: p-pulse around x-axis Bloch Sphere Driving Field (envelope only) SNEQSE- 15 X-gate applied to qubit along +Z: 0 1

14 Gate-Based Approach: Single-Qubit Operation Classical NOT-gate Quantum NOT-gate example: X-gate X 1 X-gate: p-pulse around x-axis Bloch Sphere Driving Field (envelope only) SNEQSE- 16 X-gate applied to arbitrary qubit state:

15 Gate-Based Approach: Two-Qubit Controlled-NOT Classical XOR-gate Quantum CNOT-gate control bit target bit in QB-x QB-y CNOT out control qubit target qubit Rotation of QB-y depends on the state of QB-x For example: in out x y x y x y Results in an entangled state (cannot be factored) SNEQSE- 17 Universal gate-based quantum computation is achievable with a small set of single and two-qubit gates.

16 Quantum Algorithm (Gate Model) Input state Single-qubit operations Algorithm Quantum interference Coupled-qubit operations Quantum interference Algorithm encodes answer into single output state with high probability Output state Yin = ~ ~ g 010 g ~ d 011 d ~ Computer 0 1 Measurement SNEQSE- 18 time

17 Intuitive Figure of Merit for Qubit Quality Gate time: Time required for a single operation Fast operations are desired; Classical processor: ~1 GHz (1 ns per op.) Coherence time: The qubit s lifetime Quantum state State decaying State lost Environmental disruptions Time One Figure of Merit * : (Coherence time) / (Gate time) SNEQSE- 19 Most lenient threshold for quantum error correction (to sustain computation): >10 3 operations per qubit lifetime ( * Rigorous metric: gate & readout fidelity > 99.5%, that is, < 0.5% error per operation)

18 Qubit Modalities Figure of Merit: Coherence Time / Gate Time 1.E+06 1.E+05 1.E+04 1.E+03 1.E+02 1.E+01 lowest threshold for quantum error correction Ensemble NMR Nuclear Spin in Silicon Trapped Ion Trapped-Ion Qubit Gate time: ms Coherence time: 1-50 s Neutral Atoms Viable qubit for scaling Not yet demonstrated to be viable Solid State Quantum Dots Electron Spin in Silicon Coherence Quantum time: 100 Dot ms 1.E+00 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 1.E+08 1.E+09 Gate Speed (Hz) faster gates & RO NV-Centers in Diamond Best Performance Superconducting Qubits Superconducting Qubit 0 = Gate time: 10 ns higher fidelity Optical 1 mm 1 = Series1 SNEQSE- 20

19 Quantum Computing Approaches Gate-Based Quantum Computer Quantum Annealing Computer Shor s Algorithm for Prime Factorization: RSA Key Decryption Travelling Salesman Problem: Route Optimization Processing Time (hours) 1E+18 1E+12 1E+06 1E+00 1E-06 Quantum Classical 1 hour age of the universe 1E Bit-length of RSA Key Key Gate-Based Applications: RSA key decryption Unsorted database searching Quantum simulation Quantum speed-up exists over known classical algorithms Key Annealing Applications: Supply transport optimization Sensor & satellite tasking Pattern recognition (surveillance) Unknown if quantum speed-up exists with this approach SNEQSE- 21

20 Outline Introduction to quantum computing Dispersive Engineered TWPA 5x5 mm 2 silicon chip Superconducting qubits Quantum engineering State of field Quantum control & filter engineering 3D integration C. Macklin et al., Science (2015) SNEQSE- 22

21 How to Build an Artificial Atom Linear resonant circuit Low loss: Q >> 1 Linear Resonant Circuit 0 1 2p LC L C SNEQSE- 23

22 Superconductivity Normal Superconducting also NbN, TiN, NbTiN, Dissipationless DC) Phase coherent SNEQSE- 24

23 How to Build an Artificial Atom Linear resonant circuit Low loss: Q >> 1 Low temperature: kt << h 0 Linear elements: harmonic quantized electrical harmonic oscillator (e.g., quantized EM field) 0 Linear Resonant Circuit 1 2p LC L C Capacitive energy ˆ 1 ˆ 1 H CV LIˆ Inductive energy Energy Spectra of Quantum LC Circuit Energy ~1/Q h 0 h 0 h 0 Vˆ Î Iˆ, Vˆ 0 capacitor voltage (momentum p) inductor current (position q) current and voltage do not commute (cannot measure simultaneously with arbitrary precision uncertainty relation) SNEQSE- 25 M.H. Devoret, Les Houches (1995)

24 Josephson Junctions (JJs) Nonlinear inductors SIS (Josephson) Junction ~ 1 nm L R SEM of Al shadow-evaporated Josephson junction ~ 1 nm superconductor insulator superconductor Current: Voltage: Inductance: I V V I c sin 0 d 2p dt di LJ dt SNEQSE nm I c is the critical current, which depends on superconductor material and insulator thickness 0 = h/2e is the superconducting flux quantum and has value 2.07x10-15 Wb = 2.07 ma ph = 2.07 mv ps

25 How to Build an Artificial Atom Linear resonant circuit Low loss: Q >> 1 Low temperature: kt << h 0 Linear elements: harmonic Nonlinear resonant circuit Josephson tunnel junction Anharmonic Solid-state artificial atom Linear Resonant Circuit Josephson Junction: Nonlinear Inductor 0 1 2p LC L C I I sin L J C 0 2pI cos C V 0 d 2p dt L J I C, I, V C Energy Spectra of Quantum LC Circuit Energy ~1/Q h 0 h 0 h 0 Energy Spectra of Quantum LC Circuit 3 2 Energy 1 0 h 23 h 12 h 01 Qubit SNEQSE- 27

26 Device Testing in a Dilution Refrigerator Temperature = 20 mk Isolators / circulators Mixing chamber plate (10 mk) Microwave lines and attenuators Microwave switches Filters and biasing lines 11 resonator pkgs (5 res. / package) 3 qubit pkgs (2 qubits / pkg) SNEQSE GHz has a thermal energy of 250 mk operate at 20 mk. Commercially available, turn-key dilution refrigerators.

27 Why Superconducting Qubits: Lithographic scalability Manufactured/designed atoms Lithographic scalability (silicon) Qubit Design Determines Energy Levels of Artificial Atom 1 5 mm Energy Magnetic Flux (/ 0 ) mm wafers (49 Reticles 16 chips) 5-Transmon chip with readout resonators Transmon capacitor and control lines -1 Tunable transmon qubit loop with junctions Josephson junctions (aluminum) 5 mm 0.5 mm 0.5 mm 250 nm SNEQSE- 29

28 Why Superconducting Qubits: Nanosecond-scale gate operations Manufactured/designed atoms Dual-Channel, 2GS/s, 14-bit AWG Qubit Control via Microwave Pulses Lithographic scalability (silicon) RF and microwave control 100-MHz gate operations SNEQSE- 30

29 Why Superconducting Qubits: Remarkable improvements in qubit coherence Remarkable improvement in T 1,2 Materials Fabrication Design Moore s Law for T 2 lowest thresholds for quantum error correction several groups us (Delft, IBM, MIT, Yale, ) NIST/IBM, Yale,... All major qubit types at MIT Flux qubit: T 2 = 23 us 2D transmon: T 2 = 100 us 3D transmon: T 2 = 150 us C-shunt flux qubit: T 2 = 100 us MIT-LL Nb Trilayer Blue: MIT & LL Planar resonators TiN Q > 2 M Al & Nb Q > 1 M SNEQSE- 31 Oliver & Welander, MRS Bulletin (2013)

30 Outline Introduction to quantum computing Dispersive Engineered TWPA 5x5 mm 2 silicon chip Superconducting qubits Quantum engineering State of field Quantum control & filter engineering 3D integration C. Macklin et al., Science (2015) SNEQSE- 32

31 Engineering Quantum Systems Computer Architecture Fault-tolerant implementations Quantum error correction Logical controller, compiler, scheduler Future Quantum Processor Analog & Digital Circuits Integrated control electronics and optics Control electronics, cryogenic CMOS, SFQ Calibration and benchmarking Optimal control & dynamical error suppression Computer Science Predictions of Performance Quantum Testbeds Logical Primitives Control & DSP Hamiltonian simulations and design tools New algorithms & error correction Benchmarking, validation, verification Simulation and design tools Physics 2-10 Qubit Experiments High-coherence materials, fabrication and 3D integration Thermal, mechanical, electromagnetic management Integrated electronics and optics Advanced packaging and signal routing Materials & Fabrication SNEQSE- 33 Future quantum processor demonstrations will stand on physics, computer science, and engineering foundation

32 Architectural Layers of a QIP Software: algorithm & interface Layered Architecture SNEQSE- 34 Hardware: physical qubits N.C. Jones PRX 2, (2012)

33 Architectural Layers of a QIP Compiler & firmware: Dedicated to achieving fault-tolerant logical operations via error mitigation, detection, and correction Layered Architecture logical qubits (robust) error detection + error mitigation logical operation + error correction physical qubits (faulty) SNEQSE- 35 N.C. Jones PRX 2, (2012)

34 Architectural Layers of a QIP Qubit Error Detection UCSB / Google Group, IBM & Delft demonstrations Layered Architecture SNEQSE- 36 J. Kelley et al., Nature 519, (2015) Also: A.D. Corcoles et al., & Riste et al., Nature Comm. (2015) N.C. Jones PRX 2, (2012)

35 Architectural Layers of a QIP Layered Architecture Capacitively shunted flux qubit T 1 = 50 ms ; T 2 = 100 ms SNEQSE- 37 F. Yan et al., Nature Comm. 7, (2016) N.C. Jones PRX 2, (2012)

36 Architectural Layers of a QIP Engineered Error Mitigation: Dynamical Decoupling Layered Architecture Eg. Lacrosse Cradling SNEQSE- 39 N.C. Jones PRX 2, (2012)

37 Quantum Control Demonstration: Reducing Decoherence During Free Evolution Longitudinal Relaxation: T 1 = 12 us Echo approximately T 1 - limited: T 2E ~ 2 T 1 Transverse Relaxation: T 2 * ~ 2.5 us Linewidth: T 2 * = 1/(p FWHM) ~ 1.75 us Rabi approximately T 1 - limited: T R ~ (4/3) T 1 Gate fidelty (rand. benchmkg): F = 99.75% SNEQSE- 40 Nature Physics 7, 565 (2011)

38 Qubit Dephasing and Filter Function Free evolution of the phase dephasing SNEQSE- 41

39 Qubit Dephasing and Filter Function Free evolution of the phase i exp i ( t) exp dte01( t) 0 dephasing SNEQSE- 42

40 Qubit Dephasing and Filter Function Free evolution of the phase i exp i ( t) exp dte01( t) 0 dephasing for Gaussian-distributed fluctuations exp E 01 2 d S g t N SNEQSE- 43 Martinis et al., PRB 67, (2003), Ithier et al., PRB 72, (2005); Yoshihara et al., PRL 97, (2006), Cywinski et al. PRB 77, (2008)

41 Qubit Dephasing and Filter Function Free evolution of the phase i exp i ( t) exp dte01( t) 0 dephasing for Gaussian-distributed fluctuations exp E 01 2 d S g t N sensitivity of qubit energy to fluctuations SNEQSE- 44 Martinis et al., PRB 67, (2003), Ithier et al., PRB 72, (2005); Yoshihara et al., PRL 97, (2006), Cywinski et al. PRB 77, (2008)

42 Qubit Dephasing and Filter Function Free evolution of the phase i exp i ( t) exp dte01( t) 0 dephasing for Gaussian-distributed fluctuations exp E 01 2 d S g t N sensitivity of qubit energy to fluctuations strength (variance) of fluctuations SNEQSE- 45 Martinis et al., PRB 67, (2003), Ithier et al., PRB 72, (2005); Yoshihara et al., PRL 97, (2006), Cywinski et al. PRB 77, (2008)

43 Qubit Dephasing and Filter Function Free evolution of the phase i exp i ( t) exp dte01( t) 0 dephasing for Gaussian-distributed fluctuations exp 2 sensitivity of qubit energy to fluctuations Filter function shapes noise Engineered filter function depends on pulse sequence and windows the PSD S () 2 2 E01 strength (variance) of fluctuations 2 d S g t N SNEQSE- 46 Martinis et al., PRB 67, (2003), Ithier et al., PRB 72, (2005); Yoshihara et al., PRL 97, (2006), Cywinski et al. PRB 77, (2008)

44 Dynamical Decoupling: Noise Shaping Filters NO Dynam. Decoup. (Ramsey, N=0) X p/2 X p/2 t Filter Function = 1 ms, p = 0 S ~ 1/f Ramsey Spin echo Frequency (MHz) SNEQSE- 47 Nature Physics 7, 565 (2011); PRL 110, (2013)

45 Dynamical Decoupling: Noise Shaping Filters with 1 p-pulse NO Dynam. Decoup. (Ramsey, N=0) WITH Dynam. Decoup. (spin echo, N=1) X p/2 X p/2 X p X p/2 X p/2 t Filter Function /2 /2 0 t = 1 ms, p = 0 S ~ 1/f Frequency (MHz) Ramsey Spin echo SNEQSE- 48 Nature Physics 7, 565 (2011); PRL 110, (2013)

46 Dynamical Decoupling: Noise Shaping Filters with 2 p-pulses NO Dynam. Decoup. (Ramsey, N=0) WITH Dynam. Decoup. (CPMG, N=2) X p/2 X p/2 X p X p/2 X p/2 /4 /2 /4 X p t t Filter Function g(t) = 1 ms, p = 0 S ~ 1/f Frequency (MHz) Ramsey Spin echo SNEQSE- 49 Nature Physics 7, 565 (2011); PRL 110, (2013)

47 Architectural Layers of a QIP Engineered Error Mitigation: Dynamical Decoupling (improves the physical qubit error rate) Layered Architecture J. Bylander et al., Nature Phys. 7, 565 (2011) SNEQSE- 50 N.C. Jones PRX 2, (2012)

48 Outline Introduction to quantum computing Dispersive Engineered TWPA 5x5 mm 2 silicon chip Superconducting qubits Quantum engineering State of field Quantum control & filter engineering 3D integration C. Macklin et al., Science (2015) SNEQSE- 51

49 Frequency-Tunable Transmons 5-Transmon Chip Single Qubit Gates Coupled Qubit Gates SWAP C-phase M. Kjaergaard, P. Krantz, T. W. Larsen, M. Kimchi-Schwarz, D. Rosenberg, J. Yoder, D. Kim, S. Gustavsson & W. D. Oliver SNEQSE- 52 High coherence times, but single-layer process. Routing I/O to 2D array is challenging.

50 Quantum-to-Classical Interface Today (few-qubit experiments) Superconducting Qubits Trapped Ion Qubits Trapped ions on an optical table Superconducting qubits in a dilution refrigerator Quantum-to-Classical Interface as it looks today SNEQSE- 53 Need an extensible approach to realize practical quantum information processors

51 3D Integration for Quantum Processors IARPA Quantum Enhanced Optimization Silicon MCM Qubit Chip Printed Circuit Board 3-Stack enables high connectivity while maintaining high qubit coherence dc Wiring Harness Wire Bonds Microbumps Metal Carrier RF Wiring Harness Ribbon Bonds Coplanar Waveguide Transition to MCM Qubit chip Qubit 1 Large, isolated qubit mode volume High-Q metal Coupling Qubit 2 ~100 mm In bumps Few mm Interposer Qubit bias Through-silicon vias Readout/ interconnect Thick ground plane Parametric readout amplifiers and qubit bias/control routing SNEQSE- 54

52 3D Integration for Quantum Processors IARPA Quantum Enhanced Optimization Silicon MCM Qubit Chip Printed Circuit Board Coupled superconducting qubits Flux qubits for quantum annealing us coherence times: Z 1-10 us coherence times: X & Z Circuit-model QC us coherence times dc Wiring Harness Wire Bonds Microbumps Metal Carrier RF Wiring Harness Ribbon Bonds Coplanar Waveguide Transition to MCM Qubit chip Qubit 1 Large, isolated qubit mode volume High-Q metal Coupling Qubit 2 ~100 mm In bumps Few mm Interposer Qubit bias Through-silicon vias Readout/ interconnect Thick ground plane Parametric readout amplifiers Yan et al., Nature Comm. (2016) and qubit bias/control routing MIT / MIT-LL (2017) Kelly et al., Nature (2015) SNEQSE- 55 Qubit layer fabrication used for both gate-model and QA qubits (they are different!)

53 3D Integration for Quantum Processors IARPA Quantum Enhanced Optimization Silicon MCM Qubit Chip Printed Circuit Board Readout/interconnect layer routes wires and amplifies signals 8-layer planar Niobium process for efficient wire routing dc Wiring Harness Wire Bonds Microbumps Metal Carrier RF Wiring Harness Ribbon Bonds Coplanar Waveguide Transition to MCM Qubit chip Qubit 1 Large, isolated qubit mode volume High-Q metal Traveling Wave Parametric Amplifier Coupling M7 Qubit 2 Josephson Junction ~100 mm In bumps Interposer Qubit bias Through-silicon vias M6 JJ5 Few mm M5 Readout/ interconnect Thick ground plane Parametric readout amplifiers and qubit bias/control routing Macklin et al., Science 350, 307 (2015) Tolpygo et al., IEEE Trans. (2014) SNEQSE- 56

54 3D Integration for Quantum Processors IARPA Quantum Enhanced Optimization Silicon MCM Qubit Chip Printed Circuit Board Interposer isolates qubit from readout/interconnect layer. Superconducting through-silicon vias provide connectivity. dc Wiring Harness Wire Bonds Microbumps Metal Carrier RF Wiring Harness Ribbon Bonds Coplanar Waveguide Transition to MCM Patterned TiN Qubit chip Qubit 1 Large, isolated qubit mode volume High-Q metal Coupling Qubit 2 Through-silicon ~100 mm via lined with TiN In bumps 210 mm Few mm Interposer Qubit bias Through-silicon vias Readout/ interconnect Thick ground plane Parametric readout amplifiers and qubit bias/control routing Donna Yost, Justin Malek et al., (2017) SNEQSE- 57

55 3D Integration for Quantum Processors IARPA Quantum Enhanced Optimization Silicon MCM Qubit Chip Printed Circuit Board Indium bumps connect chips and provide electromechanical joining Fabricated In bumps Cross-section of bump-bonded chips dc Wiring Harness Wire Bonds Microbumps Metal Carrier RF Wiring Harness Ribbon Bonds Coplanar Waveguide Transition to MCM Qubit chip Qubit 1 Large, isolated qubit mode volume High-Q metal Coupling 3D image of bumpbonded chips Qubit 2 IR image of bumpbonded chips ~100 mm In bumps Few mm Interposer Qubit bias Through-silicon vias Readout/ interconnect Thick ground plane Parametric readout amplifiers and qubit bias/control routing Tilt < 0.25 mrad Alignment ~1 µm Danna Rosenberg et al., npj Quantum Information (2017) SNEQSE- 58

56 3D Integration Flip-Chip Bonding 6 identical qubits coupled to quarter wave resonators Packaged qubit with flip chip bonded on top Coherence Times (T1, T2 ~ ms) Signal [mv] T 1 ~19 ms Time (ms) Over past 12 months, have demonstrated four critical building blocks Proximal surface Electrical conduction Capacitive coupling Inductive coupling Si chip Qubit chip Qubit chip Qubit chip Qubit chip Interposer Interposer Interposer Coherence times comparable to planar qubits of same design SNEQSE- 59 D. Rosenberg, D. Yost, R. Das, L. Racz, et al. (2015)

57 SNEQSE- 60 equs.mit.edu

58 Team and collaborators MIT Lincoln Laboratory MIT EQuS Group Peter Baldo Jeff Birenbaum Vlad Bolkhovsky Greg Calusine John Chiaverini Eric Dauler (GL) Rabi Das George Fitch Mark Gouker (ADH) Gerry Holland David Hover Jamie Kerman (co-pi) David Kim Justin Mallek Karen Magoon Lee Maillhot Alex Melville Jovi Miloxi Peter Murphy Kevin Obenland William D. Oliver (co-pi) Brenda Osadchy Jason Plant Jeanne Porter Livia Racz (AGL) Danna Rosenberg Jeremy Sage Gabriel Samach Adam Sears Rick Slattery Sergey Tolpygo Steve Weber Terry Weir Wayne Woods Alex Wynn Jonilyn Yoder Donna Yost Scott Zarr Amy Greene Bharath Kannan Uwe Luepke Tim Menke Jack Qiu Youngkyu Sung Daniel Campbell Morten Kjaergaard Philip Krantz Joel Wang Fei Yan Brian Mills Fancisca Vasconcelos Megan Yamoah Mirabella Pulido Simon Gustavsson Terry Orlando William D. Oliver sponsorship EQuS NEC/RIKEN/Tokyo Fumiki Yoshihara (NICT) Yasunobu Nakamura Chalmers Jonas Bylander Juelich Gianluigi Catelani UC Berkeley John Clarke Irfan Siddiqi SNEQSE- 61