Minimum Neutral Clamp Capacitor Design Considering Voltage Saturation for a Three-Level Inverter

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1 Minimm Netrl Clmp Cpcitor Design Considering Voltge Strtion for Three-Level Inverter Jn-ichi Itoh 1, Tkki Tnk 1 1 Ngok University of Technology, Kmitomiok, Ngok, Niigt, Jpn Abstrct Netrl point clmped inverter hs voltge flcttion problem t the netrl point cpcitor. This pper discsses the minimm vle of the netrl point cpcitor considers the voltge commnd strtion with pplying the voltge flcttion sppression control method. This pper clerly demonstrtes the stble reltionships mong the it voltge, otpt voltge nd the cpcitnce vle. In ddition, the minimiztion design procedre of cpcitnce vle bsis on this nlysis is demonstrted. The vlidity of the design method is confirmed by experimentl reslts. Index Terms Minimm cpcitnce design, Three level inverter, Vector control, Netrl point voltge flcttion I. INTRODUCTION Netrl-point-clmped three-level inverters hve been ctively stdied recently becse this converter shows n dvntge in redcing the otpt voltge hrmonic component [1]. Three-level inverters hve been pplied to djstble speed drive systems sch s, UPS nd PV inverter []. Three-level inverter shows severl dvntges better thn the two-level inverter; 1) downsizing of the filter, ) hrmonic components re eqivlent to the two-level inverters even the switching freqency hs been redced nd 3) high otpt voltge cn be obtined with the se of low resistnce voltge switching devices. However, netrl-point-clmped inverter connects two cpcitors in the DC link prt to spply the netrl point voltge. A known problem is tht the voltge flcttion occrs t the netrl-point cpcitor, which hs freqency three times higher thn the otpt freqency, depending on the lod power fctor or otpt voltge. The voltge flcttion cses poor performnces sch s lrge hrmonic components in the power grid interconnections nd in the cse of djstble speed drive pplictions, ripple occrs t the torqe nd speed. Sppression control methods for the voltge flcttions hve been proposed [3-5]. There re two sppression control methods; the first method dds zero phse voltge commnd to ech phse voltge commnd in the crrier comprison modltion [-4]; the second method tilizes two vectors of the sme direction nd mplitde which differs from the direction of the netrl point crrent in spce vector modltion [5]. However, these sppression methods re constrined by two fctors; the otpt voltge limittion of the inverter nd the lod power fctor. Therefore, the cpcitnce vle is designed to lrge mplitde in order to sppress the voltge flcttion. Additionlly, this voltge flcttion gretly depends on the it nd otpt conditions sch s the modltion index, the lod power fctor nd the lod crrent. The exceeded cpcitnce vle tht is lrger thn the necessity cpcitnce vle increses the cost nd lso the volme of the circit. Tht is, the design of the minimm cpcitnce vle in corresponds to the it nd otpt condition shold be stdied nd nlyzed. This pper discsses the design method for chieving the minimm vle of the netrl clmp cpcitor in three-level inverter in order to obtin higher power density. The behvior of the voltge flcttion sing blnce control on the voltge commnd strtion hs been nlyzed [3]. Frthermore, the minimm cpcitnce vle is discssed t ech opertion point bsed on the speed-torqe crve (NT crve) of PM motor with i d = 0 control nd flx-wekening control. Firstly, the sppression method for the netrl point voltge flcttion is described in this pper. Next, the design procedre of the cpcitnce vle with considers pon the voltge commnd strtion is mentioned ccording to lod power fctor. Thirdly, the procedre designed bsed on the torqe T nd rotting speed N with considers to the switching ripple nd dc-link flcttion is shown. Finlly, the vlidity of the design method is confirmed by the simltion reslts nd 1-kW experiment prototype. II. PROBLEM OF THREE-LEVEL INVERTERS A. The configrtion of the min circit Figre 1 shows the circit configrtion of threelevel inverter. Two switches Q x, Q 3x (x = or v or w) nd clmping diodes D 1x, D x re dded to otpt zero phse voltge. The otpt voltge consists of three-level; V in /, 0, -V in /, low hrmonic components in the otpt wveform cn be obtined. Figre shows the principle of the nipolr modltion in crrier bsed modltion. In this modltion, the three vles of phse voltge v o re

2 determined by the mgnitde reltionship between the pper crrier, lower crrier, nd phse voltge commnd. If phse voltge commnd is lrger thn pper crrier, v o is determined +V in /. If phse voltge commnd is smller thn lower crrier, v o is determined -V in /. The other is otptted zero voltge. B. Sppression control of the netrl point voltge flcttion Figre 3() shows ech phse voltge commnds re dded with the third hrmonic for the improvement of voltge tiliztion rtio nd the netrl point voltge. The simltion condition is following, modltion index =1.00, power fctor of lod cos=0.80, it cpcitnce C=00 F. From Fig. 3(), it is confirmed tht the netrl point voltge flcttes t freqency tht is three times higher thn the otpt freqency. This flcttion is de to the flow of netrl point crrent i to the lod. The netrl point crrent i is clclted by mltiplying the dty of the netrl point crrent i t per switching period with the phse crrent. i cn be expressed by i D i D i D... (1) 0 v0 v w0 iw where D 0, D v0, D w0 is the dty of ech switches connected to the netrl point nd i, i v, i w re phse crrents. In the nipolr modltion, the vle of the phse voltge t switching period contins of two vles inclding the zero vle from Fig.. Therefore, D 0, D v0, D w0 re obtined by () ssming tht the switching freqency is high nd the netrl point crrent ripple is neglected de to its smll vle. D0 1 v v0 Dv0 1 vv v0... () D w0 1 vw v0 where v *, v v *, v w * re the phse voltge commnd nd v 0 * is the zero phse voltge commnd. The netrl point crrent i is clclted by sbstitting () into (1). Then the crrent i is obtined by i 1 v v0 i 1 vv v0 iv 1 vw v0 iw.. (3) The flcttion of the netrl point voltge Δ is sppressed to dd ech phse voltge commnds to v 0 * s i = 0 is solved by (3). Figre 3(b) shows simltion wveform of netrl point voltge with the ppliction of sppression control. The mplitde of the voltge flcttion is redced from pproximtely 30V to 0V. The remined flcttions re reslted from where the vle of the phse voltge commnds dded into v 0 *, which it needs to be i = 0, is higher thn the limit of the inverter otpt voltge. Therefore, the cpcitnce vles re designed to be lrger vle de to the reson voltge flcttion cnnot be sppressed completely t high modltion index. Fig. 1. Circit configrtion of the netrl-point-clmped threelevel inverter. Fig.. Unipolr modltion for the netrl-point-clmped threelevel inverter. () Withot sppression control. (b) With sppression control. Fig. 3. The effect of voltge flcttion sppression control (Upper: Ech phse voltge commnd, Lower: Netrl point voltge).

3 III. DESIGN METHOD TO OBTAIN MINIMUM CAPACITANCE VALUE A. Reltions between the cpcitnce vle nd opertion conditions As discssed in previos section, the modltion index or the power fctor effects the voltge flcttion. In this section, the design method to obtin minimm cpcitnce vle is discssed when the sppression control show t section II (B) is pplied. The netrl point voltge is clclted by integrting the (3). Then the voltge is obtined by v 1 i dt... (4) C where C is the vle of one sided dc link cpcitnce. Knowing the netrl point voltge is flctting periodiclly, the flcttion bnd of the netrl point voltge is clclted by integrting i t f inv / 6. Then the voltges flcttion Δ is obtined by 1 1/ 6 f inv Δv i dt C... (5) 0 However, it is difficlt to solve by the lgebr clcltion becse the integrtion prt in (5) is nonliner fnction de to the bsolte fnctions. Then, dimensionless coefficient is introdced to (5). As reslt, the voltge fnction is expressed by I / 6 v Iv Δv i / Iv d k(, cos ) Cω... (6) 0 Cω where I v is the line crrent, is the nglr otpt freqency, is the otpt phse ngle, nd k (, cos) is the defined the chrge coefficient. Figre 4 shows reltionship mong the chrge coefficient k (, cos), the modltion index nd the lod power fctor cos. The modltion index is defined by 3/ mximm phse voltge / dc link voltge. This figre is obtined by clclting the integrtion prt in (6). In conclsion, the dmittnces of the netrl point cpcitnce C p nd C n re obtined by (7) from normlizing (6) sing Tble1. I v_p Yp k(, cos)... (7) Δv _p The dmittnce Y p which cn keep lower thn the desired Δ t sttic stte is obtined by sbstitting k (, cos) into (7). For instnce, nder n opertion condition where the netrl point voltge is lower thn 10% of the it voltge, the lod power fctor = 0.9, nd the modltion index = 1.1. From the clcltion, the dmittnce Y p is 61.3% (=313F@ 10kW, 00Vrms, 50Hz ). B. Design method ccording to opertion points of motor In section III (A), the design of the cpcitnce vle which is clclted from, cos, I, Δ ws shown. In this section, the design procedre of the cpcitnce vle from torqe T, the motor speed N nd Δ will be discssed. In ddition, srfce permnent mgnet synchronos motor with i d =0 control nd flxwekening control re considered in stble stte. 1) PM motor with i d =0 control: Figre 5() shows phsor vector digrm of PM motor with the pplying of the control keeping d-xis crrent i d to zero. The reltionship between (6) nd the prmeter of the motor cn be expressed from (8) to (11) V... (8), Vin pn / (9), i T I q 3... (10), 3 p e RI cos... (11), e RI LI where V is the phse voltge, p is the pirs of the poles, Fig. 4. Chrge coefficient k(, cos) in (4) : Reltion between chrge coefficient nd power fctor of lod nd modltion index. Tble 1: Definition of normlized vle for Fig.. Normlized vle Δp V v p I v p Y p V LI RI e I Stndrd vle V in Line voltge rting: V v n [Vrms] Line crrent rting: I v n [Arms] I v n / V v n LI V I q e RI () i d = 0 control (b) flx-wekening control Fig.5. Phsor vector of PM motor. d

4 is the min flx, i q is the q xis crrent, e is the speed electromotive force, R is the rmtre resistnce, nd L is the rmtre self-indctnce. The speed electromotive force e is expressed by e... (1). By sbstitting (9), (10) nd (1) into (11), the power fctor of the lod is expressed by. pn RT 30 p cos... (13). pn RT NLT 30 p 30 Then the phse voltge V is obtined by 1 pn RT NLT V (14). p 30 By sbstitting (14) into (8), the reltionship between the modltion index nd the motor prmeter is obtined by V in 3 pn RT NLT 30 p (15). ) PM motor with flx-wekening control: Figre 5(b) shows phsor vector digrm for the PM motor with the pplying of flx-wekening control. The d-xis crrent is defined by V om L i mx d q... (16), id Ld where mx[v om ] is the line to line voltge in cse of R << 1. The reltionship between the phse crrent I in (6) nd the motor prmeter is expressed by I id i q I... (17). 3 3 The complex power P c is obtined by P V I e i RI j e i LI... (18). c q d The effective power P is the rel prt in (18). The power P is expressed by... (19). P e i RI q The power fctor of lod cos is leded from (18) nd (19). The fctor is obtined by P eiq RI... (0). cos P c e i RI e i LI q d By sbstitting (10), (1) (16) nd (17) into (0), the lod power fctor is known. Then the phse voltge V is obtined by V P c 1 iq id e RI e LI 3 I 3 I I... (1). By sbstitting (1) into (8), the reltionship between the modltion index nd motor prmeter is obtined by V in 3 i e I q RI i e I d LI... (). C. Design method inclding switching ripple The definition of Δ shown in the previos section did not consider the switching ripple. In this section, the phenomenon re considered into the design of cpcitnce. The mximm vle of switching ripple is defined by I v... (3), sw Cf sw mx _ where f sw is the switching freqency of the inverter. The flcttion of the netrl point voltge with being considered on the switching ripple nd the it voltge flcttion is defined by '... (4) v v mx v _ sw Finlly, the cpcitnce vle is obtined by 1 I I k (,cos ) C... (5) ' v finv D. Exmple on the design of obtining minimm cpcitnce The power spply interfce system sing the motor drive of electricl vehicle is spposed. In this system, the it voltge of three-level inverter V in is the otpt voltge of DC to DC converter. Hence, The AC component of V in is spposed zero mplitde. Figre 6 shows the speed-torqe crve (NT crve) of the PM motor when the minimm cpcitnce conditions re considered. Point A shows the strting opertion (low speed high torqe). Point B is the high speed light lod condition. Then, point C delivers the mximm speed nd torqe with i d = 0 control. Lstly, point D shows the mximm speed nd torqe with the ppliction of flxwekening control. The cpcitnce vle is designed t the point of mximm Δ. Hence, the T nd N of this point re shown. Δ increses with flling freqency nd incresing crrent s evidenced by (6). So, the mximm Δ shold be the point A s low speed high torqe, point B or D s high d xis crrent or point C s high torqe. According to bove-mentioned, minimm cpcitnce vle is designed nder the following conditions: the motor prmeter s Tble, V in = 40V, f sw = 10kHz, Δ < 5%. Δ t point A, B, C nd D re clclted by (6). The modltion index nd power fctor of the lod cos re set for ech point; (=0.19, cos=0.96, I A, (=1.00, cos=0.14, I B, (=1.00, cos=0.954, I C, (=1.00, cos=0.67, I D by (13) nd (15). Therefore, the cpcitnce vle shold be determined t point B. In conclsion, cpcitnce vle is designed 133F by (5) nd Fig. 4. Figre 7 shows the components of netrl point

5 voltge flcttion ech opertion point in cse of designing cpcitnce vle = 133F. Ech stcked br chrt is constrcted from netrl point voltge flcttion t three times higher thn otpt freqency Δ nd mximm vle of switching ripple Δ_sw. The switching ripple Δ_sw is lrger thn Δ s reslt of enogh sppressing Δ by pplying sppression control. And, the mximm vle of Δ_sw. is 9.38 V t the point D. However, the totl voltge flcttion of netrl point Δ hs mximm vle t the point B s the worst vle of the lod power fctor. IV. SIMULATION RESULTS The netrl point voltge flcttion in cse of chnging torqe nd speed is considered by simltion. The simltion condition follow section III (D). Figre 8 shows the vle of netrl point voltge flcttion operted the motor in ech operting mode in Fig. 6. By Fig.8, the vles re sppressed within design vle. Figre 9 show simltion wveforms in cse of trnsition of mode 1,, 3 nd 4 in Fig. 6. Ech wveforms re the mechnicl nglr freqency m, the d xis crrent i d, the q xis crrent i q nd the netrl point voltge. Figre 9() shows simltion reslts of operting the motor t mode 1 in Fig. 6. The lod torqe is chnged from 0 to 4 N m. The mximm vle of netrl point voltge mx[δ ] is 1.88 V. This vle is within design vle. The voltge flcttion three times higher thn otpt freqency is sppressed enogh. Similrly, Figre 9(b) shows reslt of operting the motor t mode in Fig. 6. The mximm vle of netrl point voltge mx[δ ] is 3.89 V. This vle is lso within design vle. Figre 9(c) shows reslt of operting the motor t mode 3. The mximm vle of netrl point voltge mx[δ ] is 11.9 V. This vle is within design vle. Δ is not sppressed de to power fctor deteriortion depending on incresing d-xis crrent by the flxwekening control. At 100 ms, The trnsitionl flcttion is csed. After now, this phenomenon is considered to the design method. Then, Figre 9(d) shows reslt of operting the motor t mode 4. The lod torqe is chnged from 0 to 0.9 N m. The mximm vle of netrl point voltge mx[δ ] is 9.11 V. This vle is within design vle. Δ is not sppressed de to power fctor deteriortion depending on incresing d-xis crrent by the flxwekening control. V. EXPERIMENTAL RESULT A 1-kW lod prototype ws tested nd verified the design method. The experimentl conditions re follows, it voltge V in is 00 V, otpt freqency f inv is 50 Hz, switching freqency f sw is 10 khz, DC link cpcitnce C is 100 F. Figre 10 shows two reslts to demonstrte the v [V] v [V] i d = 0 control Flx wekening A control C mode 0.1 mode 1 mode Speed N [p..] mode 4 Fig.6. Speed torqe crve for cpcitor design. Tble. PM motor prmeters for design exmple. Rting otpt Pr 3.0 kw Rting speed Nr 1000 rpm Armtre resistnce R 63.5 m Armtre Self-indctnce L 556 H Bck-emf coefficient 34. mv s/rd Armtre pirs of poles p 6 Moment of inerti N m/a Rting Torqe Tr 4.0 N m Rting rmtre crrent 1 Arms Fig.7. Design vle of netrl point voltge flcttion ech opertion point. Fig.8. Simltion reslt of the vle of netrl point flcttion ech opertion mode vlidity of the sppression control method. Figre 10() shows the reslts withot the sppression control, netrl point voltge, phse voltge v, nd phse crrent i. Note tht the wveforms of v nd i re pplied with 1 D B

6 m 50 (rd/s) / div m 50 (rd/s) / div 0 rd/s 0 rd/s 0 A i q 0 A/div 0 A i q 0 A/div i d i d T 0 N m 1 (N m) / div T 0 N m 1 (N m) / div 5 V/div 5 V/div 10 V 10 V 0 ms 50 ms 100 ms 150 ms 00 ms 0 ms 50 ms 100 ms 150 ms 00 ms () mode 1 (b) mode m 50 (rd/s) / div m 50 (rd/s) / div 0 rd/s 0 rd/s 0 A i q 0 A/div 0 A i q 0 A/div i d i d T 1 (N m) / div T 1 (N m) / div 0 N m 5 V/div 0 N m 5 V/div 10 V 0 ms 50 ms 100 ms 150 ms 00 ms 0 ms 50 ms 100 ms 150 ms 00 ms (c) mode 3 (d) mode 4 Fig.9. Simltion wveforms chnging torqe or speed. 10 V low pss filter of ctoff freqency 1 khz. Figre 10(b) shows experimentl reslts with the sppression control method. Knowing from the, it is confirmed tht the sppression control sccessflly redced the voltge flcttion from 30V to 6V. The design method is lso evlted in term of experiment by sing the sme prototype. The cpcitnce vle cn be designed by sbstitting the bnd of netrl

7 point voltge Δ into (7). However, here, eqtion (7) is evlted by the voltge flcttion insted of the cpcitnce vle. Figre 11 shows the two wveforms for the netrl point voltge, -v line voltge v v when the modltion index is1.0 nd the lod power fctor cos is Low pss filter is pplied to ech wveform. Figres 11() nd 11(b) show the simltion wveforms nd experimentl wveforms, respectively. In the experimentl, the netrl point voltge consists of ripple de to the error on crrent detection nd ded time period. Δ in Fig.11 () nd (b) demonstrte tht the netrl point voltge is flctting t freqency three times thn the otpt freqency f inv. Figre 1 shows the reltionships between the voltge flcttion of the netrl point voltge nd the lod power fctor cos. The modltion index is kept 1.0, nd only the lod indctnce is vried. This opertion correspond the ccelertion with the flx-wekening control sch s mode 3 in Fig. 6. The solid line is the clclted reslt. The circle mrk nd tringle mrk re the simltion reslts nd experimentl reslts, respectively. The clclted reslts nd the simltion reslts show n pproximtely eql. On the other hnds, n error rte of 11.9% is between the clcltion nd the experimentl reslt t cos= however, the experimentl reslt is sppressed nder clcltion reslt. The error is becse of the inflence of the ded time. Similrly, Figre 13 shows the reltionship between the voltge flcttion of the netrl point voltge nd the modltion index. This opertion correspond the ccelertion with the i d = 0 control sch s mode in Fig. 6. The lod power fctor cos is kept The reslts between the clcltion nd experiment hve two kinds of errors. One is hppening t the rnge of modltion index exceeds 1.0, the experimentl reslts re vried from the clcltion reslts de to the sme reson. The other is the rnge of modltion index nder Error rtio between the clcltion nd experimentl reslt is 30% t = Tht is, experimentl reslt is more thn clcltion reslt. To exmine this cse, Figre 14 shows the experimentl wveforms t modltion index = 0.8. The otpt crrent of the inverter shows distortion. The verge of the netrl point voltge is designed to otpt t 100V. However, the experimentl reslt shows only 75V. The reson is which the lgorism of the sppression control does not feedbck the detection vle of netrl point voltge. Therefore, the imblnce of two it cpcitnce voltge cnnot be compensted. The imblnce wold be solved by pplying the blnce method sing the detection vle of the netrl point voltge [7]. VI. CONCLUSIONS In this pper, the design method of the cpcitnce with considering on the voltge strtion ws discssed () Withot sppression control (b) With sppression control Fig.10. Reslt of sppression control.( :1.0, cos: 0.847). 0 0 (V/div) v v (100V/div) (5V/div) v v (50V/div) () Simltion wveforms = 6.0V (b) Experimentl wveforms 0msec/div Fig.11. The wveforms of netrl point voltge nd otpt voltge when the modltion index is 1.0 nd Power fctor cos is

8 This pper proposed to is shown for minimize the volme of circit by minimizing the cpcitnce vle of threelevel inverter nd obtin high power density reslts. The cpcitnce vles re confirmed cn be minimized, which consists of the modltion index, the lod power fctor, nd the otpt freqency. The voltge flcttion from the nlysis reslts greed with tht of the experimentl reslts, which ws tested on 1-kW prototype circit. In ftre work, the design on the cpcitnce inclding the trnsient sttes will be considered. REFERENCES [1] Akir Nbe, Iso Tkhshi, Hirofmi Akgi, A New Netrl-Point-Clmped PWM Inverter, IEEE Trns., Vol.IA-17, No.5 pp (1981) [] Yooske Nkzw, Hro Nitoh, A New PWM Scheme for NPC Inverters Redcing Wveform Distortion csed by Plse Width Limittion nd New Netrl Point Voltge Control, IEEJ Trnsction on Indstril Appliction, Vol.116, No.4, pp (1996) [3] Stoshi Ogswr, No Swd, Hirohmi Akgi, Anlysis of the Netrl Point Potentil Vrition of Netrl-Point-Clmped Voltge Sorce PWM Inverters, IEEJ Trnsction on Indstril Appliction, Vol.113, No.1, pp (1993) [4] Kwbt T, Koym M., Tmi S., Fjii T., Uchid R., A New PWM Method of Three-Level Inverter Considering Minimm Plse Width nd Netrl Voltge Blnce Control, IEEJ Trnsction on Indstril Appliction, Vol.113, No.7, pp (1993) [5] Kk B., Miyshit I., Sone S., New PWM Method for Three-Level Inverter Bsed on Voltge Spce Vector Considering Sppression of Netrl Point Potentil Vrition, IEEJ Trnsction on Indstril Appliction, Vol.116, No.1, pp.4-49 (1996) [6] Rngrjn M. Tllm, Rjendr Nik, Thoms A. Nondhl, A Crrier-bsed PWM Scheme for Netrl- Point Voltge Blncing in Three-Level Inverters, IEEE Trns., Vol.41, No.6, pp (005) [7] Hkd S., Mtsmoto Y., Sgw A., Modeling nd Netrl-Point-Potentil Control of Netrl-Point-Clmped PWM Rectifiers sing n Optiml Regltor, IEEJ Trnsction on Indstril Appliction, Vol.119, No.1, pp (1999) Fig. 1. Reltionship between power fctor nd the voltge flcttion of netrl point with simltion reslts. Fig. 13. Reltionship between modltion fctor nd the voltge flcttion of netrl point with simltion reslts. Fig.14. Simltion reslt (Modltion index : 0.8,Power fctor cos: 0.847).

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