54F 74F138 1-of-8 Decoder Demultiplexer
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1 54F 74F138 1-of-8 Decoder Demultiplexer General Description The F138 is a high-speed 1-of-8 decoder demultiplexer This device is ideally suited for high-speed bipolar memory chip select address decoding The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three F138 devices or a 1-of-32 decoder using four F138 devices and one inverter Commercial Military Package Number Features Y Y Y Y Demultiplexing capability Multiple input enable for easy expansion Active LOW mutually exclusive outputs Guaranteed 4000V minimum ESD protection Package Description 74F138PC N16E 16-Lead (0 300 Wide) Molded Dual-In-Line 54F138DM (Note 2) J16A 16-Lead Ceramic Dual-In-Line November F138SC (Note 1) M16A 16-Lead (0 150 Wide) Molded Small Outline JEDEC 74F138SJ (Note 1) M16D 16-Lead (0 300 Wide) Molded Small Outline EIAJ 54F138FM (Note 2) W16A 16-Lead Cerpack 54F138LM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier Type C 54F 74F138 1-of-8 Decoder Demultiplexer Note 1 Devices also available in 13 reel Use suffix e SCX and SJX Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB Logic Symbols Connection Diagrams Pin Assignment for DIP SOIC and Flatpak Pin Assignment for LCC TL F IEEE IEC TL F TL F TL F TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9478 RRD-B30M75 Printed in U S A
2 Unit Loading Fan Out 54F 74F Pin Names Description U L Input I IH I IL HIGH LOW Output I OH I OL A 0 A 2 Address Inputs ma b0 6 ma E 1 E 2 Enable Inputs (Active LOW) ma b0 6 ma E 3 Enable Input (Active HIGH) ma b0 6 ma O 0 O 7 Outputs (Active LOW) b1 ma 20 ma Functional Description The F138 high-speed 1-of-8 decoder demultiplexer accepts three binary weighted inputs (A 0 A 1 A 2 ) and when enabled provides eight mutually exclusive active LOW outputs (O 0 O 7 ) The F138 features three Enable inputs two active LOW (E 1 E 2 ) and one active HIGH (E 3 ) All outputs will be HIGH unless E 1 and E 2 are LOW and E 3 is HIGH This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four F138 devices and one inverter (See Figure 1 ) The F138 can be used as an 8-output demultiplexer by using one of the active LOW Enable inputs as the data input and the other Enable inputs as strobes The Enable inputs which are not used must be permanently tied to their appropriate active HIGH or active LOW state Truth Table Inputs Outputs E 1 E 2 E 3 A 0 A 1 A 2 O 0 O 1 O 2 O 3 O 4 O 5 O 6 O 7 H X X X X X H H H H H H H H X H X X X X H H H H H H H H X X L X X X H H H H H H H H L L H L L L L H H H H H H H L L H H L L H L H H H H H H L L H L H L H H L H H H H H L L H H H L H H H L H H H H L L H L L H H H H H L H H H L L H H L H H H H H H L H H L L H L H H H H H H H H L H L L H H H H H H H H H H H L H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial 2
3 Logic Diagram TL F Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays 3
4 Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature b65 Ctoa150 C Ambient Temperature under Bias b55 Ctoa125 C Junction Temperature under Bias b55 Ctoa175 C Plastic b55 Ctoa150 C V CC Pin Potential to Ground Pin b0 5V to a7 0V Input Voltage (Note 2) b0 5V to a7 0V Input Current (Note 2) b30 ma to a5 0 ma Voltage Applied to Output in HIGH State (with V CC e 0V) Standard Output b0 5V to V CC TRI-STATE Output b0 5V to a5 5V Current Applied to Output in LOW State (Max) twice the rated I OL (ma) ESD Last Passing Voltage (Min) 4000V Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied Note 2 Either voltage limit or current limit is sufficient to protect inputs DC Electrical Characteristics Symbol Parameter 54F 74F Min Typ Max Recommended Operating Conditions Free Air Ambient Temperature Military Commercial Supply Voltage Military Commercial b55 Ctoa125 C 0 Ctoa70 C a4 5V to a5 5V a4 5V to a5 5V Units V CC Conditions V IH Input HIGH Voltage 2 0 V Recognized as a HIGH Signal V IL Input LOW Voltage 0 8 V Recognized as a LOW Signal V CD Input Clamp Diode Voltage b1 2 V Min I IN eb18 ma V OH Output HIGH 54F 10% V CC 2 5 I OH eb1ma Voltage 74F 10% V CC 2 5 V Min I OH eb1ma 74F 5% V CC 2 7 I OH eb1ma V OL Output LOW 54F 10% V CC 0 5 I V Min OL e 20 ma Voltage 74F 10% V CC 0 5 I OL e 20 ma I IH Input HIGH 54F 20 0 Current 74F 5 0 ma Max V IN e 2 7V I BVI Input HIGH Current 54F 100 Breakdown Test 74F 7 0 ma Max V IN e 7 0V I CEX Output HIGH 54F 250 Leakage Current 74F 50 ma Max V OUT e V CC V ID I OD Input Leakage Test Output Leakage Circuit Current 74F 4 75 V F 3 75 ma 0 0 I IL Input LOW Current b0 6 ma Max V IN e 0 5V I OS Output Short-Circuit Current b60 b150 ma Max V OUT e 0V I CCH Power Supply Current ma Max V O e HIGH I CCL Power Supply Current ma Max V O e LOW I ID e 1 9 ma All Other Pins Grounded V IOD e 150 mv All Other Pins Grounded 4
5 AC Electrical Characteristics 74F 54F 74F Symbol Parameter T A ea25 C T A V CC e Mil T A V CC e Com Fig V CC ea5 0V Units C L e 50 pf C L e 50 pf No C L e 50 pf Min Typ Max Min Max Min Max t PLH Propagation Delay t PHL A n to O n ns F 3 t PLH Propagation Delay t PHL E 1 or E 2 to O n ns F 4 t PLH Propagation Delay t PHL E 3 to O n ns F 4 FIGURE 1 Expansion to 1-of-32 Decoding TL F Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows Temperature Range Family 74FeCommercial 54FeMilitary Device Type Package Code P e Plastic DIP D e Ceramic DIP F e Flatpak L e Leadless Chip Carrier (LCC) S e Small Outline SOIC JEDEC SJ e Small Outline SOIC EIAJ 74F 138 S C X Special Variations QB e Military grade device with environmental and burn-in processing X e Devices shipped in 13 reel Temperature Range CeCommercial (0 Ctoa70 C) MeMilitary (b55 Ctoa125 C) 5
6 6
7 Physical Dimensions inches (millimeters) 20-Lead Ceramic Leadless Chip Carrier (L) NS Package Number E20A 7
8 Physical Dimensions inches (millimeters) (Continued) 16-Lead Ceramic Dual-In-Line Package (D) NS Package Number J16A 16-Lead (0 150 Wide) Molded Small Outline Package JEDEC (S) NS Package Number M16A 8
9 Physical Dimensions inches (millimeters) (Continued) 16-Lead (0 300 Wide) Molded Small Outline Package EIAJ (SJ) NS Package Number M16D 16-Lead (0 300 Wide) Molded Dual-In-Line Package (P) NS Package Number N16E 9
10 54F 74F138 1-of-8 Decoder Demultiplexer Physical Dimensions inches (millimeters) (Continued) 16-Lead Ceramic Flatpak (F) NS Package Number W16A LIFE SUPPORT POLICY NATIONAL S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or 2 A critical component is any component of a life systems which (a) are intended for surgical implant support device or system whose failure to perform can into the body or (b) support or sustain life and whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system or to affect its safety or with instructions for use provided in the labeling can effectiveness be reasonably expected to result in a significant injury to the user National Semiconductor National Semiconductor National Semiconductor National Semiconductor National Semiconductores National Semiconductor Corporation GmbH Japan Ltd Hong Kong Ltd Do Brazil Ltda (Australia) Pty Ltd 2900 Semiconductor Drive Livry-Gargan-Str 10 Sumitomo Chemical 13th Floor Straight Block Rue Deputado Lacorda Franco Building 16 P O Box D F4urstenfeldbruck Engineering Center Ocean Centre 5 Canton Rd 120-3A Business Park Drive Santa Clara CA Germany Bldg 7F Tsimshatsui Kowloon Sao Paulo-SP Monash Business Park Tel 1(800) Tel (81-41) Nakase Mihama-Ku Hong Kong Brazil Nottinghill Melbourne TWX (910) Telex Chiba-City Tel (852) Tel (55-11) Victoria 3168 Australia Fax (81-41) 35-1 Ciba Prefecture 261 Fax (852) Telex NSBR BR Tel (3) Tel (043) Fax (55-11) Fax (3) Fax (043) National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications
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DM7445 BCD to Decimal Decoders/Drivers General Description These BCD-to-decimal decoders/drivers consist of eight inverters and ten, four-input NAND gates. The inverters are connected in pairs to make
Features. Y Wide supply voltage range 3V to 15V. Y Guaranteed noise margin 1V. Y High noise immunity 0 45 VCC (typ )
MM54C00 MM74C00 Quad 2-Input NAND Gate MM54C02 MM74C02 Quad 2-Input NOR Gate Hex Inverter MM54C10 MM74C10 Triple 3-Input NAND Gate MM54C20 MM74C20 Dual 4-Input NAND Gate General Description These logic
DM74LS11 Triple 3-Input AND Gates
DM74LS11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which performs the logic AND function. Features n Alternate military/aerospace device (54LS11)
DM74LS02 Quad 2-Input NOR Gates
DM74LS02 Quad 2-Input NOR Gates General Description This device contains four independent gates each of which performs the logic NOR function. Features n Alternate Military/Aerospace device (54LS02) is
MM54HC173 MM74HC173 TRI-STATE Quad D Flip-Flop
MM54HC173 MM74HC173 TRI-STATE Quad D Flip-Flop General Description The MM54HC173 MM74HC173 is a high speed TRI-STATE QUAD D TYPE FLIP-FLOP that utilizes advanced silicongate CMOS technology It possesses
74F269 8-Bit Bidirectional Binary Counter
74F269 8-Bit Bidirectional Binary Counter General Description The 74F269 is a fully synchronous 8-stage up/down counter featuring a preset capability for programmable operation, carry lookahead for easy
DM7442A BCD to Decimal Decoders
DM7442A BCD to Decimal Decoders General Description These BCD-to-decimal decoders consist of eight inverters and ten, four-input NAND gates. The inverters are connected in pairs to make BCD input data
Features. Y Wide supply voltage range 3V to 15V. Y High noise immunity 0 45 VDD (typ ) Y Low power TTL compatibility Fan out of 2
CD40192BM CD40192BC Synchronous 4-Bit Up Down Decade Counter CD40193BM CD40193BC Synchronous 4-Bit Up Down Binary Counter General Description These up down counters are monolithic complementary MOS (CMOS)
MM54C14 MM74C14 Hex Schmitt Trigger
MM54C14 MM74C14 Hex Schmitt Trigger General Description The MM54C14 MM74C14 Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement
Quiet Series Octal D Flip-Flop with TRI-STATE Outputs
574 54ACTQ 74ACTQ574 Quiet Series Octal D Flip-Flop with TRI-STATE Outputs General Description The ACQ ACTQ574 is a high-speed low-power octal D- type flip-flop with a buffered Common Clock (CP) and a
MM54HC194 MM74HC194 4-Bit Bidirectional Universal Shift Register
MM54HC194 MM74HC194 4-Bit Bidirectional Universal Shift Register General Description This 4-bit high speed bidirectional shift register utilizes advanced silicon-gate CMOS technology to achieve the low
CD4070BM CD4070BC Quad 2-Input EXCLUSIVE-OR Gate CD4077BM CD4077BC Quad 2-Input EXCLUSIVE-NOR Gate
CD4070BM CD4070BC Quad 2-Input EXCLUSIVE-OR Gate CD4077BM CD4077BC Quad 2-Input EXCLUSIVE-NOR Gate General Description Employing complementary MOS (CMOS) transistors to achieve wide power supply operating
74AC138 74ACT138 1-of-8 Decoder/Demultiplexer
1-of-8 Decoder/Demultiplexer General Description The AC/ACT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The
Features. Y Low power TTL Fan out of 2 driving 74L. Y 5V 10V 15V parametric ratings. Y Symmetrical output characteristics
CD4001BM CD4001BC Quad 2-Input NOR Buffered B Series Gate CD4011BM CD4011BC Quad 2-Input NAND Buffered B Series Gate General Description These quad gates are monolithic complementary MOS (CMOS) integrated
Features. Y Wide supply voltage range 3 0V to 15V. Y High noise immunity 0 45 VDD (typ ) Y Low power TTL fan out of 2 driving 74L
CD4023BM CD4023BC Buffered Triple 3-Input NAND Gate CD4025BM CD4025BC Buffered Triple 3-Input NOR Gate General Description These triple gates are monolithic complementary MOS (CMOS) integrated circuits
MM54C221 MM74C221 Dual Monostable Multivibrator
MM54C221 MM74C221 Dual Monostable Multivibrator General Description The MM54C221 MM74C221 dual monostable multivibrator is a monolithic complementary MOS integrated circuit Each multivibrator features
74F579 8-Bit Bidirectional Binary Counter with 3-STATE Outputs
April 1988 Revised October 2000 74F579 8-Bit Bidirectional Binary Counter with 3-STATE Outputs General Description The 74F579 is a fully synchronous 8-stage up/down counter with multiplexed 3-STATE I/O
DM74LS90 DM74LS93 Decade and Binary Counters
DM74LS90 DM74LS93 Decade and Binary Counters General Description Each of these monolithic counters contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage
DM Quad 2-Input NAND Buffers with Open-Collector Outputs
September 1986 Revised July 2001 DM7438 7438 Quad 2-Input NAND Buffers with Open-Collector Outputs General Description This device contains four independent gates each of which performs the logic NAND
CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset
CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset General Description These dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-
74F538 1-of-8 Decoder with 3-STATE Outputs
1-of-8 Decoder with 3-STATE Outputs General Description The 74F538 decoder/demultiplexer accepts three Address (A 0 A 2 ) input signals and decodes them to select one of eight mutually exclusive outputs.