An Efficient Algorithm for Statistical Minimization of Total Power under Timing Yield Constraints

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1 19.1 An Effcent Algorthm for Statstcal Mnmzaton of otal Power under mng Yeld Constrants Murar Man 1, Anrudh Devgan 2, and Mchael Orshansky 1 1 Unversty of exas, Austn, 2 Magma Desgn Automaton ABSRAC Power mnmzaton under varablty s formulated as a rgorous statstcal robust optmzaton program wth a guarantee of power and tmng yelds. Both power and tmng metrcs are treated probablstcally. Power reducton s performed by smultaneous szng and dual threshold voltage assgnment. An extremely fast run-tme s acheved by castng the problem as a second-order conc problem and solvng t usng effcent nteror-pont optmzaton methods. When compared to the determnstc optmzaton, the new algorthm, on average, reduces statc power by 31% and total power by 17% wthout the loss of parametrc yeld. he run tme on a varety of publc and ndustral benchmarks s 3X faster than other known statstcal power mnmzaton algorthms. Categores and Subject Descrptors B.6.3 [Desgn Ads] General erms Algorthms, performance, desgn, relablty Keywords Leakage, manufacturablty, statstcal optmzaton 1. INRODUCION he ncrease n varablty of several key process parameters, such as transstor gate length and threshold voltage, sgnfcantly mpacts the desgn and optmzaton of low-power crcuts n the nanometer regme [1]. he growth of varablty can be attrbuted to multple factors, ncludng the dffculty of manufacturng control, the emergence of new systematc varaton-generatng mechansms, and most mportantly, the ncrease n fundamental atomc-scale randomness, such as the varaton n the number of dopants n the transstor channel [2]. he growth of standby, or leakage, power as devce geometres scale down has become an extremely urgent ssue. It s projected that at the 65nm node, leakage power wll account for 45% of total power of the crcut [3]. hs trend can be attrbuted prmarly to the exponental dependence of leakage current on threshold voltage of the devce. hs exponental dependence also causes a large spread n leakage current n the presence of process varatons. It has been demonstrated that a 1.3X varaton n the effectve channel length could potentally lead to 2X varaton n leakage current [4]. Permsson to make dgtal or hard copes of all or part of ths work for personal or classroom use s granted wthout fee provded that copes are not made or dstrbuted for proft or commercal advantage and that copes bear ths notce and the full ctaton on the frst page. o copy otherwse, or republsh, to post on servers or to redstrbute to lsts, requres pror specfc permsson and/or a fee. DAC 25, June 13 17, 25, Anahem, Calforna, USA. Copyrght 25 ACM /5/6 $5.. Low power desgns are especally vulnerable as low V th devces exhbt larger senstvty to varaton. On the other hand, hgh performance parts are vulnerable as they tend to have hghest leakage power leadng to large yeld loss n the hgh performance bn [11]. Post-synthess crcut optmzaton technques, such as szng and dual-v th allocaton, are effectve n reducng leakage, and have been wdely explored n a determnstc settng [5-7]. Whle relyng on dfferent mplementaton strateges, all of these technques essentally trade the slack of non-crtcal paths for power reducton by ether downszng the transstors or gates or settng them to a hgher V th. In the past, case-fles have been used wth such optmzaton methods to guarantee that the crcut s optmzed whle guaranteeng a specfc yeld pont. he rse of uncorrelated ntra-chp varablty [1] results n the breakdown of the case-fle based approach to handlng varablty n optmzaton as t becomes mpossble to come up wth a case fle that wll guarantee a specfc yeld pont. hs requres the ntroducton of fully statstcal optmzaton technques that can handle the varance of objectve and constrant functons explctly durng optmzaton. Gven the exponental dependence of leakage power on the hghly varable transstor channel length and threshold voltage, t can be expected that the ntroducton of rgorous statstcal optmzaton wll sgnfcantly reduce the leakage power consumpton. Whle much work has been done recently to develop statstcal tmng analyss methods [8], very lttle work has been done to account for varablty n crcut optmzaton [9-11]. In [11], an teratve ILOS-lke approach of [5], selectng the transstor to modfy one at a tme, s extended to rely on statstcal senstvtes. Because of a heurstc problem formulaton, t s not apparent how to control the requred yeld levels by adjustng the margn of the senstvty varables. he algorthm also has a hgh run-tme. In [9], a heurstc way of preventng a buld-up of path delays near the crtcal path s proposed, but s not based on rgorous statstcal formulaton. Several statstcal szng algorthms have also appeared but are concerned wth tmng rather than power-lmted yeld [12-14]. In ths paper we descrbe a new rgorous statstcal algorthm for total power mnmzaton. o our knowledge, ths s the frst attempt to solve the statstcal leakage mnmzaton problem usng a theoretcally rgorous formulaton. It s also amenable to a hghly effcent computatonal mplementaton. A two phase approach based on optmal delay budgetng and slack utlzaton, akn to [7], s used. he delay budgetng phase s formulated as a robust verson of the power-weghted lnear program that assgns slacks based on power-delay senstvtes of gates. We explctly ncorporate the noton of varablty n delay and power due to process varatons nto the optmzaton, by settng an uncertan 39

2 robust lnear program. he varance of delay and power, assumed to be due to channel length and threshold voltage varaton, s mapped to the varance of the senstvty vector. he statstcal (robust) lnear program s cast nto a second order conc program that can be solved effcently. he slack assgnment s nter-leaved wth the confguraton selecton whch optmally redstrbutes slack to the gates n the crcut to mnmze total power savngs. Across the publc and ndustral benchmarks, the leakage and total power, when compared to a determnstc soluton under the same tmng performance, are on average, 31% and 17% lower respectvely. he robust LP s solved usng effcent nteror-pont methods, whch are far superor to general non-lnear solvers. As a result, the algorthm has extremely good run-tme, provdng a 3X speed-up compared to another known statstcal leakage reducton algorthm [11]. he rest of the paper s organzed as follows. In secton 2, we present the power and delay models and ntroduce the determnstc slack assgnment problem. he statstcal optmzaton flow s descrbed n detal n secton 3. Secton 4 presents the expermental results of runnng the algorthm on the benchmark crcuts and secton 5 presents the concluson. 2. POWER MINIMIZAION BY LINEAR PROGRAMMING he determnstc algorthm for power mnmzaton s a twophase teratve relaxaton scheme. he nput to the frst phase s a crcut szed for maxmum slack usng a transstor (gate) szng algorthm, such as ILOS [15], wth all the devces set to low V th.. hs crcut has the hghest possble power consumpton of any crcut realzaton. he avalable slack s then optmally dstrbuted to the gates based on the power-delay senstvtes: that s, the slack s allocated n a way that maxmzes the power reducton. he second phase conssts of a local search among gate confguratons n the lbrary, such that slack assgned to gates n prevous phase s utlzed for power reducton. he dea of usng power-delay senstvty of a crcut as an optmzaton crteron s tself well known [16]. A lnear measure of gate s power-delay senstvty s power reducton per unt of added delay: (1) s = P/ D he power reducton for an added delay d () s then gven by sd () (). For example, a node drvng a node wth large fan-out wll have a hgher senstvty than a small fan-out node. hus, a unt of added slack to a node wth a hgher senstvty wll lead to the greater power reducton. We rely on extendng ths concept to effcent optmzaton based on large-scale lnear programmng by convertng a power mnmzaton problem nto a power-weghted slack redstrbuton. Let a gate confguraton be any vald assgnment of szes and threshold voltages to transstors n a gate n the lbrary. For any fxed load, a set of Pareto ponts n the power-delay space can be dentfed among all the possble confguratons (Fgure 1). A power optmal soluton wll contan only the Pareto-optmal gate confguratons. he trade-offs between delay and both leakage and dynamc power can be captured n tables, parameterzed by the capactve load. For each of the Pareto-optmal gate confguratons, the decrease n power consumpton ( P ) and the change n delay ( D ) are calculated. For example, we may compute the senstvty of changng the gate from all transstors havng low V th to the confguraton where all transstors have hgh V th. Usng ths framework, a lnear program can be formulated to dstrbute slack to gates wth the objectve of maxmzng total power reducton whle satsfyng the delay constrants on the crcut: max sd (2) s.. t A Aj + d + d, for j FI() Ao RA, for o PO, d δd Here A s the arrval tme at node, RA s the requred arrval tme at the prmary output, d s the delay of the gate n the crcut confguraton obtaned by szng for maxmum slack and d s the addtonal slack assgned. he algorthm s constructed as an teratve-relaxaton method. At ts core s an nterleaved sequence of () optmal slackredstrbuton usng LP, and () the local search over the gate confguraton space to dentfy a confguraton that wll absorb the assgned slack. Selecton of optmal confguratons s done ndependently for each gate. It has been shown that when the confguraton space s contnuous, and delay s a monotonc and separable functon, such a procedure s optmal for small ncrements of slack assgnments δ d [17]. Also, the senstvty vector s accurate wthn a narrow range of delay, requrng movng towards the soluton under small slack ncrements. Even though the confguraton space generated by V th assgnments s dscrete, the ablty to sze transstors n a contnuous manner permts treatng as contnuous. hs ensures that a confguraton exactly utlzng the slack allotted n the slack assgnment phase can be found. Power (µw) he confguraton space and the Pareto-optmal ponts for a NAND2 gate drvng two capactve loads Delay (ps) Fgure 1: An example of a confguraton space. Determnstc power mnmzaton : Sze the crcut for maxmum slack under all low Vth 1: Compute senstvtes for each gate 2: Solve lnear program to optmally allocate slack 3: Fnd gate confguratons to mnmze power for gven slack 4: Check tmng 5: If crcut meets tmng go to Step 1 Fgure 2: he pseudo-code for the determnstc power mnmzaton algorthm based on lnear programmng. 3. SAISICAL DELAY AND POWER MODELS In ths work we are concerned wth handlng two prmary sources of varablty: effectve channel length (L eff ) and gate-length ndependent varaton of threshold voltage (V th ). From a physcal pont of vew, ths later source of varablty wll be prmarly due 31

3 to random dopant fluctuaton. hese parameters have sgnfcant mpact on tmng (L eff ) and leakage power (V th ). An addtve statstcal model that decomposes the varablty, of both L eff and V th, nto the ntra-chp and chp-to-chp varablty components s used. For gate length, Leff = L + Lnter + Lntra Both L eff and V th are assumed to be Gaussan random varables, whch s n agreement wth emprcal data [1]. he relatve magntudes of the ntra- and nter-chp components can be controlled by adjustng ther varances ( σl = σnter + σntra ) In keepng wth the determnstc optmzaton algorthm, the statstcal optmzaton wll rely on the power-delay senstvty vector. he mpact of varablty on delay and power s captured by statstcally characterzng a standard cell lbrary, n whch two V th levels and several dscrete gate szes are assumed to form the cell confguraton space. he varance and covarance of the power-delay senstvty coeffcents are characterzed statstcally usng Monte-Carlo smulaton for all the cells n the lbrary. he characterzaton provdes the numercal values of the vector of mean senstvtes, s, and the covarance matrx Σ of s. In order to formulate the statstcal optmzaton problem rgorously, however, we need to establsh some theoretcal propertes of the random senstvty vector. We assume that a frst-order aylor expanson of the gate delay functon s adequate: dg dg( Lo, Vtho) + ( dg / L) L + ( dg / Vth) Vth Under ths model, the delay s Gaussan. Dynamc power consumpton s very weakly dependent on the varaton of V th and L eff, thus we gnore t. It was shown n [18], that an emprcal cl 1 cv 2 th leakage power model Pleak = coe wth constants c, c 1 and c 2 can be used to accurately descrbe the varaton n leakage power. Under ths model, the leakage power, and hence, total power P s a log-normal random varable. he senstvty coeffcent can be wrtten as s = P/ d. hen, by chan rule s can be wrtten as s = P/ d cl cv 2 = ce th ( + ) c1( dg / L) c2( dg / Vth) It can be seen from the above equaton that, because L and V th are normal random varables, s follows a log-normal dstrbuton. In the presence of non-zero nter-chp varablty and spatal ntrachp varablty, the senstvty coeffcents are correlated. Because the optmzaton s easer to set up when the senstvtes are uncorrelated, Prncpal Component Analyss (PCA) s used to transform the orgnal vector of senstvtes nto one wth a dagonal covarance matrx. hs transformaton handles both sources of cell correlaton. Gven the covarance matrx Σ of the vector of senstvtes s, PCA obtans the vector of prncpal components s '. hen, the senstvtes are expressed n terms of ther uncorrelated prncpal components [19]: s = s + As' where, s s the vector of mean senstvtes and the matrx A s the egenvector matrx of Σ. 4. SAISICAL POWER OPIMIZAION In ths secton, a rgorous statstcal equvalent for the power mnmzaton strategy s descrbed. o handle varablty of process parameters, the problem s reformulated as a robust lnear program and solved usng effcent nteror-pont convex methods. he essental contrbuton of ths paper s the formulaton of a rgorous statstcal equvalent of the slack assgnment usng the noton of robust lnear programmng. Robust optmzaton s concerned wth ensurng the feasblty and optmalty of the soluton under all permssble realzatons of the coeffcents of the objectve and constrant functons [2]. A further contrbuton s an explct ncorporaton of uncertanty n a formulaton that s amenable to hghly effcent computaton. When formulatng a statstcal power mnmzaton problem, we fnd that an equvalent formulaton of (2), whch places the power weghted slack vector nto the constrant set, s more convenent. Suppose that P max s the ntal maxmum power, ˆP s the optmal power acheved by (2) at a specfc RA, and ˆd 1 the vector of optmal allocated slacks. he followng optmzaton problem (3) s equvalent to (2): mn d st.. ˆ (3) sd Pmax P Ao RA, for o PO A Aj + d + d, for j FI( ) hat s, f ˆd 2 denotes allocated slacks for (3), t can be shown thatdˆ ˆ 1= d 2, and Pd ( ˆ ˆ 1)= Pd ( 2) s a mnmum power soluton at the specfed RA. he reason s that (3) forces the LP to place a premum on the total slack and assgn more slack to gates wth hgher senstvty n order to meet the power constrant. he statstcal equvalent of (3) s now formulated by probablstcally treatng the uncertanty of the senstvty vector and of tmng constrants: mn d st.. P( sd Pmax Pconst} ) η (4) PA ( o RA) ζ for o PO A Aj + d + d, for j FI( ) Here, the determnstc constrants have been transformed nto the probablstc constrants. hese probablstc constrants set respectvely the power-lmted parametrc yeld, η, and the tmng-lmted parametrc yeld, ζ. Based on the formulaton of the model of uncertanty, they capture the uncertanty due to process parameters va the uncertanty of power and delay metrcs. We now transform both probablstc nequaltes such that they can be effcently handled by the avalable optmzaton methods. he challenge s to handle these nequaltes analytcally, n closed form. We frst consder tmng constrants. he probablstc tmng constrants n (4) are now transformed such that the resultng expresson stll guarantees achevng the specfed parametrc yeld level. Because of typcally postve correlaton between paths delays PD ( t D t) PD ( t) j 311

4 hen, f we mpose the constrant that PD ( RA) ζ on every path, t ensures that the orgnal tmng constrant P( Ao RA) ζ s met. hs s the smplest approach. It s possble to apply a heurstc approach to adjustng the pathdependent coeffcents, such that the conservatsm s reduced. he probablstc tmng constrants can be represented by a percent pont functon: (5) D + φ 1 ( ζ) σd RA where σ at o s the standard devaton of the th path at output o. In order to reduce the number of constrants and ncrease the sparsty of the constrant matrces, we further transform the path based constrants nto node based constrants. In [21] t s shown that good results can be acheved by usng a heurstc method of modelng the node delays wthd + φ 1 () ζ σ d, where σ s the d standard devaton of the gate delay d. hs fnally permts us to formulate the probablstc tmng constrant: Ao RA, for o PO (6) 1 A Aj + d + φ () ζ σ d + d, for () j FI We now have to handle the probablstc power constrant n (4). Lettng u = sd = s d, P = Pmax Pconst, and η ' = 1 η, we can re-wrte the probablstc constrant as P(lnu ln P) η '. In secton 3 we have shown that u can 2 be modeled as a lognormal random varable. If u ~ LN( m, δ ), 2 then, ln u ~ N ( µ, σ ). Now, f the mean of u s m and the standard devaton of u s δ, then, 2 2 (7) µ = ln ( m / m + δ ), σ = ln(1 + m / δ ) he translaton-nvarance property of a normal dstrbuton can be used to express P(lnu ln P) η ' as lnu µ ln P µ (8) P( ) η ' σ σ Snce (ln u µ )/ σ ~ N(,1), lettng φ() be the cdf of N (,1), P(lnu ln P) η ' s φ ((ln P µ )/ σ) η', and fnally: µ + φ 1 ( η') σ ln( P) Usng the above relatonshps between m and µ, and σ and s, we can fnally express the probablstc constrants as ln ( m / m + δ ) (9) φ ( η') ln(1 + m / δ ) ln P he advantage of our formulaton s the ablty to take nto account uncertanty of the constrant functon explctly. Indeed, the mean of u s m = E( s d) = s d, and the varance s 2 δ = d Σ d, where Σ s the covarance matrx of the vector of senstvtes s. Usng the above non-lnear probablstc constrant, however, would requre solvng a non-lnear optmzaton problem whch s computatonally expensve. However, we can reformulate ths problem as a second-order conc program (SOCP) that can be solved effcently. In general, an SOCP conssts of mnmzng a lnear functon over the convex set descrbed by the ntersecton of an affne space wth one or more second-order cones. From (9) we can defne: f ( m, δ, k) = ln( m / m + δ ) φ ( η') ln(1 + m / δ ) o formulate (4) as an SOCP, we need a percent pont functon whch s lnear n m and δ. Lettng k = φ 1 ( η'), a least square of ft of f onto the lnear functon f of the form can be performed: f ( m, δ, k) = ( a1 + a2k) m + ( a3 + a4k) δ were a, b, c, e are the fttng coeffcents. hs ft s justfed as the rms error s ~5%. he constrant (9) can now be re-wrtten as: (1) ( a + a k) s d + ( a + a k) d Σd ln P Usng (9), we can formulate the SOCP as: mn d (11) j φ () ζ σ d, o st.. ( a + a k) s d + ( a + a k) d Σd ln P A A + d + + d A RA he optmzaton problem (11) has a specal structure that can be exploted to result n very fast optmzaton. he reason s that the constrants n (11) are second-order conc functons that can be effcently optmzed by the nteror pont methods [2]. Because the second-order conc programs are convex [22], they guarantee a globally optmal soluton. he relance on nteror-pont methods means that the computatonal complexty of solvng ths 1.3 non-lnear program s close to ON ( ) n the sze of the crcut. he second phase of the power mnmzaton algorthm s OkN ( ), where k s the number of alternatves n the gate confguraton space. hus, the overall complexty of our statstcal power mnmzaton algorthm s close to lnear. 5. IMPLEMENAION AND RESULS he algorthm was mplemented n C as a pre-processng module to nterface wth a commercal conc solver avalable as part of MOSEK [23]. he benchmark crcuts were syntheszed to a cell lbrary that was characterzed for a 7 nm process usng Berkeley Predctve echnology Model [24]. Gates have dscrete szes, rangng from 1x to 8x of mnmum sze. It s assumed that granularty of V th allocaton s at the NMOS/PMOS stack level. For NMOS (PMOS) transstors, the hgh threshold voltage s.2v (-.2V) and the low threshold voltage s.1v (-.1V). Dfferent levels of varablty n L eff were explored rangng from 3% to 8% of σ / µ. It s assumed that σ Vth of a gate s nversely proportonal to ts sze, and gate-length ndependent V th varaton s due to random dopant placement. Pelgrom s model [25] s used to descrbe σ Vth dependence on transstor sze. he assumed magntude of V th varablty s σ / µ = 7%. he mean and covarance matrx of cell senstvtes were computed for all gate confguratons usng SPICE. Prncpal component analyss was used to orthogonalze the covarance matrx of cell senstvty coeffcents. he performance and run-tme behavor of the optmzaton algorthm s valdated on the publc ISCAS'85 benchmark crcuts and several ndustral blocks. All comparsons are done for the same arrval tme at the prmary output. hs can be acheved by performng the determnstc power optmzaton usng statstcal tmng constrants. Determnstc optmzaton under the worst-case condtons s assumed to result n 1% yeld. Across the benchmarks results ndcate that the savngs of, on average, 33% n leakage power wthout the loss of tmng or power yeld can acheved by statstcal optmzaton as opposed to the determnstc approach, able 1. he level of L eff varablty s assumed to be σ / µ = 8%. In the table, n s the number of gates 312

5 able 1: Power savngs obtaned by determnstc and statstcal optmzatons at dfferent yeld levels. n mng yeld ζ = 99.9%, Power yeldη = 99.9% mng yeld ζ = 84%, Power yeld η = 99.9% Determnstc Optmzaton Statstcal Optmzaton Savngs n Power (%) Determnstc Optmzaton Statstcal Optmzaton Savngs n Power (%) Statc otal Statc otal Statc otal Statc otal Statc otal Statc otal sc_vlogc sc_nc sc_edcs c c c c c c c c c Average savngs Run me (s) n the crcut, and Statc and otal refer to statc and total power n µw respectvely. able 1 also documents the run-tme behavor of the statstcal optmzaton algorthm. For the largest benchmark the run-tme s of the order of a few (~4) mnutes. It compares very favorably wth exstng approaches, yeldng a 3X speedup compared to [11]. It s pertnent to menton that the speedup s obtaned due to the specal structure of the SOCP program that s not avalable to the general non-lnear solvers enablng the optmzaton problem to be solved extremely effcently. he fundamental reason for the reducton n power enabled by statstcal optmzaton s the ablty of the statstcal algorthm to explctly account for the varance of constrant and objectve functons. hs can be attrbuted to the fact that the statstcal optmzaton allots slack more effcently. One manfestaton of the superorty of statstcal optmzaton s the fact that t can assgn more transstors to a hgh V th. For example for the C432 benchmark optmzed for a target delay of.55ns for 99.9% tmng and power yelds, the number of transstors set to hgh V th by the statstcal algorthm s 2% more than the correspondng number for the determnstc algorthm. As a result, the spread of the leakage dstrbuton s reduced and the mean s shfted towards lower values. Fgure 3 shows the pdf of statc power obtaned by a Monte Carlo smulaton of the crcut confguratons produced by the statstcal and determnstc optmzatons. Both the mean and varance of statc power for the determnstcally optmzed crcut are greater, whch mples that the statc power savngs ncrease at hgher percentles. he superorty of statstcal optmzaton over the determnstc optmzaton s llustrated n Fgure 4. Under the same power and tmng yeld constrants ( ζ = η = 99.9%), statstcal optmzaton produces unformly better powerdelay curves. he mprovement strongly depends on the underlyng structure of physcal process varaton. As the amount of uncorrelated varablty ncreases,.e. the ntra-chp component grows n comparson wth the chp-to-chp component, the power savngs enabled by statstcal optmzaton ncrease. he power savngs at the 95 th percentle are 23%, and those at 99 th percentle are 27% respectvely. he ablty to drectly control the level of parametrc power and tmng lmted yeld permts choosng a sweet spot n the powerdelay space. Fgures 5-6 show a set of power-delay curves for one of the benchmarks, c432. Fgure 5 plots the total power vs. delay at the output obtaned by runnng the statstcal optmzaton for varous tmng yeld levels ( ζ ), wth the power yeld set at 99.9%. It can be observed that at tght tmng constrants the dfference n power optmzed for dfferent yeld levels s sgnfcant. Fgure 6 confrms that optmzng the crcut for a lower power yeld wll lead to hgher total power consumpton and longer delay. For the same yeld, the trade-off between power and arrval tme s much more marked at tghter tmng constrants. he raw magntude of varablty of physcal parameters s clearly mportant to assessng the effectveness of statstcal optmzaton. If the varance of L eff s reduced to σ / µ = 3%, the savngs are smaller. Stll, about 15% of savngs n total power can be acheved at tghter tmng constrants. Frequency Statc Power ( µw ) Statstcal Optmzaton Determnstc Optmzaton Fgure 3. PDFs of statc (leakage) power produced by a Monte- Carlo smulaton of the benchmark crcut (C432) optmzed by the determnstc and statstcal algorthms. 313

6 6. CONCLUSION In ths paper we have presented a novel statstcal algorthm for total power mnmzaton that s based on a rgorous analytcal formulaton. We demonstrate that across the benchmarks our algorthm acheves sgnfcant reducton n statc and total power. he algorthm also exhbts run-tme that s substantally better than other known statstcal algorthms. 7. ACKNOWLEDGEMENS hs research was supported by SRC, GSRC, NSF, SUN, and Unversty of exas. otal Power (µw) Determnstc optmzaton Statstcal: nter and ntra-chp varaton Statstcal: all ntra-chp varaton Delay (ns) Fgure 4: Power-delay curves for 99.9% tmng and power yeld. Statstcal optmzaton does unformly better. For the case of mxed nter- and ntra-chp varablty, an equal breakdown s assumed. 99.9% Power (µw) 99.9% Delay (ns) Delay (ns) Power Yeld = 99.9% Power Yeld = 95.4% Power Yeld = 84.% otal power (µw) mng yeld = 99.9% mng yeld = 95% mng yeld = 84% Fgure 5: Power-delay curves at dfferent tmng yeld levels for the C432 benchmark. At larger delay, the power penalty for hgher yeld s smaller. Fgure 6: Power-delay curves at dfferent power lmted yelds. otal Power (µw) Determnstc: σ/µ = 1% Statstcal: σ/µ = 1% Determnstc: σ/µ = 3.3% Statstcal: σ/µ = 3.3% Delay (ns) Fgure 7: Power-delay curves for dfferent levels of varablty. 8. REFERENCES [1] C. Vsweswarah, Death, taxes and falng chps, Proc. of DAC 23, pp [2] Y. aur et al., CMOS scalng nto the nanometer regme, Proc. of the IEEE, no. 4, 1997, pp [3] R. Brodersen et al., Methods for rue Power Mnmzaton, n Proc. of ICCAD, 22, pp [4] S. Borkar et al., Parameter varaton and mpact on Crcuts and Mcroarchtecture, Proc. of DAC, 23, pp [5] S. Srchotyakul et al., Stand-by power mnmzaton through smultaneous threshold voltage selecton and crcut szng, Proc. of DAC, 1999, pp [6] Q. Wang, and S. Vrudhula, Statc power optmzaton of deep submcron CMOS crcut for dual V th technology, Proc. of ICCAD, 1998, pp [7] D. Nguyen et al., Mnmzaton of dynamc and statc power through jont assgnment of threshold voltages and szng optmzaton, Proc. of ISLPED, 23, pp [8] H. Chang and S. Sapatnekar, Statstcal tmng analyss consderng spatal correlatons usng a sngle PER-lke traversal, Proc. of ICCAD, 23, pp [9] X. Ba et al., Uncertanty aware crcut optmzaton, Proc. of DAC, 22, pp [1] S. Raj et al., A methodology to Improve mng Yeld, Proc. of DAC, 24, pp [11] A. Srvastava, D. Sylvester, and D. Blaauw, Statstcal optmzaton of leakage power consderng process varatons usng dual-v th and szng, Proc. of DAC, June 7-11, 24 pp [12] E. Jacobs and M. Berkelaar, Gate szng usng a statstcal delay model, Proc. of DAC, 2, pp [13] P. Seung et al., Novel szng algorthm for yeld mprovement under process varaton n nanometer technology, Proc. of DAC, 24, June 7-11, 24, pp [14] M. Man and M. Orshansky, A new statstcal optmzaton algorthm for gate szng, Proc. of ICCD, 24, pp [15] J. Fshburn and A. Dunlop, ILOS: A Posynomal Programmng Approach to ransstor Szng, Proc. of ICCAD, 1985, pp [16] D. Markovc et al., Methods for true energy-performance optmzaton, J. of Sold-State Crcuts, 24, pp [17] V. Sundararajan et al., Fast and Exact ransstor szng Based on Iteratve Relaxaton, IEEE rans. on CAD, vol. 21, 22, pp [18] J. Kao et al., Subthreshold Leakage Modelng and Reducton echnques, Proc. of ICCAD, 22, pp [19] C. Chatfeld, Introducton to Multvarate analyss, Chapman and Hall, 198. [2] S. Boyd, L. Vandenberghe, Convex Optmzaton, Cambrdge, 24. [21] Km et al., A Heurstc for Optmzng Stochastc Actvty Networks wth Applcatons to Statstcal Crcut Szng, preprnt. [22] A. Prekopa, Stochastc Programmng, Kluwer Academc, 1995 [23] [24] Y. Cao et al., New paradgm of predctve MOSFE and nterconnect modelng for early crcut desgn, Proc. of IEEE CICC, 2, pp [25] M. Pelgrom et al., Matchng Propertes of MOS ransstors, IEEE Journal of Sold-State Crcuts, vol. 24, 1989, pp