ICM7226A ICM7226B 8-Digit Multi-Function Frequency Counter/Timers

Size: px
Start display at page:

Download "ICM7226A ICM7226B 8-Digit Multi-Function Frequency Counter/Timers"

Transcription

1 Dmr 99 SEMICONDUCTOR ICMA ICMB -Diit Multi-Funtion Frquny Countr/Timrs Fturs CMOS Dsin or Vry Low Powr Output Drivrs Dirtly Driv Both Diits n Smnts o Lr Diit LED Displys Msurs Frqunis rom DC to 0MHz; Prios rom 0.µs to 0s Stl Hih Frquny Osilltor uss ithr MHz or 0MHz Crystl Both Common Ano n Common Ctho Avill Control Sinls Avill or Extrnl Systms Intrin Multiplx BCD Outputs Applitions Frquny Countr Prio Countr Unit Countr Frquny Rtio Countr Tim Intrvl Countr Orrin Inormtion PART NUMBER TEMPERATURE RANGE PACKAGE ICMAlJL - o C to + o C 0 L Crmi DIP ICMBlPL - o C to + o C 0 L Plsti DIP Dsription Th ICM is ully intrt Univrsl Countr n LED isply rivr. It omins hih rquny osilltor, tims ountr, n - t ountr n lths, -smnt or, iit multiplxr n smnt n iit rivrs whih n irtly riv lr LED isplys. Th ountr inputs pt mximum rquny o 0MHz in rquny n unit ountr mos n MHz in th othr mos. Both inputs r iitl inputs. In mny pplitions, mpliition n lvl shitin will rquir to otin propr iitl sinls or ths inputs. Th ICM n untion s rquny ountr, prio ountr, rquny rtio ( A / B ) ountr, tim intrvl ountr or s totlizin ountr. Th vis rquir ithr 0MHz or MHz qurtz rystl tims, or i sir n xtrnl tims n lso us. For prio n tim intrvl, th 0MHz tims ivs 0.µs rsolution. In prio vr n tim intrvl vr, th rsolution n in th nnoson rn. In th rquny mo, th usr n slt umultion tims o 0.0s, 0.s, s n 0s. With 0s umultion tim, th rquny n isply to rsolution o 0.Hz. Thr is 0.s twn msurmnts in ll rns. Control sinls r provi to nl tin n storin o prslr t. Lin zro lnkin hs n inorport with rquny isply in khz n tim in µs. Th isply is multiplx t 00Hz rt with.% uty yl or h iit. Th ICMA is sin or ommon no isplys with typil pk smnt urrnts o ma, n th ICMB is sin or ommon tho isplys with typil smnt urrnts o ma. In th isply o mo, oth iit rivrs n smnt rivrs r turn o, llowin th isply to us or othr untions. CAUTION: Ths vis r snsitiv to ltrostti ishr. Usrs shoul ollow propr I.C. Hnlin Prours. Copyriht Hrris Corportion 99 - Fil Numr 9

2 Pinouts ICMA COMMON ANODE (CDIP) TOP VIEW CONTROL B MEASUREMENT IN PROGRESS STORE BCD BCD SEG SEG SEG V SS SEG SEG SEG SEG BCD BCD RST EXT IN A 9 HOLD BUF OSC OUT NC (NOTE ) OSC OUT OSC IN NC (NOTE ) EXT OSC IN RST OUT EXT RANGE 0 D 9 D D D D D D D RANGE ICMB COMMON CATHODE (PDIP) TOP VIEW CONTROL B MEASUREMENT IN PROGRESS STORE BCD BCD D D D D V SS D D D D BCD BCD RST EXT IN A 9 HOLD BUF OSC OUT NC (NOTE ) OSC OUT OSC IN NC (NOTE ) EXT OSC IN RST OUT EXT RANGE 0 OUT 9 SEG SEG SEG SEG SEG SEG SEG RANGE NOTE:. For mximum rquny stility, onnt to or V SS -

3 Funtionl Blok Dirm EXT OSC OSC OSC OUTPUT BUF OSC OUTPUT RESET OSC SELECT DECODER DIGIT DRIVERS REFERENCE COUNTER +0 RANGE CONTROL LOGIC STORE 0 RANGE OR 00Hz EXT RANGE AND RESET SELECT 0 LOGIC LOGIC CONTROL LOGIC DIGIT OUTPUTS () RANGE CONTROL A B CONTROL LOGIC MAIN RESET EN COUNTER CL 0 OVERFLOW LOGIC EXT DATA LATCHES OUTPUT MUX STORE CONTROL LOGIC D CL MAIN FF DECODER SEGMENT & LZB DRIVERS LOGIC SEGMENT OUTPUTS () R FN CONTROL LOGIC BCD OUTPUTS () MEAS IN PROGRESS OUTPUT HOLD RESET OUTPUT STORE OUTPUT -

4 Asolut Mximum Rtins Mximum Supply Volt ( - V SS ) V Mximum Diit Output Currnt mA Mximum Smnt Output Currnt mA Volt On Any Input or Output Trminl (Not ) ( +0.V) to (V SS -0.V) Stor Tmprtur Rn o C to +0 o C L Tmprtur (Solrin 0s) o C Spiitions Thrml Inormtion Thrml Rsistn θ JA θ JC Crmi DIP Pk o C/W o C/W Plsti DIP Pk o C/W - Juntion Tmprtur Crmi DIP Pk o C Plsti DIP Pk o C Oprtin Tmprtur Rn o C to + o C CAUTION: Strsss ov thos list in Asolut Mximum Rtins my us prmnnt m to th vi. This is strss only rtin n oprtion o th vi t ths or ny othr onitions ov thos init in th oprtionl stions o this spiition is not impli. Eltril Spiitions =.0V, T A = + o C, Unlss Othrwis Spii PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Oprtin Supply Currnt, I DD Disply O, Unus Inputs to V SS - ma Supply Volt Rn ( -V SS ), V SUPPLY - o C < T A < + o C, A, B Frquny t MAX. -.0 V Mximum Frquny A, Pin 0, A(MAX) Mximum Frquny B, Pin, B(MAX) Minimum Sprtion A to B, Tim Intrvl Funtion Osilltor Frquny n Extrnl Osilltor Frquny, OSC - o C < T A < + o C.V < <.0V, Fiur 9 Funtion = Frquny, Rtio, Unit Countr 0 - MHz Funtion = Prio, Tim Intrvl. - - MHz - o C < T A < + o C.V < <.0V, Fiur 0 - o C < T A < + o C.V < <.0V, Fiur - o C < T A < + o C.V < <.0V. - - MHz ns MHz Osilltor Trnsonutn, M -.V, T A = + o C µs Multiplx Frquny, MUX OSC = 0MHz Hz Tim Btwn Msurmnts OSC = 0MHz ms Input Rt o Chr, V IN /t Inputs A, B - - mv/µs Input Volts: Pins, 9,, 9, 0, Input Low Volt, V IL - o C < T A < + o C V Input Hih Volt, V lh. - - V Pins, 9, 0, Input Lk, A, B, I ILK µa Input Rsistn to Pins 9,, R IN V IN = -.0V kω Input Rsistn to V SS Pin, R IN V IN = +.0V kω Output Currnt Low Output Currnt, Pins, -,,,,, I OL V OL = +0.V µa Hih Output Currnt, Pins -,,,, H OL V OH = +.V µa Hih Output Currnt, Pins,, H OL V OH = -0.V - - µa ICMA Smnt Drivr: Pins -, - Low Output Currnt, I OL V O = +.V - ma Hih Output Currnt, I OH V O = -.0V µa Multiplx Inputs: Pins,, 0, Input Low Volt, V IL V Input Hih Volt, V IH V Input Rsistn to V SS,R IN V IN = +.0V kω -

5 Spiitions Eltril Spiitions =.0V, T A = + o C, Unlss Othrwis Spii (Continu) Diit Drivr: Pins -, -0 Low Output Currnt, I OL V O = +.0V ma Hih Output Currnt, I OH V O = -.0V ma ICMB Smnt Drivr: Pins -, -0 Lk Currnt, I L V O = V SS µa Hih Output Currnt, I OH V O = -.0V 0 - ma Multiplx Inputs: Pins,, 0, Input Low Volt, V IL V Input Hih Volt, V IH V Input Rsistn to V SS,R IN V IN = -.0V kω Diit Drivr: Pins -, - PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Low Output Currnt, I OL V O = +.0V 0 - ma Hih Output Currnt, I OH V O = -.V µa NOTES:. Dstrutiv lthup my our i input sinls r ppli or th powr supply is stlish or i inputs or outputs r or to volts xin or V SS y 0.V.. Assums ll ls solr or wl to PC or n r ir low.. Typil vlus r not tst. Timin Wvorm STORE 0ms 0ms TO 0ms RESET 0ms : TIME INTERVAL 0ms UPDATE 90ms TO 00ms PRIMING MEASUREMENT INTERVAL UPDATE MEASUREMENT IN PROGRESS A PRIMING EDGES B 0ns MIN MEASURED INTERVAL (FIRST) MEASURED INTERVAL (LAST) NOTE:. I rn is st to vnt, irst n lst msur intrvl will oini. FIGURE. WAVEFORMS FOR TIME INTERVAL MEASUREMENT (OTHERS ARE SIMILAR, BUT WITHOUT PRIMING PHASE) -

6 Typil Prormn Curvs 00 T A = + o C =.V 00..0V 0 =.0V =.V 00 I DIGIT (ma) 00 0 I DIG (ma) 00 + o C + o C -0 o C 0 0 V OUT (V) FIGURE. ICMB TYPICAL I DIGIT vs V OUT 0 0 -V OUT (V) FIGURE. ICMA TYPICAL I DIG vs -V OUT 0..0V -0 o C 0 T A = + o C =.V I SEG (ma) 0 + o C + o C I SEG (ma) 0 0 =.0V =.V V OUT (V) 0 0 V OUT (V) FIGURE. ICMB TYPICAL I SEG vs -V OUT FIGURE. ICMA TYPICAL I SEG vs V OUT 00 =.0V -0 o C 0 =.0V -0 o C 0 + o C 0 + o C I DIGIT (ma) 00 + o C I SEG (ma) 0 + o C V OUT (V) 0 0 V OUT (V) FIGURE. ICMB TYPICAL I DIGIT vs V OUT FIGURE. ICMA TYPICAL I SEG vs V OUT -9

7 Typil Prormn Curvs (Continu) 0 A (MAX) FREUENCY UNIT COUNTER, FREUENCY RATIO MODES FREUENCY (MHz) 0 A (MAX) B (MAX) PERIOD TIME INTERVAL MODES T A = + o C 0 -V SS (V) FIGURE. A (MAX), B (MAX) AS A OF SUPPLY Dsription S A n B Th sinl to msur is ppli to A in rquny prio, unit ountr, rquny rtio n tim intrvl mos. Th othr input sinl to msur is ppli to B in rquny rtio n tim intrvl. A shoul hihr thn B urin rquny rtio. COUNTED TRANSITIONS Both inputs r iitl inputs with typil swithin thrshol o.0v t =.0V n input impn o 0kΩ. For optimum prormn, th pk to pk input sinl shoul t lst 0% o th supply volt n ntr out th swithin volt. Whn ths inputs r in rivn rom TTL loi, it is sirl to us pullup rsistor. Th iruit ounts hih to low trnsitions t oth inputs A.V 0.V 0ns MIN 0ns MIN t R = t F = 0ns Not tht th mplitu o th input shoul not x th vi supply (ov th n low th V SS ) y mor thn 0.V, othrwis th vi my m. Multiplx Inputs FIGURE 9. WAVEFORM FOR GUARANTEED MINIMUM A (MAX) = FREUENCY, FREUENCY RATIO, UNIT COUNTER A OR B.V 0.V 0ns MIN MEASURED INTERVAL 0ns MIN t R = t F = 0s FIGURE 0. WAVEFORM FOR GUARANTEED MINIMUM B (MAX) AND A (MAX) FOR = PERIOD AND TIME INTERVAL Th, RANGE, CONTROL n EXTERNAL DECIMAL POINT inputs r tim multiplx to slt th untion sir. This is hiv y onntin th pproprit Diit rivr output to th inputs. Th untion, rn n ontrol inputs must stl urin th lst hl o h iit output, (typilly µs). Th multiplx inputs r tiv hih or th ommon no lcma n tiv low or th ommon tho lcmb. Nois on th multiplx inputs n us impropr oprtion. This is prtiulrly tru whn th unit ountr mo o oprtion is slt, sin hns in volt on th iit rivrs n pitivly oupl throuh th LED ios to th multiplx inputs. For mximum nois immunity, 0kΩ rsistor shoul pl in sris with th multiplx inputs s shown in th pplition iruits. -0

8 Tl shows th untions slt y h iit or ths inputs. TABLE. MULTIPLEXED S Pin RANGE Pin CONTROL Pin Extrnl Pin 0 Funtion Input Frquny Prio Frquny Rtio Tim Intrvl Unit Countr Osilltor Frquny DIGIT D D D D D D 0.0s/ Cyl D 0.s/0 Cyls D s/00 Cyls D 0s/K Cyls D Enl Extrnl Rn Input D Disply O Disply Tst MHz Slt Extrnl Osilltor Enl Extrnl Diml Point Enl D n Hol D D D Th six untions tht n slt r: Frquny, Prio, Tim Intrvl, Unit Countr, Frquny Rtio n Osilltor Frquny. D Diml point is output or sm iit tht is onnt to this input. Th implmnttion o irnt untions is on y routin th irnt sinls to two ountrs, ll Min Countr n Rrn Countr. A simplii lok irm o th vi or untions rliztion is shown in Fiur. Tl shows whih sinls will rout to h ountr in irnt ss. Th output o th Min Countr is th inormtion whih os to th isply. Th Rrn Countr ivis its input to, 0, 00 n 000. On o ths outputs will slt throuh th rn sltor n riv th nl input o th Min Countr. This mns tht th Rrn Countr, lon with its' ssoit loks, irts th Min Countr to in ountin n trmins th lnth o th ountin prio. Not tht Fiur os not show th omplt untionl irm (S th Funtionl Blok Dirm). Atr th n o h ountin prio, th output o th Min Countr will lth n isply, thn th ountr will rst n nw msurmnt yl will in. Any hn in th will stop th prsnt msurmnt without uptin th isply n thn initit nw msurmnt. This prvnts n rronous irst rin tr th is hn. In ll ss, th -0 trnsitions r ount or tim. TABLE. ROUTING MAIN COUNTER COUNTER Frquny ( A ) Input A 00Hz (Osilltor 0 or 0 ) Prio (t A ) Osilltor Input A Rtio ( A / B ) Input A Input B Tim Intrvl (A B) Unit Countr (Count A) Os. Frq. ( OSC ) Osilltor Input A Input A Input B Not Applil Osilltor 00Hz (Osilltor 0 or 0 ) INTERNAL CONTROL INTERNAL CONTROL 00Hz A B SELECTOR CLOCK REFERENCE COUNTER INTERNAL CONTROL INTERNAL CONTROL RANGE SELECTOR INTERNAL OR EXTERNAL OSCILLATOR A SELECTOR ENABLE CLOCK MAIN COUNTER FIGURE. SIMPLIFIED BLOCK DIAGRAM OF S IMPLEMENTATION -

9 Frquny - In this mo input A is ount y th Min Countr or pris prio o tim. This tim is trmin y th tim s osilltor n th slt rn. For th 0MHz (or MHz) tim s, th rsolutions r 00Hz, 0Hz, Hz n 0.Hz. Th iml point on th isply is st or khz rin. Prio - In this mo, th tims osilltor is ount y th Min Countr or th urtion o,0,00 or 000 (rn slt) prios o th sinl t input A. A 0MHz tims ivs rsolutions o 0.µs to 0.000µs or 000 prios vrin. Not tht th mximum input rquny or prio msurmnt is.mhz. Frquny Rtio - In this mo, th input A is ount y th Min Countr or th urtion o,0,00 or 000 (rn slt) prios o th sinl t input B. Th rquny t input A shoul hihr thn input B or mninul rsult. Th rsult in this s is unitlss n its rsolution n o up to iits tr iml point. Tim Intrvl - In this mo, th tims osilltor is ount y th Min Countr or th urtion o -0 trnsition o input A until -0 trnsition o input B. This mns input A strts th ountin n input B stops it. I othr rns, xpt 0.0s/ yl r slt th squn o input A n B trnsitions must hppn 0,00 or 000 tims until th isply oms upt; not this whn msurin lon tim intrvls to iv nouh tim or msurmnt ompltion. Th rsolution in this mo is th sm s or prio msurmnt. S th Tim Intrvl Msurmnt stion lso. Unit Countr - In this mo, th Min Countr is lwys nl. Th input A is ount y th Min Countr n isply ontinuously. Osilltor Frquny - In this mo, th vi mks rquny msurmnt on its tims. This is sl tst mo or vi untionlity hk. For 0MHz tims th isply will show , , n Ovrlow in irnt rns. Rn Input Th RANGE slts whthr th msurmnt prio is m or,0,00 or 000 ounts o th Rrn Countr or it is ontroll y EXT RANGE input. As it is shown in Tl, this ivs irnt ountin winows or rquny msurmnt n vrious yls or othr mos o msurmnt. In ll untionl mos xpt Unit Countr, ny hn in th RANGE will stop th prsnt msurmnt without uptin th isply n thn initit nw msurmnt. This prvnts n rronous irst rin tr th RANGE is hn. Control Input Unlik th othr multiplx inputs, to whih only on o th iit outputs n onnt t tim, this input n ti to irnt iit lins to slt omintion o ontrols. In this s, isoltion ios must us in iit lins to voi rosstlk twn thm (s Fiur 9). Th irtion o ios pns on th vi vrsion, ommon no or ommon tho. For mximum nois immunity t this input, in ition to th 0K rsistor whih ws mntion or, 9pF to 00pF pitor shoul lso pl twn this input n th or V SS (S Fiur 9). Disply O - To isl th isply rivrs, it is nssry to ti th D lin to th CONTROL n hv th HOLD input t. Whil in Disply O mo, th smnts n iit rivrs r ll o, lvin th isply lins lotin, so th isply n shr with othr vis. In this mo, th osilltor ontinus to run with typil supply urrnt o.ma with 0MHz rystl, ut no msurmnts r m n multiplx inputs r intiv. A nw msurmnt yl will initit whn th HOLD input is swith to V SS. Disply Tst - Disply will turn on with ll th iits showin s n ll iml points lso on. Th isply will lnk i Disply O is slt t th sm tim. MHz Slt - Th MHz slt mo llows us o MHz rystl with th sm iit multiplx rt n tim twn msurmnt s with 0MHz rystl. This is on y iviin th osilltor rquny y 0 rthr thn 0. Th iml point is lso shit on iit to th riht in prio n tim intrvl, sin th lst siniint iit will in µs inrmnt rthr thn 0.µs inrmnt. Extrnl Osilltor Enl - In this mo, th sinl t EXT OSC is us s tims inst o th on-or rystl osilltor (uilt roun th OSC, OSC OUTPUT inputs). This input n us or n xtrnl stl tmprtur ompnst rystl osilltor or or spil msurmnts with ny xtrnl sour. Th on-or rystl osilltor ontinus to work whn th xtrnl osilltor is slt. This is nssry to voi hn-up prolms, n hs no t on th hip's untionl oprtion. I th on-or osilltor rquny is lss thn MHz or only th xtrnl osilltor is us, THE OSC MUST BE CONNECTED TO THE EXT OSC proviin th tims hs nouh volt swin or OSC (S Eltril Spiitions). I th xtrnl tims is TTL lvl pullup rsistor must us or OSC. Th othr wy is to put MΩ rsistor twn OSC n OSC OUTPUT n pitivly oupl th EXT OSC to OSC. This will is th OSC t its thrshol n th riv volt will n to only V P-P. Th xtrnl tims rquny must rtr thn 00kHz or th hip will rst itsl to nl th on-or osilltor. Extrnl Diml Point Enl - In this mo, th EX is nl. A iml point will isply or th iit tht its output lin is onnt to this input (EX ). Diit shoul not us sin it will ovrri th ovrlow output. Lin zro lnkin is tiv or th iits to th lt o slt iml point. Hol Input Expt in th unit ountr mo, whn th HOLD input is t, ny msurmnt in prorss (or STORE os low) is stopp, th min ountr is rst n th hip is hl ry to initit nw msurmnt s soon s HOLD os low. Th lths whih hol th min ountr t r not upt, so th lst omplt msurmnt is isply. In unit ountr mo whn HOLD input is t, th ountr is not stopp or rst, ut th isply is rozn t tht instntnous vlu. Whn HOLD os low th ount ontinus rom th nw vlu in th nw ountr. -

10 RST IN Input Th RST IN is provi to rst th Min Countr, stop ny msurmnt in prorss, n nl th isply lths, rsultin in th ll zro isply. It is sust to hv pitor t this input to V SS to prvnt ny hnup prolm on powr up. S pplition iruits. EXT RANGE Input MEAS IN PROGRESS STORE RESET OUT 0ms TO 0ms 90ms TO 00ms 0ms 0ms 0ms This input is provi to slt rns othr thn thos provi in th hip. In ny mo o msurmnt th urtion o msurmnt is trmin y th EXT RANGE i this input is nl. This input is smpl t 0ms intrvls y th 00Hz rrn riv rom th tims. Fiur shows th rltionship twn this input, 00Hz rrn sinl n MEAS IN PROGRESS. EXT RANGE n hn stt nywhr urin th prio o 00Hz rrn y will smpl t th trilin o th prio to strt or stop msurmnt. REFERENCE COUNTER CLOCK MEAS IN PROGRESS EXT RANGE T R FIGURE. EXTERNAL RANGE TO END OF MEASURE- MENT IN PROGRESS This input shoul not us or short ritrry rns (us o its smplin prio), it is provi or vry lon tin purposs. A wy o usin th ICM or short ritrry rn is to th tin sinl into th B n run th vi in th Frquny Rtio mo. Not tht th tin prio will rom on positiv until th nxt positiv o B (0.0 s/ yl rn). MEAS IN PROGRESS, STORE, RST OUT Outputs Ths outputs r provi or xtrnl systm intrin. MEAS IN PROGRESS stys low urin msurmnts n os hih or intrvls twn msurmnts. Fiur shows th rltionship twn ths outputs or intrvls twn msurmnts. All ths outputs n riv low powr Shottky TTL. Th MEAS IN PROGRESS n riv on ECL lo i th ECL vi is powr rom th sm powr supply s th ICM. FIGURE. RESET OUT, STORE AND MEASUREMENT IN PROGRESS OUTPUTS BETWEEN MEASUREMENTS BCD Outputs Th BCD rprsnttion o h isply iit is vill t th BCD outputs in multiplx shion. S Tl or iits truth tl. Th BCD output o h iit is vill whn its orrsponin iit output is tivt. Not tht th iit outputs r multiplx rom D (MSD) to D (LSD). Th positiv oin (ICMA, ommon no) or th ntiv oin (ICMB, ommon tho) iit riv sinls l th BCD t y µs to µs. This strtin o h iit riv sinl shoul us to xtrnlly lth th BCD t. Eh BCD output rivs on low powr Shottky TTL lo. Lin zro lnkin hs no t on th BCD outputs. TABLE. TRUTH TABLE BCD OUTPUTS NUMBER BCD PIN BCD PIN BCD PIN BCD PIN BUF OSC OUT Output Th BUFFr OSCilltor OUTput is provi or us o th on-or osilltor sinl, without loin th osilltor itsl. This output n riv on low powr Shottky TTL lo. Cr shoul tkn to minimiz pitiv loin on this pin. Diml Point Position Tl shows th iml point position or irnt mos o lcm oprtion. Not tht th iit is th lst siniint iit. Tl is ivn or 0MHz tims rquny. TABLE. DECIMAL POINT POSITIONS RANGE FREUENCY PERIOD FREUENCY RATIO TIME INTERVAL UNIT COUNTER OSCILLATOR FREUENCY 0.0s/ Cyl D D D D D D 0.s/0 Cyl D D D D D D s/00 Cyl D D D D D D 0s/K Cyl D D D D D D Extrnl N/A N/A N/A N/A N/A N/A -

11 Ovrlow Inition Whn ovrlow hppns in ny msurmnt it will init on th iml point o th iit. A sprt LED initor n us. Fiur shows how to onnt this initor. LED ovrlow initor onntions: Ovrlow ill init on th iml point output o iit. DEVICE CATHODE ANODE ICMA Diml Point D ICMB D Diml Point FIGURE. SEGMENT IDENTIFICATION AND FONT Tim Intrvl Msurmnt Whn in th tim intrvl mo n msurin sinl vnt, th lcma n lcmb must irst prim prior to msurin th vnt o intrst. This is on y irst nrtin ntiv oin on Chnnl A ollow y ntiv oin on Chnnl B to strt th msurmnt intrvl. Th inputs r thn prim ry or th msurmnt. Positiv oin s on A n B, or or tr th primin, will n to rstor th oriinl onition. Primin n sily omplish usin th iruit in Fiur. SIGNAL A SIGNAL B A B Whn timin rptitiv sinls, it is not nssry to prim th lcma n lcmb s th irst ltrntin sinl stts utomtilly prim th vi. S Fiur. Durin ny tim intrvl msurmnt yl, th ICMA n lcmb rquirs 00ms ollowin B oin low to upt ll intrnl loi. A nw msurmnt yl will not tk pl until ompltion o this intrnl upt tim. Osilltor Consirtions Th osilltor is hih in omplmntry FET invrtr. An xtrnl rsistor o 0MΩ or MΩ shoul onnt twn th osilltor input n output to provi isin. Th osilltor is sin to work with prlll rsonnt 0MHz qurtz rystl with stti pitn o pf n sris rsistn o lss thn Ω. Amon suitl rystls is th 0MHz CTS KNIGHTS ISI-00 For spii rystl n lo pitn, th rquir M n lult s ollows: M ω C O = C IN C OUT R S + C L whrc L = C IN C OUT C IN + C OUT C O = Crystl Stti Cpitn R S = Crystl Sris Rsistn C IN = Input Cpitn C OUT = Output Cpitn ω = π Th rquir M shoul not x 0% o th M spii or th lcm to insur rlil strtup. Th OSCilltor n OUTPUT pins h ontriut out pf to C IN n C OUT. For mximum stility o rquny, C IN n C OUT shoul pproximtly twi th spii rystl stti pitn. In ss whr non prslrs r us, it my sirl to us rystl whih is nithr 0MHz or MHz. In tht s oth th multiplx rt n tim twn msurmnts will irnt. Th multiplx rt is N.O. PRIME N9 00K 0K 0K 0.µF 0nF OSC OSC MUX = or 0MHz mo n or th 0 MUX = 0 0 MHz mo. Th tim twn msurmnts is in OSC 0 th 0MHz mo n in th MHz mo. OSC V SS V SS V SS DEVICE TYPE CD09B Invrtin Bur CD00B Exlusiv - OR FIGURE. PRIMING CIRCUIT, SIGNALS A & B BOTH HIGH OR LOW Followin th primin prour (whn in sinl vnt or yl rn) th vi is ry to msur on (only) vnt. Th ur osilltor output shoul us s n osilltor tst point or to riv itionl loi; this output will riv on low powr Shottky TTL lo. Whn th ur osilltor output is us to riv CMOS or th xtrnl osilltor input, 0kΩ rsistor shoul rom th ur osilltor output to. Th rystl n osilltor omponnts shoul lot s los to th hip s prtil to minimiz pikup rom othr sinls. Couplin rom th EXTERNAL OSClLLATOR to th OSClLLATOR OUTPUT or n us unsirl shits in osilltor rquny. -

12 Disply Consirtions Th isply is multiplx t 00Hz rt with iit tim o µs. An intriit lnkin tim o µs is us to prvnt isply hostin (int isply o t rom prvious iit suprimpos on th nxt iit). Lin zro lnkin is provi, whih lnks th lt hn zros tr iml point or ny non zro iits. Diits to th riht o th iml point r lwys isply. Th lin zro lnkin will isl whn th Min Countr ovrlows. Th lcma is sin to riv ommon no LED isplys t pk urrnt o ma/smnt, usin isplys with V F =.V t ma. Th vr DC urrnt will rtr thn ma unr ths onitions. Th lcmb is sin to riv ommon tho isplys t pk urrnt o ma/ smnt usin isplys with V F =.V t ma. Rsistors n in sris with th smnt rivrs to limit th isply urrnt, i rquir. Th Typil Prormn Curvs show th iit n smnt urrnts s untion o output volt or ommon no n ommon tho rivrs. To inrs th liht output rom th isplys, my inrs to.0v. Howvr, r shoul tkn to s tht mximum powr n urrnt rtins r not x. Th SEGmnt n Diit outputs in oth th ICMA n ICMB r not irtly omptil with ithr TTL or CMOS loi. Thror, lvl shitin with isrt trnsistors my rquir to us ths outputs s loi sinls. Extrnl lthin shoul own on th lin o th iit sinl. Aury In Univrsl Countr, rystl rit n quntiztion rrors us rrors. In rquny, prio n tim intrvl mos, sinl riv rom th osilltor is us in ithr th Rrn Countr or Min Countr, n in ths mos, n rror in th osilltor rquny will us n intil rror in th msurmnt. For instn, n osilltor tmprtur oiint o 0ppm/ o C will us msurmnt rror o 0ppm/ o C. In ition, thr is quntiztion rror inhrnt in ny iitl msurmnt o ± ount. Clrly this rror is ru y isplyin mor iits. In th rquny mo mximum ury is otin with hih rquny inputs n in prio mo mximum ury is otin with low rquny inputs. As n sn in Fiur. In tim intrvl msurmnts thr n n rror o ount pr intrvl. As rsult thr is th sm inhrnt ury in ll rns s shown in Fiur. In rquny rtio msurmnt n mor urtly otin y vrin ovr mor yls o B s shown in Fiur. MAXIMUM NUMBER OF SIGNIFICANT DIGITS 0 0.0s 0.s s 0s CYCLE 0 CYCLES 0 0 CYCLES CYCLES FREUENCY MEASURE PERIOD MEASURE OSC = 0MHz FREUENCY (Hz) FIGURE. MAXIMUM ACCURACY OF FREUENCY AND PERIOD MEASUREMENTS DUE TO LIMITATIONS OF UANTIZATION ERRORS MAXIMUM NUMBER OF SIGNIFICANT DIGITS 0 MAXIMUM TIME INTERVAL FOR 0 INTERVALS 0 MAXIMUM TIME INTERVAL FOR 0 INTERVALS MAXIMUM TIME INTERVAL FOR 0 INTERVALS TIME INTERVAL (µs) FIGURE. MAXIMUM ACCURACY OF TIME INTERVAL MEASUREMENT DUE TO LIMITATIONS OF UANTIZATION ERRORS MAXIMUM NUMBER OF SIGNIFICANT DIGITS 0 RANGE CYCLE 0 CYCLES 0 CYCLES 0 CYCLES A / B FIGURE. MAXIMUM ACCURACY FOR FREUENCY RATIO MEASUREMENT DUE TO LIMITATION OF UANTIZATION ERRORS -

13 Tst Ciruit =.0V OFF TEST MHz EXT OSC EXT TEST GENERATOR GENERATOR B MEAS IN PROGRESS 0K D D D D D D RESET STORE BCD C BCD D BCD B BCD A 9pF A CONTROL ICMA EXT OSC IN V SS 0kΩ HOLD BUF OSC OUT RST OUT EXT RANGE D D D D D D D D GENERATOR 00kΩ 00kΩ 0pF MΩ 0MHz CRYSTAL D D 9pF D D D D D D D D D D D D N9s CRYSTAL SPECS. = F O 0.00MHz C O pf R S Ω DENOTES BU WITH CONDUCTORS D D D LED OVERFLOW D INDICATOR D D D D D D D D D D LED OVERFLOW INDICATOR CONNECTIONS DEVICE CATHODE ANODE ICMA D ICMB D NOTE: Ovrlow will init on th iml point output o iit. FIGURE 9. -

14 Typil Applitions Th ICM hs n sin s omplt stn lon Univrsl Countr, or us with prslrs n othr iruitry in vrity o pplitions. Sin A n B r iitl inputs, itionl iruitry will rquir in mny pplitions, or input urin, mpliition, hystrsis, n lvl shitin to otin th rquir iitl volts. For mny pplitions FET sour ollowr n us or input urin, n n ECL 0 lin rivr n us or mpliition n hystrsis to otin hih impn input, snsitivity n nwith. Howvr, ost n omplxity o this iruitry n vry wily, pnin upon th snsitivity n nwith rquir. Whn TTL prslrs or input urs r us, pull up rsistors to shoul us to otin optiml volt swin t S A n B. I prslrs rn t rquir, th ICM n us to implmnt minimum omponnt Univrsl Countr s shown in Fiur 0. For input rqunis up to 0MHz, th iruit shown in Fiur n us to implmnt rquny n prio ountr. To otin th orrt vlu whn msurin rquny n prio, it is nssry to ivi th 0MHz osilltor rquny own to.mhz. In oin this th tim twn msurmnts is lnthn to 00ms n th isply multiplx rt is rs to Hz. I th input rquny is prsl y tn, th osilltor rquny n rmin t ithr 0MHz or MHz, ut th iml point must mov. Fiur shows us o 0 prslr in rquny ountr mo. Aitionl loi hs n to nl th ICM to ount th input irtly in prio mo or mximum ury. 0kΩ BLANK TEST EXT OSC ENABLE 9pF A IN B IN kΩ HOLD D N9s D D 0kΩ V+ D D D D D D RESET 0.µF D D D D D D D ICMB 0 9 V+ EXT OSC IN 00kΩ 9pF V+ D MΩ D D V+ 0MHz CRYSTAL 9pF TYP TYPICAL CRYSTAL PARAMETERS C L pf R S Ω D D D D D D D D D D FIGURE 0. 0MHz UNIVERSAL COUNTER -

15 P D P D CK C C CK A IN EXT OSC ENABLE B IN D OFF D D D TEST V+ P C P C N9 D V+ V+ V+ LS kω V+ 0kΩ 0kΩ D D D D D D D D 0. µf 9pF RESET ICMB kω HOLD 00kΩ 9pF 00kΩ LS MΩ D D D D 0MHz CRYSTAL 9pF TYP P D IC CK C P D IC CK C kω D D D P F R D D D D D D D D D OVERFLOW FIGURE. 0MHz FREUENCY, PERIOD COUNTER -

16 M CP ECLC90 TTL CE MS LS00 0kΩ OFF TEST EXT OSC EN MHz 9pF V+ 0kΩ V+ 0kΩ LS00 V+ 0kΩ M CP ECLC90 TTL CE MS D F D P D R D UC 0kΩ 9 0 ICMA D D D HOLD D 00kΩ EXT OSC IN 9pF D N9s MΩ D 0MHz CRYSTAL 9pF TYP D D 0 kω D D S 9 0 D D D RANGE D D D D D 0.µF 00kΩ OVERFLOW D D D D D D D D D FIGURE. 00MHz MULTI- COUNTER -9

17 M CP ECLC90 TTL CE MS 9pF 0kΩ OFF TEST 0kΩ N kω D D D 0kΩ SWITCH OPEN FRE CLOSED PERIOD F D IN CONT CD0 D IN CONT OUT OUT 0kΩ D D D D D D D 9 0 ICMB kΩ HOLD 9pF N9s MΩ 0MHz CRYSTAL 9pF TYP 0.µF N.O. RESET D 9 0 0kΩ D D D D D D D D D D D D D OVERFLOW FIGURE. 00MHz FREUENCY, PERIOD COUNTER -0

18 Fiur shows th us o CD0 nlo multiplxr to multiplx th iitl outputs k to th Input. Sin th CD0 is iitlly ontroll nlo trnsmission t, no lvl shitin o th iit output is rquir. CD0 s or CD0 s oul lso us to slt th propr inputs or th multiplx input on th ICM rom or it iitl inputs. Ths nlo multiplxrs my lso us in systms in whih th mo o oprtion is ontroll y miroprossor rthr thn irtly rom ront pnl swiths. TTL multiplxrs suh s th LS or LS my lso us, ut som itionl iruitry will rquir to onvrt th iit output to TTL omptil loi lvls. Th iruit shown in Fiur n us in ny o th iruit pplitions shown to implmnt sinl msurmnt mo o oprtion. This iruit uss th STORE output to put th ICM into hol mo. Th HOLD input n lso us to ru th tim twn msurmnts. Th iruit shown in Fiur puts short puls into th HOLD input short tim tr STORE os low. A nw msurmnt will initit t th n o th puls on th HOLD input. This iruit rus th tim twn msurmnts to out 0ms rom 00ms; us o th iruit shown in Fiur on th iruit shown in Fiur will ru th tim twn msurmnts rom 00ms to out 0ms. Usin LCD Disply Fiur shows th ICM in intr to LCD isplys, y usin its BCD outputs n iit lins to riv two ICM isply rivrs. STORE OUTPUT S 00kΩ S 00kΩ HOLD SWITCH S 00kΩ STORE OUTPUT 00kΩ 00pF 00pF 00kΩ HOLD S S Opn-Sinl Ms Mo Enl Clos-Initit Nw Msurmnt HOLD SWITCH N.O. S Clos-Hol Input FIGURE. SINGLE MEASUREMENT CIRCUIT FOR USE WITH ICM FIGURE. CIRCUIT FOR REDUCING TIME BETWEEN MEA- SUREMENTS +V SEGMENT LINES SEGMENT LINES +V ICM ICM D D D D ICMA FIGURE. 0MHz UNIVERSAL COUNTER SYSTEM WITH LCD -

ICM7226A, ICM7226B. 8-Digit, Multi-Function, Frequency Counter/Timer. Features. Description. Applications. Ordering Information.

ICM7226A, ICM7226B. 8-Digit, Multi-Function, Frequency Counter/Timer. Features. Description. Applications. Ordering Information. Auust 99 Smionutor ICMA, ICMB -Diit, Multi-Funtion, Frquny Countr/Timr Fturs CMOS Dsin or Vry Low Powr Output Drivrs Dirtly Driv Both Diits n Smnts o Lr -Diit LED Displys Msurs Frqunis rom DC to 0MHz;

More information

ICM7216A, ICM7216B ICM7216D 8-Digit Multi-Function Frequency Counter/Timer

ICM7216A, ICM7216B ICM7216D 8-Digit Multi-Function Frequency Counter/Timer Dmr 99 SEMICONDUCTOR ICMA, ICMB ICMD -Diit Multi-Funtion Frquny Countr/Timr Fturs All Vrsions Funtions s Frquny Countr (DC to 0MHz) Four Intrnl Gt Tims: 0.0s, 0.s, s, 0s in Frquny Countr Mo Dirtly Drivs

More information

NO RECOMMENDED REPLACEMENT

NO RECOMMENDED REPLACEMENT -Diit, Multi-Funtion, Frquny Countrs/Timrs OBSOLETE PRODUCT NO RECOMMENDED REPLACEMENT ontt our Thnil Support Cntr t www.intrsil.om/ts DATASHEET FN Rv..00 Jn 7, 00 Th ICM7B is ully intrt Timr Countrs with

More information

EE1000 Project 4 Digital Volt Meter

EE1000 Project 4 Digital Volt Meter Ovrviw EE1000 Projt 4 Diitl Volt Mtr In this projt, w mk vi tht n msur volts in th rn o 0 to 4 Volts with on iit o ury. Th input is n nlo volt n th output is sinl 7-smnt iit tht tlls us wht tht input s

More information

Present state Next state Q + M N

Present state Next state Q + M N Qustion 1. An M-N lip-lop works s ollows: I MN=00, th nxt stt o th lip lop is 0. I MN=01, th nxt stt o th lip-lop is th sm s th prsnt stt I MN=10, th nxt stt o th lip-lop is th omplmnt o th prsnt stt I

More information

ECE COMBINATIONAL BUILDING BLOCKS - INVEST 13 DECODERS AND ENCODERS

ECE COMBINATIONAL BUILDING BLOCKS - INVEST 13 DECODERS AND ENCODERS C 24 - COMBINATIONAL BUILDING BLOCKS - INVST 3 DCODS AND NCODS FALL 23 AP FLZ To o "wll" on this invstition you must not only t th riht nswrs ut must lso o nt, omplt n onis writups tht mk ovious wht h

More information

Seven-Segment Display Driver

Seven-Segment Display Driver 7-Smnt Disply Drivr, Ron s in 7-Smnt Disply Drivr, Ron s in Prolm 62. 00 0 0 00 0000 000 00 000 0 000 00 0 00 00 0 0 0 000 00 0 00 BCD Diits in inry Dsin Drivr Loi 4 inputs, 7 outputs 7 mps, h with 6 on

More information

1 Introduction to Modulo 7 Arithmetic

1 Introduction to Modulo 7 Arithmetic 1 Introution to Moulo 7 Arithmti Bor w try our hn t solvin som hr Moulr KnKns, lt s tk los look t on moulr rithmti, mo 7 rithmti. You ll s in this sminr tht rithmti moulo prim is quit irnt rom th ons w

More information

ECE Experiment #6 Kitchen Timer

ECE Experiment #6 Kitchen Timer ECE 367 - Exprimnt #6 Kithn Timr Sprin 2006 Smstr Introution This xprimnt hs you onstrut iruit intrfin nin I/O lins from th 68HC11 with two svn smnt isplys n mtrix kyp, n writ ssmbly lnu o to rliz prormmbl

More information

Physics 3150, Laboratory 9 Clocked Digital Logic and D/A Conversion

Physics 3150, Laboratory 9 Clocked Digital Logic and D/A Conversion Nots: Physis 0, Lortory Clok Diitl Loi n D/A Convrsion Mrh n 0, 0 By E Eylr n Gor Gison, s in prt on Hys n Horowitz Lst rvis Mrh, 0, y E Eylr () Thr will only on mor orniz l sssion, on April n. Th rst

More information

, each of which is a tree, and whose roots r 1. , respectively, are children of r. Data Structures & File Management

, each of which is a tree, and whose roots r 1. , respectively, are children of r. Data Structures & File Management nrl tr T is init st o on or mor nos suh tht thr is on sint no r, ll th root o T, n th rminin nos r prtition into n isjoint susts T, T,, T n, h o whih is tr, n whos roots r, r,, r n, rsptivly, r hilrn o

More information

Designing A Concrete Arch Bridge

Designing A Concrete Arch Bridge This is th mous Shwnh ri in Switzrln, sin y Rort Millrt in 1933. It spns 37.4 mtrs (122 t) n ws sin usin th sm rphil mths tht will monstrt in this lsson. To pro with this lsson, lik on th Nxt utton hr

More information

CS September 2018

CS September 2018 Loil los Distriut Systms 06. Loil los Assin squn numrs to msss All ooprtin prosss n r on orr o vnts vs. physil los: rport tim o y Assum no ntrl tim sour Eh systm mintins its own lol lo No totl orrin o

More information

QUESTIONS BEGIN HERE!

QUESTIONS BEGIN HERE! Points miss: Stunt's Nm: Totl sor: /100 points Est Tnnss Stt Univrsity Dprtmnt of Computr n Informtion Sins CSCI 710 (Trnoff) Disrt Struturs TEST for Fll Smstr, 00 R this for strtin! This tst is los ook

More information

Cycles and Simple Cycles. Paths and Simple Paths. Trees. Problem: There is No Completely Standard Terminology!

Cycles and Simple Cycles. Paths and Simple Paths. Trees. Problem: There is No Completely Standard Terminology! Outlin Computr Sin 331, Spnnin, n Surphs Mik Joson Dprtmnt o Computr Sin Univrsity o Clry Ltur #30 1 Introution 2 3 Dinition 4 Spnnin 5 6 Mik Joson (Univrsity o Clry) Computr Sin 331 Ltur #30 1 / 20 Mik

More information

QUESTIONS BEGIN HERE!

QUESTIONS BEGIN HERE! Points miss: Stunt's Nm: Totl sor: /100 points Est Tnnss Stt Univrsity Dprtmnt o Computr n Inormtion Sins CSCI 2710 (Trno) Disrt Struturs TEST or Sprin Smstr, 2005 R this or strtin! This tst is los ook

More information

Outline. 1 Introduction. 2 Min-Cost Spanning Trees. 4 Example

Outline. 1 Introduction. 2 Min-Cost Spanning Trees. 4 Example Outlin Computr Sin 33 Computtion o Minimum-Cost Spnnin Trs Prim's Alorithm Introution Mik Joson Dprtmnt o Computr Sin Univrsity o Clry Ltur #33 3 Alorithm Gnrl Constrution Mik Joson (Univrsity o Clry)

More information

ECE Experiment #4 Seven Segment Display Interfacing and Timing

ECE Experiment #4 Seven Segment Display Interfacing and Timing ECE 367 - Exprimnt #4 Svn Smnt Disply Intrfin n Timin Sprin 2006 Smstr Introution This xprimnt rquirs tht you onstrut iruit intrfin th MiroStmp11 moul with svn smnt isply, n writ ssmly lnu o to ontinuously

More information

Module graph.py. 1 Introduction. 2 Graph basics. 3 Module graph.py. 3.1 Objects. CS 231 Naomi Nishimura

Module graph.py. 1 Introduction. 2 Graph basics. 3 Module graph.py. 3.1 Objects. CS 231 Naomi Nishimura Moul grph.py CS 231 Nomi Nishimur 1 Introution Just lik th Python list n th Python itionry provi wys of storing, ssing, n moifying t, grph n viw s wy of storing, ssing, n moifying t. Bus Python os not

More information

b. How many ternary words of length 23 with eight 0 s, nine 1 s and six 2 s?

b. How many ternary words of length 23 with eight 0 s, nine 1 s and six 2 s? MATH 3012 Finl Exm, My 4, 2006, WTT Stunt Nm n ID Numr 1. All our prts o this prolm r onrn with trnry strings o lngth n, i.., wors o lngth n with lttrs rom th lpht {0, 1, 2}.. How mny trnry wors o lngth

More information

SEE PAGE 2 FOR BRUSH MOTOR WIRING SEE PAGE 3 FOR MANUFACTURER SPECIFIC BLDC MOTOR WIRING EXAMPLES EZ SERVO EZSV17 WIRING DIAGRAM FOR BLDC MOTOR

SEE PAGE 2 FOR BRUSH MOTOR WIRING SEE PAGE 3 FOR MANUFACTURER SPECIFIC BLDC MOTOR WIRING EXAMPLES EZ SERVO EZSV17 WIRING DIAGRAM FOR BLDC MOTOR 0V TO 0V SUPPLY GROUN +0V TO +0V RS85 ONVRTR 9 TO OM PORT ON P TO P OM PORT US 9600 U 8IT, NO PRITY, STOP, NO FLOW TRL. OPTO SNSOR # GROUN +0V TO +0V GROUN RS85 RS85 OPTO SNSOR # PHOTO TRNSISTOR TO OTHR

More information

An undirected graph G = (V, E) V a set of vertices E a set of unordered edges (v,w) where v, w in V

An undirected graph G = (V, E) V a set of vertices E a set of unordered edges (v,w) where v, w in V Unirt Grphs An unirt grph G = (V, E) V st o vrtis E st o unorr gs (v,w) whr v, w in V USE: to mol symmtri rltionships twn ntitis vrtis v n w r jnt i thr is n g (v,w) [or (w,v)] th g (v,w) is inint upon

More information

Outline. Computer Science 331. Computation of Min-Cost Spanning Trees. Costs of Spanning Trees in Weighted Graphs

Outline. Computer Science 331. Computation of Min-Cost Spanning Trees. Costs of Spanning Trees in Weighted Graphs Outlin Computr Sin 33 Computtion o Minimum-Cost Spnnin Trs Prim s Mik Joson Dprtmnt o Computr Sin Univrsity o Clry Ltur #34 Introution Min-Cost Spnnin Trs 3 Gnrl Constrution 4 5 Trmintion n Eiiny 6 Aitionl

More information

Using the Printable Sticker Function. Using the Edit Screen. Computer. Tablet. ScanNCutCanvas

Using the Printable Sticker Function. Using the Edit Screen. Computer. Tablet. ScanNCutCanvas SnNCutCnvs Using th Printl Stikr Funtion On-o--kin stikrs n sily rt y using your inkjt printr n th Dirt Cut untion o th SnNCut mhin. For inormtion on si oprtions o th SnNCutCnvs, rr to th Hlp. To viw th

More information

12. Traffic engineering

12. Traffic engineering lt2.ppt S-38. Introution to Tltrffi Thory Spring 200 2 Topology Pths A tlommunition ntwork onsists of nos n links Lt N not th st of nos in with n Lt J not th st of nos in with j N = {,,,,} J = {,2,3,,2}

More information

Constructive Geometric Constraint Solving

Constructive Geometric Constraint Solving Construtiv Gomtri Constrint Solving Antoni Soto i Rir Dprtmnt Llngutgs i Sistms Inormàtis Univrsitt Politèni Ctluny Brlon, Sptmr 2002 CGCS p.1/37 Prliminris CGCS p.2/37 Gomtri onstrint prolm C 2 D L BC

More information

Paths. Connectivity. Euler and Hamilton Paths. Planar graphs.

Paths. Connectivity. Euler and Hamilton Paths. Planar graphs. Pths.. Eulr n Hmilton Pths.. Pth D. A pth rom s to t is squn o gs {x 0, x 1 }, {x 1, x 2 },... {x n 1, x n }, whr x 0 = s, n x n = t. D. Th lngth o pth is th numr o gs in it. {, } {, } {, } {, } {, } {,

More information

Decimals DECIMALS.

Decimals DECIMALS. Dimls DECIMALS www.mthltis.o.uk ow os it work? Solutions Dimls P qustions Pl vlu o imls 0 000 00 000 0 000 00 0 000 00 0 000 00 0 000 tnths or 0 thousnths or 000 hunrths or 00 hunrths or 00 0 tn thousnths

More information

Planar Upward Drawings

Planar Upward Drawings C.S. 252 Pro. Rorto Tmssi Computtionl Gomtry Sm. II, 1992 1993 Dt: My 3, 1993 Sri: Shmsi Moussvi Plnr Upwr Drwings 1 Thorm: G is yli i n only i it hs upwr rwing. Proo: 1. An upwr rwing is yli. Follow th

More information

Multipoint Alternate Marking method for passive and hybrid performance monitoring

Multipoint Alternate Marking method for passive and hybrid performance monitoring Multipoint Altrnt Mrkin mtho or pssiv n hyri prormn monitorin rt-iool-ippm-multipoint-lt-mrk-00 Pru, Jul 2017, IETF 99 Giuspp Fiool (Tlom Itli) Muro Coilio (Tlom Itli) Amo Spio (Politnio i Torino) Riro

More information

Aquauno Video 6 Plus Page 1

Aquauno Video 6 Plus Page 1 Connt th timr to th tp. Aquuno Vio 6 Plus Pg 1 Usr mnul 3 lik! For Aquuno Vio 6 (p/n): 8456 For Aquuno Vio 6 Plus (p/n): 8413 Opn th timr unit y prssing th two uttons on th sis, n fit 9V lklin ttry. Whn

More information

SEE PAGE 2 FOR BRUSH MOTOR WIRING SEE PAGE 3 FOR MANUFACTURER SPECIFIC BLDC MOTOR WIRING EXAMPLES A

SEE PAGE 2 FOR BRUSH MOTOR WIRING SEE PAGE 3 FOR MANUFACTURER SPECIFIC BLDC MOTOR WIRING EXAMPLES A 7V TO 0V SUPPLY +7V TO +0V RS85 ONVRTR TO P OM PORT OR US US 9600 U 8IT, NO PRITY, STOP, NO FLOW TRL. 9 TO OM PORT ON P TO OTHR Z SRVOS OR Z STPPRS OPTO SNSOR # OPTO SNSOR # PHOTO TRNSISTOR OPTO SNSOR

More information

12/3/12. Outline. Part 10. Graphs. Circuits. Euler paths/circuits. Euler s bridge problem (Bridges of Konigsberg Problem)

12/3/12. Outline. Part 10. Graphs. Circuits. Euler paths/circuits. Euler s bridge problem (Bridges of Konigsberg Problem) 12/3/12 Outlin Prt 10. Grphs CS 200 Algorithms n Dt Struturs Introution Trminology Implmnting Grphs Grph Trvrsls Topologil Sorting Shortst Pths Spnning Trs Minimum Spnning Trs Ciruits 1 Ciruits Cyl 2 Eulr

More information

# 1 ' 10 ' 100. Decimal point = 4 hundred. = 6 tens (or sixty) = 5 ones (or five) = 2 tenths. = 7 hundredths.

# 1 ' 10 ' 100. Decimal point = 4 hundred. = 6 tens (or sixty) = 5 ones (or five) = 2 tenths. = 7 hundredths. How os it work? Pl vlu o imls rprsnt prts o whol numr or ojt # 0 000 Tns o thousns # 000 # 00 Thousns Hunrs Tns Ons # 0 Diml point st iml pl: ' 0 # 0 on tnth n iml pl: ' 0 # 00 on hunrth r iml pl: ' 0

More information

5/9/13. Part 10. Graphs. Outline. Circuits. Introduction Terminology Implementing Graphs

5/9/13. Part 10. Graphs. Outline. Circuits. Introduction Terminology Implementing Graphs Prt 10. Grphs CS 200 Algorithms n Dt Struturs 1 Introution Trminology Implmnting Grphs Outlin Grph Trvrsls Topologil Sorting Shortst Pths Spnning Trs Minimum Spnning Trs Ciruits 2 Ciruits Cyl A spil yl

More information

Experiment # 3 Introduction to Digital Logic Simulation and Xilinx Schematic Editor

Experiment # 3 Introduction to Digital Logic Simulation and Xilinx Schematic Editor EE2L - Introution to Diitl Ciruits Exprimnt # 3 Exprimnt # 3 Introution to Diitl Loi Simultion n Xilinx Smti Eitor. Synopsis: Tis l introus CAD tool (Computr Ai Dsin tool) ll Xilinx Smti Eitor, wi is us

More information

Graphs. Graphs. Graphs: Basic Terminology. Directed Graphs. Dr Papalaskari 1

Graphs. Graphs. Graphs: Basic Terminology. Directed Graphs. Dr Papalaskari 1 CSC 00 Disrt Struturs : Introuon to Grph Thory Grphs Grphs CSC 00 Disrt Struturs Villnov Univrsity Grphs r isrt struturs onsisng o vrs n gs tht onnt ths vrs. Grphs n us to mol: omputr systms/ntworks mthml

More information

d e c b a d c b a d e c b a a c a d c c e b

d e c b a d c b a d e c b a a c a d c c e b FLAT PEYOTE STITCH Bin y mkin stoppr -- sw trou n pull it lon t tr until it is out 6 rom t n. Sw trou t in witout splittin t tr. You soul l to sli it up n own t tr ut it will sty in pl wn lt lon. Evn-Count

More information

CSE 373. Graphs 1: Concepts, Depth/Breadth-First Search reading: Weiss Ch. 9. slides created by Marty Stepp

CSE 373. Graphs 1: Concepts, Depth/Breadth-First Search reading: Weiss Ch. 9. slides created by Marty Stepp CSE 373 Grphs 1: Conpts, Dpth/Brth-First Srh ring: Wiss Ch. 9 slis rt y Mrty Stpp http://www.s.wshington.u/373/ Univrsity o Wshington, ll rights rsrv. 1 Wht is grph? 56 Tokyo Sttl Soul 128 16 30 181 140

More information

The University of Sydney MATH2969/2069. Graph Theory Tutorial 5 (Week 12) Solutions 2008

The University of Sydney MATH2969/2069. Graph Theory Tutorial 5 (Week 12) Solutions 2008 Th Univrsity o Syny MATH2969/2069 Grph Thory Tutoril 5 (Wk 12) Solutions 2008 1. (i) Lt G th isonnt plnr grph shown. Drw its ul G, n th ul o th ul (G ). (ii) Show tht i G is isonnt plnr grph, thn G is

More information

(2) If we multiplied a row of B by λ, then the value is also multiplied by λ(here lambda could be 0). namely

(2) If we multiplied a row of B by λ, then the value is also multiplied by λ(here lambda could be 0). namely . DETERMINANT.. Dtrminnt. Introution:I you think row vtor o mtrix s oorint o vtors in sp, thn th gomtri mning o th rnk o th mtrix is th imnsion o th prlllppi spnn y thm. But w r not only r out th imnsion,

More information

ATMOSPHERIC DISTURBANCE MONITOR MAIN CIRCUIT BOARD V5

ATMOSPHERIC DISTURBANCE MONITOR MAIN CIRCUIT BOARD V5 P VOL TMOSPHRI ISTURN MONITOR MIN IRUIT OR V5 R 70K IN 0mH 0pF OLLTOR OUT TST.00mF IN 70K mh Q R 0pF OLOR O: R 0mF N9 TRIM N9 K9. SI LIHTNIN TTOR (-) to (+) Pulse Out 5 00mF (+) to (-) Pulse Out 0R *R

More information

CSC Design and Analysis of Algorithms. Example: Change-Making Problem

CSC Design and Analysis of Algorithms. Example: Change-Making Problem CSC 801- Dsign n Anlysis of Algorithms Ltur 11 Gry Thniqu Exmpl: Chng-Mking Prolm Givn unlimit mounts of oins of nomintions 1 > > m, giv hng for mount n with th lst numr of oins Exmpl: 1 = 25, 2 =10, =

More information

Outline. Circuits. Euler paths/circuits 4/25/12. Part 10. Graphs. Euler s bridge problem (Bridges of Konigsberg Problem)

Outline. Circuits. Euler paths/circuits 4/25/12. Part 10. Graphs. Euler s bridge problem (Bridges of Konigsberg Problem) 4/25/12 Outlin Prt 10. Grphs CS 200 Algorithms n Dt Struturs Introution Trminology Implmnting Grphs Grph Trvrsls Topologil Sorting Shortst Pths Spnning Trs Minimum Spnning Trs Ciruits 1 2 Eulr s rig prolm

More information

Graphs. CSC 1300 Discrete Structures Villanova University. Villanova CSC Dr Papalaskari

Graphs. CSC 1300 Discrete Structures Villanova University. Villanova CSC Dr Papalaskari Grphs CSC 1300 Disrt Struturs Villnov Univrsity Grphs Grphs r isrt struturs onsis?ng of vr?s n gs tht onnt ths vr?s. Grphs n us to mol: omputr systms/ntworks mthm?l rl?ons logi iruit lyout jos/prosss f

More information

A Low Noise and Reliable CMOS I/O Buffer for Mixed Low Voltage Applications

A Low Noise and Reliable CMOS I/O Buffer for Mixed Low Voltage Applications Proings of th 6th WSEAS Intrntionl Confrn on Miroltronis, Nnoltronis, Optoltronis, Istnul, Turky, My 27-29, 27 32 A Low Nois n Rlil CMOS I/O Buffr for Mix Low Voltg Applitions HWANG-CHERNG CHOW n YOU-GANG

More information

Schick CDR consumables catalogue

Schick CDR consumables catalogue Shik CDR onsumls tlou usin your Shik CDR positionin systm vrythin you n to t strt 2 2 3 4 Slt th orrt shlth siz or your snsor. Slip th shth ovr th snsor n tth th pproprit imin rins n rms s thy o ll th

More information

Outline. Binary Tree

Outline. Binary Tree Outlin Similrity Srh Th Binry Brnh Distn Nikolus Austn nikolus.ustn@s..t Dpt. o Computr Sins Univrsity o Slzur http://rsrh.uni-slzur.t 1 Binry Brnh Distn Binry Rprsnttion o Tr Binry Brnhs Lowr Boun or

More information

16.unified Introduction to Computers and Programming. SOLUTIONS to Examination 4/30/04 9:05am - 10:00am

16.unified Introduction to Computers and Programming. SOLUTIONS to Examination 4/30/04 9:05am - 10:00am 16.unii Introution to Computrs n Prormmin SOLUTIONS to Exmintion /30/0 9:05m - 10:00m Pro. I. Kristin Lunqvist Sprin 00 Grin Stion: Qustion 1 (5) Qustion (15) Qustion 3 (10) Qustion (35) Qustion 5 (10)

More information

RAW / PEYOTE STITCH / BRICK STITCH / HERRINGBONE

RAW / PEYOTE STITCH / BRICK STITCH / HERRINGBONE RAW / PEYOTE STITCH / BRICK STITCH / HERRINGBONE Sur vorit, oin, or utton with prottiv ron work in our stithin thniqus. FCT-SC-040317_02 sin y Niol Spiknrithr 2016 Klmh Pulishin Co. This mtril my not rprou

More information

Basis of test: VDE 0660, part 500/IEC Rated peak withstand current I pk. Ip peak short-circuit current [ka] Busbar support spacing [mm]

Basis of test: VDE 0660, part 500/IEC Rated peak withstand current I pk. Ip peak short-circuit current [ka] Busbar support spacing [mm] Powr istriution Short-iruit withstn strngth to EC Short-iruit withstn strngth to EC 439-1 Typ tsting to EC 439-1 During th ours of systm typ-tsting, th following tsts wr onut on th Rittl usr systms n on

More information

MAT3707. Tutorial letter 201/1/2017 DISCRETE MATHEMATICS: COMBINATORICS. Semester 1. Department of Mathematical Sciences MAT3707/201/1/2017

MAT3707. Tutorial letter 201/1/2017 DISCRETE MATHEMATICS: COMBINATORICS. Semester 1. Department of Mathematical Sciences MAT3707/201/1/2017 MAT3707/201/1/2017 Tutoril lttr 201/1/2017 DISCRETE MATHEMATICS: COMBINATORICS MAT3707 Smstr 1 Dprtmnt o Mtmtil Sins SOLUTIONS TO ASSIGNMENT 01 BARCODE Din tomorrow. univrsity o sout ri SOLUTIONS TO ASSIGNMENT

More information

REFERENCE DESIGN PCIE SINGLE LANE 1000/100/10 BASE-T INTEL 82583V ETHERNET CONTROLLER

REFERENCE DESIGN PCIE SINGLE LANE 1000/100/10 BASE-T INTEL 82583V ETHERNET CONTROLLER RRN SIGN PI SGL LN 000/00/0 S-T TL V THRNT ONTROLLR TL LN SS IVISION N.. th VNU HILLSORO, OR TITL SIZ O OUMNT NUMR RV T SHT V RRN SIGN.0 0--00 UNTIONL LOK IGRM TL LN SS IVISION N.. th VNU HILLSORO, OR

More information

Design of Aircraft Engine Speed Detection System Based on AT89C51 MCU

Design of Aircraft Engine Speed Detection System Based on AT89C51 MCU Dsin o Airrt Enin Sp Dttion Systm Bs on AT89C5 MCU Min Liu Airport Coll, Binzhou Univrsity, Binzhou 56600, Chin; hitsworn@6.om Astrt In orr to tt irrt nin sp, n irrt nin sp ttion systm s on MCU is sin.

More information

C-201 Sheet Bar Measures 1 inch

C-201 Sheet Bar Measures 1 inch Janine M. lexander, P.. P.. No. 9, L 0 N. PRK RO, SUIT 0 HOLLYWOO, LORI 0 PHON: (9) - X: (9) 08- No.: 9 I ST SRIPTION Y GT VLVS SHLL RSILINT ST, MNUTUR TO MT OR X TH RQUIRMNTS O WW 09 (LTST RVISION) N

More information

CS 461, Lecture 17. Today s Outline. Example Run

CS 461, Lecture 17. Today s Outline. Example Run Prim s Algorithm CS 461, Ltur 17 Jr Si Univrsity o Nw Mxio In Prim s lgorithm, th st A mintin y th lgorithm orms singl tr. Th tr strts rom n ritrry root vrtx n grows until it spns ll th vrtis in V At h

More information

Exam 1 Solution. CS 542 Advanced Data Structures and Algorithms 2/14/2013

Exam 1 Solution. CS 542 Advanced Data Structures and Algorithms 2/14/2013 CS Avn Dt Struturs n Algorithms Exm Solution Jon Turnr //. ( points) Suppos you r givn grph G=(V,E) with g wights w() n minimum spnning tr T o G. Now, suppos nw g {u,v} is to G. Dsri (in wors) mtho or

More information

OpenMx Matrices and Operators

OpenMx Matrices and Operators OpnMx Mtris n Oprtors Sr Mln Mtris: t uilin loks Mny typs? Dnots r lmnt mxmtrix( typ= Zro", nrow=, nol=, nm="" ) mxmtrix( typ= Unit", nrow=, nol=, nm="" ) mxmtrix( typ= Int", nrow=, nol=, nm="" ) mxmtrix(

More information

Nefertiti. Echoes of. Regal components evoke visions of the past MULTIPLE STITCHES. designed by Helena Tang-Lim

Nefertiti. Echoes of. Regal components evoke visions of the past MULTIPLE STITCHES. designed by Helena Tang-Lim MULTIPLE STITCHES Nrtiti Ehos o Rgl omponnts vok visions o th pst sign y Hln Tng-Lim Us vrity o stiths to rt this rgl yt wrl sign. Prt sping llows squr s to mk roun omponnts tht rp utiully. FCT-SC-030617-07

More information

CSE 373: More on graphs; DFS and BFS. Michael Lee Wednesday, Feb 14, 2018

CSE 373: More on graphs; DFS and BFS. Michael Lee Wednesday, Feb 14, 2018 CSE 373: Mor on grphs; DFS n BFS Mihl L Wnsy, F 14, 2018 1 Wrmup Wrmup: Disuss with your nighor: Rmin your nighor: wht is simpl grph? Suppos w hv simpl, irt grph with x nos. Wht is th mximum numr of gs

More information

EXAMPLE 87.5" APPROVAL SHEET APPROVED BY /150HP DUAL VFD CONTROL ASSEMBLY CUSTOMER NAME: CAL POLY SLO FINISH: F 20

EXAMPLE 87.5 APPROVAL SHEET APPROVED BY /150HP DUAL VFD CONTROL ASSEMBLY CUSTOMER NAME: CAL POLY SLO FINISH: F 20 XMPL XMPL RVISIONS ZON RV. SRIPTION T PPROV 0.00 THIS IS N PPROVL RWING OR YOUR ORR. OR MNUTURING N GIN, THIS RWING MUST SIGN N RTURN TO MOTION INUSTRIS. NY HNGS M TO THIS RWING, TR MNUTURING HS GUN WILL

More information

Q11 Q12 BF423 BF422 BF422 Q5 BC184L R39 5K6 Q15 BF422 R59 39K C28 C30 100UF 100NF R40 1K5 C23 100NF R38 R36 220K Q13 BF422 Q14 BF423 R71 47R

Q11 Q12 BF423 BF422 BF422 Q5 BC184L R39 5K6 Q15 BF422 R59 39K C28 C30 100UF 100NF R40 1K5 C23 100NF R38 R36 220K Q13 BF422 Q14 BF423 R71 47R R R HT+ 0 00N/ 00V R 0R R K R 0R R9 K GT RSISTORS R - R LT+ 00U MP R 0P R 00N/ R0 R Q R 0K Q VR 0R Q Q R 0R R R Q Q9 R R R K R R R 0R Q Q Q0 R R9 Q R R R R Z V Z V R K 00U/ V 00U V 9 00U/ V R0 / Q R 00N

More information

V={A,B,C,D,E} E={ (A,D),(A,E),(B,D), (B,E),(C,D),(C,E)}

V={A,B,C,D,E} E={ (A,D),(A,E),(B,D), (B,E),(C,D),(C,E)} Introution Computr Sin & Enginring 423/823 Dsign n Anlysis of Algorithms Ltur 03 Elmntry Grph Algorithms (Chptr 22) Stphn Sott (Apt from Vinohnrn N. Vriym) I Grphs r strt t typs tht r pplil to numrous

More information

MM74C912 6-Digit BCD Display Controller/Driver

MM74C912 6-Digit BCD Display Controller/Driver 6-Digit BCD Display Controller/Driver General Description The display controllers are interface elements, with memory, that drive a 6-digit, 8-segment LED display. The display controllers receive data

More information

COMPLEXITY OF COUNTING PLANAR TILINGS BY TWO BARS

COMPLEXITY OF COUNTING PLANAR TILINGS BY TWO BARS OMPLXITY O OUNTING PLNR TILINGS Y TWO RS KYL MYR strt. W show tht th prolm o trmining th numr o wys o tiling plnr igur with horizontl n vrtil r is #P-omplt. W uil o o th rsults o uquir, Nivt, Rmil, n Roson

More information

Problem solving by search

Problem solving by search Prolm solving y srh Tomáš voo Dprtmnt o Cyrntis, Vision or Roots n Autonomous ystms Mrh 5, 208 / 3 Outlin rh prolm. tt sp grphs. rh trs. trtgis, whih tr rnhs to hoos? trtgy/algorithm proprtis? Progrmming

More information

N=4 L=4. Our first non-linear data structure! A graph G consists of two sets G = {V, E} A set of V vertices, or nodes f

N=4 L=4. Our first non-linear data structure! A graph G consists of two sets G = {V, E} A set of V vertices, or nodes f lulu jwtt pnlton sin towr ounrs hpl lpp lu Our irst non-linr t strutur! rph G onsists o two sts G = {V, E} st o V vrtis, or nos st o E s, rltionships twn nos surph G onsists o sust o th vrtis n s o G jnt

More information

5/7/13. Part 10. Graphs. Theorem Theorem Graphs Describing Precedence. Outline. Theorem 10-1: The Handshaking Theorem

5/7/13. Part 10. Graphs. Theorem Theorem Graphs Describing Precedence. Outline. Theorem 10-1: The Handshaking Theorem Thorm 10-1: Th Hnshkin Thorm Lt G=(V,E) n unirt rph. Thn Prt 10. Grphs CS 200 Alorithms n Dt Struturs v V (v) = 2 E How mny s r thr in rph with 10 vrtis h of r six? 10 * 6 /2= 30 1 Thorm 10-2 An unirt

More information

V={A,B,C,D,E} E={ (A,D),(A,E),(B,D), (B,E),(C,D),(C,E)}

V={A,B,C,D,E} E={ (A,D),(A,E),(B,D), (B,E),(C,D),(C,E)} s s of s Computr Sin & Enginring 423/823 Dsign n Anlysis of Ltur 03 (Chptr 22) Stphn Sott (Apt from Vinohnrn N. Vriym) s of s s r strt t typs tht r pplil to numrous prolms Cn ptur ntitis, rltionships twn

More information

ATF15xx-DK3 USER GUIDE. Introduction. Kit Contents. Device Support. CPLD Development/Programmer Kit

ATF15xx-DK3 USER GUIDE. Introduction. Kit Contents. Device Support. CPLD Development/Programmer Kit ATF5xx-DK CPLD Dvlopmnt/Prormmr Kit USER GUIDE Introution Th Atml ATF5xx-DK Complx Prormml Loi Dvi (CPLD) Dvlopmnt/Prormmr Kit is omplt vlopmnt systm n n In-Systm Prormmin (ISP) prormmr or th Atml ATF5xx

More information

Module 2 Motion Instructions

Module 2 Motion Instructions Moul 2 Motion Instrutions CAUTION: Bor you strt this xprimnt, unrstn tht you r xpt to ollow irtions EXPLICITLY! Tk your tim n r th irtions or h stp n or h prt o th xprimnt. You will rquir to ntr t in prtiulr

More information

Physics 222 Midterm, Form: A

Physics 222 Midterm, Form: A Pysis 222 Mitrm, Form: A Nm: Dt: Hr r som usul onstnts. 1 4πɛ 0 = 9 10 9 Nm 2 /C 2 µ0 4π = 1 10 7 tsl s/c = 1.6 10 19 C Qustions 1 5: A ipol onsistin o two r point-lik prtils wit q = 1 µc, sprt y istn

More information

Why the Junction Tree Algorithm? The Junction Tree Algorithm. Clique Potential Representation. Overview. Chris Williams 1.

Why the Junction Tree Algorithm? The Junction Tree Algorithm. Clique Potential Representation. Overview. Chris Williams 1. Why th Juntion Tr lgorithm? Th Juntion Tr lgorithm hris Willims 1 Shool of Informtis, Univrsity of Einurgh Otor 2009 Th JT is gnrl-purpos lgorithm for omputing (onitionl) mrginls on grphs. It os this y

More information

BCD-to-Seven-Segment Decoder / Driver (Internal Pull-up outputs) Package Code (Previous Code) PRDP0016AE-B (DP-16FV) B C LT BI/RBO RBI. f g a.

BCD-to-Seven-Segment Decoder / Driver (Internal Pull-up outputs) Package Code (Previous Code) PRDP0016AE-B (DP-16FV) B C LT BI/RBO RBI. f g a. H74LS48 -to-svn-smnt or / rivr (Intrnl Pull-up outputs) REJ030411 0300 Rv.3.00 Jul.22.2005 H74LS48 turs tiv hih outputs or rivin lmp urs. This iruit hs ull rippl lnkin input / output ontrols n lmp tst

More information

SP490/SP491. Full Duplex RS-485 Transceivers. Now Available in Lead Free Packaging

SP490/SP491. Full Duplex RS-485 Transceivers. Now Available in Lead Free Packaging SP490/SP491 Full uplx RS-485 Transcivrs FTURS +5V Only Low Powr icmos rivr/rcivr nal (SP491) RS-485 and RS-422 rivrs/rcivrs Pin Compatil with LTC490 and SN75179 (SP490) Pin Compatil with LTC491 and SN75180

More information

CS 5500 LOBBY CASH DISPENSER STANDARD AND FULL HEIGHT - FRONT LOAD

CS 5500 LOBBY CASH DISPENSER STANDARD AND FULL HEIGHT - FRONT LOAD L6 STNR N ULL IT - RONT LO mm ( ") UL S "LL IMNSIONS N SIN RITRI PROJTION P O RONT - STNR IT S PS and OR S 00 STNR IT TILS RONT - ULL IT S PS and OR S 00 ULL IT TILS IL NO. -66 RV. RR - STNR IT RR - ULL

More information

Installation manual. Daikin Altherma LAN adapter BRP069A61 BRP069A62. Installation manual Daikin Altherma LAN adapter. English

Installation manual. Daikin Altherma LAN adapter BRP069A61 BRP069A62. Installation manual Daikin Altherma LAN adapter. English Instlltion mnul Dikin Althrm LAN ptr BRP069A6 BRP069A6 Instlltion mnul Dikin Althrm LAN ptr English Tl of Contnts Tl of Contnts Th full st of ltst thnil t is vill on th Dikin xtrnt (uthntition rquir).

More information

Weighted Graphs. Weighted graphs may be either directed or undirected.

Weighted Graphs. Weighted graphs may be either directed or undirected. 1 In mny ppltons, o rp s n ssot numrl vlu, ll wt. Usully, t wts r nonntv ntrs. Wt rps my tr rt or unrt. T wt o n s otn rrr to s t "ost" o t. In ppltons, t wt my msur o t lnt o rout, t pty o ln, t nry rqur

More information

5 8 LED MAX6950/MAX6951 MAX6950/MAX6951 SPI TM QSPI TM MICROWIRE TM 7 LED LED 2.7V MAX LED MAX LED 16 (0-9 A-F) RAM 16 7 LED LED

5 8 LED MAX6950/MAX6951 MAX6950/MAX6951 SPI TM QSPI TM MICROWIRE TM 7 LED LED 2.7V MAX LED MAX LED 16 (0-9 A-F) RAM 16 7 LED LED 19-2227; Rev 1; 12/01 +2.7V SPI TM QSPI TM MICROWIRE TM 7 2.7V MAX6950 5 7 40 MAX6951 8 7 64 16 (0-9 A-F) RAM 16 7 EMI ( 1 8 ) 26MHz SPI/QSPI/MICROWIRE +2.7V 16 / EMI 75µA ( ) 16 QSOP PART TEMP. RANGE

More information

learning objectives learn what graphs are in mathematical terms learn how to represent graphs in computers learn about typical graph algorithms

learning objectives learn what graphs are in mathematical terms learn how to represent graphs in computers learn about typical graph algorithms rp loritms lrnin ojtivs loritms your sotwr systm sotwr rwr lrn wt rps r in mtmtil trms lrn ow to rprsnt rps in omputrs lrn out typil rp loritms wy rps? intuitivly, rp is orm y vrtis n s twn vrtis rps r

More information

CD4013BC Dual D-Type Flip-Flop

CD4013BC Dual D-Type Flip-Flop Dual D-Type Flip-Flop General Description The CD4013B dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors. Each

More information

COMP108 Algorithmic Foundations

COMP108 Algorithmic Foundations Grdy mthods Prudn Wong http://www.s.liv..uk/~pwong/thing/omp108/01617 Coin Chng Prolm Suppos w hv 3 typs of oins 10p 0p 50p Minimum numr of oins to mk 0.8, 1.0, 1.? Grdy mthod Lrning outoms Undrstnd wht

More information

NMEA 2000 GATEWAY ASSEMBLY

NMEA 2000 GATEWAY ASSEMBLY Noti NOTICE Atr omplting instllti, ths instrutis shoul pl with th prout or th ownr's utur us. NOTICE This oumnt is writtn to i our lrs n ompny srvi prsnl in th propr instllti or srvi o our prouts. Prss

More information

DISPLAY 1 DISPLAY 2 a. a b. a f. a f. b g. c d. c d. 16 x 2 HD44780 BASED ALPHANUMERIC DISPLAY LCD 16 X 2

DISPLAY 1 DISPLAY 2 a. a b. a f. a f. b g. c d. c d. 16 x 2 HD44780 BASED ALPHANUMERIC DISPLAY LCD 16 X 2 SEGMENT LE ISPLY R MUX MUX MUX MUX R nf SEG_ SEG_ SEG_ SEG_ SEG_ SEG_ SEG_ SEG_ U R xt P P P P P P P P MX MX ss SL S P P P P P P P P nf S SEG_SL SEG_S SEG_ SEG_ SEG_ SEG_ SEG_ SEG_ SEG_ SEG_ SEG_I_SL_

More information

SAMPLE PAGES. Primary. Primary Maths Basics Series THE SUBTRACTION BOOK. A progression of subtraction skills. written by Jillian Cockings

SAMPLE PAGES. Primary. Primary Maths Basics Series THE SUBTRACTION BOOK. A progression of subtraction skills. written by Jillian Cockings PAGES Primry Primry Mths Bsis Sris THE SUBTRACTION BOOK A prorssion o sutrtion skills writtn y Jillin Cokins INTRODUCTION This ook is intn to hlp sur th mthmtil onpt o sutrtion in hilrn o ll s. Th mstry

More information

Biddle Consulting Group s Standard AAP Reports

Biddle Consulting Group s Standard AAP Reports Bil Consultin Group s Stnr AAP Rports Th Workor Anlysis is h ount o mploys in ivn Orniztionl Unit, rokn own y nr n til r. It provis n ovrll mploymnt proil n intiis possil rs o isrimintion. Givs th prtmnt

More information

CS 241 Analysis of Algorithms

CS 241 Analysis of Algorithms CS 241 Anlysis o Algorithms Prossor Eri Aron Ltur T Th 9:00m Ltur Mting Lotion: OLB 205 Businss HW6 u lry HW7 out tr Thnksgiving Ring: Ch. 22.1-22.3 1 Grphs (S S. B.4) Grphs ommonly rprsnt onntions mong

More information

Overview. Usages of Fault Simulators. Problem and Motivation. Alternatives and Their Limitations. VLSI Design Verification and Testing

Overview. Usages of Fault Simulators. Problem and Motivation. Alternatives and Their Limitations. VLSI Design Verification and Testing VLSI Dsin Vriiction n Tstin Fult Simultion Mohmm Thrnipoor Elctricl n Computr Eninrin Univrsity o Conncticut Ovrviw Prolm n motivtion Fult simultion lorithms Sril Prlll Ductiv Concurrnt Othr lorithms Rnom

More information

Complete Solutions for MATH 3012 Quiz 2, October 25, 2011, WTT

Complete Solutions for MATH 3012 Quiz 2, October 25, 2011, WTT Complt Solutions or MATH 012 Quiz 2, Otor 25, 2011, WTT Not. T nswrs ivn r r mor omplt tn is xpt on n tul xm. It is intn tt t mor omprnsiv solutions prsnt r will vlul to stunts in stuyin or t inl xm. In

More information

Page 1. Question 19.1b Electric Charge II Question 19.2a Conductors I. ConcepTest Clicker Questions Chapter 19. Physics, 4 th Edition James S.

Page 1. Question 19.1b Electric Charge II Question 19.2a Conductors I. ConcepTest Clicker Questions Chapter 19. Physics, 4 th Edition James S. ConTst Clikr ustions Chtr 19 Physis, 4 th Eition Jms S. Wlkr ustion 19.1 Two hrg blls r rlling h othr s thy hng from th iling. Wht n you sy bout thir hrgs? Eltri Chrg I on is ositiv, th othr is ngtiv both

More information

CSE 373: AVL trees. Warmup: Warmup. Interlude: Exploring the balance invariant. AVL Trees: Invariants. AVL tree invariants review

CSE 373: AVL trees. Warmup: Warmup. Interlude: Exploring the balance invariant. AVL Trees: Invariants. AVL tree invariants review rmup CSE 7: AVL trs rmup: ht is n invrint? Mihl L Friy, Jn 9, 0 ht r th AVL tr invrints, xtly? Disuss with your nighor. AVL Trs: Invrints Intrlu: Exploring th ln invrint Cor i: xtr invrint to BSTs tht

More information

DUET WITH DIAMONDS COLOR SHIFTING BRACELET By Leslie Rogalski

DUET WITH DIAMONDS COLOR SHIFTING BRACELET By Leslie Rogalski Dut with Dimons Brlt DUET WITH DIAMONDS COLOR SHIFTING BRACELET By Lsli Roglski Photo y Anrw Wirth Supruo DUETS TM from BSmith rt olor shifting fft tht mks your work tk on lif of its own s you mov! This

More information

160 SSC Variable Speed Drive (Series C)

160 SSC Variable Speed Drive (Series C) 0 SS Variable Speed rive (Series ) Publication 0-P onfigured rive Package Important User Information Solid state equipment has operational characteristics differing from those of electromechanical equipment.

More information

Math 61 : Discrete Structures Final Exam Instructor: Ciprian Manolescu. You have 180 minutes.

Math 61 : Discrete Structures Final Exam Instructor: Ciprian Manolescu. You have 180 minutes. Nm: UCA ID Numr: Stion lttr: th 61 : Disrt Struturs Finl Exm Instrutor: Ciprin nolsu You hv 180 minuts. No ooks, nots or lultors r llow. Do not us your own srth ppr. 1. (2 points h) Tru/Fls: Cirl th right

More information

KND 44 KND 08 KAD 08

KND 44 KND 08 KAD 08 KND KND 08 Kit Numril Disply + n 8 iit KAD 08 Kit Alphnumril Disply 8 iit TECHNICAL MANUAL Vi ll' Artiino, 8/6 0016 Sn Giorio i Pino (Bolon) ITALY E-mil: rio@rio.it http://www.rio.it http://www.rio.om

More information

In order to learn which questions have been answered correctly: 1. Print these pages. 2. Answer the questions.

In order to learn which questions have been answered correctly: 1. Print these pages. 2. Answer the questions. Crystl Rports for Visul Stuio.NET In orr to lrn whih qustions hv n nswr orrtly: 1. Print ths pgs. 2. Answr th qustions. 3. Sn this ssssmnt with th nswrs vi:. FAX to (212) 967-3498. Or. Mil th nswrs to

More information

CD74HC93, CD74HCT93. High Speed CMOS Logic 4-Bit Binary Ripple Counter. Description. Features. Pinout. Ordering Information

CD74HC93, CD74HCT93. High Speed CMOS Logic 4-Bit Binary Ripple Counter. Description. Features. Pinout. Ordering Information Data sheet acquired from Harris Semiconductor SCHS138 August 1997 CD74HC93, CD74HCT93 High Speed CMOS Logic 4-Bit Binary Ripple Counter [ /Title (CD74 HC93, CD74 HCT93 ) /Subject High peed MOS ogic -Bit

More information

Algorithmic and NP-Completeness Aspects of a Total Lict Domination Number of a Graph

Algorithmic and NP-Completeness Aspects of a Total Lict Domination Number of a Graph Intrntionl J.Mth. Comin. Vol.1(2014), 80-86 Algorithmi n NP-Compltnss Aspts of Totl Lit Domintion Numr of Grph Girish.V.R. (PES Institut of Thnology(South Cmpus), Bnglor, Krntk Stt, Ini) P.Ush (Dprtmnt

More information

0.1. Exercise 1: the distances between four points in a graph

0.1. Exercise 1: the distances between four points in a graph Mth 707 Spring 2017 (Drij Grinrg): mitrm 3 pg 1 Mth 707 Spring 2017 (Drij Grinrg): mitrm 3 u: W, 3 My 2017, in lss or y mil (grinr@umn.u) or lss S th wsit or rlvnt mtril. Rsults provn in th nots, or in

More information

Integration Continued. Integration by Parts Solving Definite Integrals: Area Under a Curve Improper Integrals

Integration Continued. Integration by Parts Solving Definite Integrals: Area Under a Curve Improper Integrals Intgrtion Continud Intgrtion y Prts Solving Dinit Intgrls: Ar Undr Curv Impropr Intgrls Intgrtion y Prts Prticulrly usul whn you r trying to tk th intgrl o som unction tht is th product o n lgric prssion

More information