CoolMOS TM Power Transistor

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CoolMOS TM Power Transistor Features New revolutionary high voltage technology Extreme dv/dt rated High peak current capability Product Summary V DS 8 V R DS(on)max @ T j = 25 C.

1 CoolMOS TM Power Transistor Features New revolutionary high voltage technology Extreme dv/dt rated High peak current capability Product Summary V DS 8 V R T j = 25 C.9 Ω Q g,typ 31 nc Qualified according to JEDEC 1) for target applications Pb-free lead plating; RoHS compliant Ultra low gate charge Ultra low effective capacitances Fully isolated package (25 VAC; 1 minute) CoolMOS TM 8V designed for: Industrial application with high DC bulk voltage Switching Application ( i.e. active clamp forward ) Type Package Marking PG-TO22-3 6N8C3 Maximum ratings, at T j =25 C, unless otherwise specified Parameter Symbol Conditions Value Unit Continuous drain current 2) I D T C =25 C 6 A T C =1 C Pulsed drain current 3) I D,pulse T C =25 C Avalanche energy, single pulse E AS I D =1.2 A, V DD =5 V 23 mj Avalanche energy, repetitive t AR 3),4) E AR I D =6 A, V DD =5 V.2 3),4) Avalanche current, repetitive t AR I AR 6 A MOSFET dv /dt ruggedness dv /dt V DS = 64 V 5 V/ns Gate source voltage V GS static ±2 V AC (f >1 Hz) ±3 Power dissipation P tot T C =25 C 39 W Operating and storage temperature T j, T stg C Mounting torque M2.5 screws 5 Ncm Rev Page

2 Maximum ratings, at T j =25 C, unless otherwise specified Parameter Symbol Conditions Value Unit Continuous diode forward current I S T C =25 C 6 A Diode pulse current 3) I S,pulse 18 Reverse diode dv /dt 5) dv /dt 4 V/ns Parameter Symbol Conditions Values Unit min. typ. max. Thermal characteristics Thermal resistance, junction - case R thjc K/W Thermal resistance, junction - ambient R thja leaded Soldering temperature, wave soldering only allowed at leads T sold 1.6 mm (.63 in.) from case for 1s C Electrical characteristics, at T j =25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS = V, I D =25 µa V Avalanche breakdown voltage V (BR)DS V GS = V, I D =6 A Gate threshold voltage V GS(th) V DS =V GS, I D =.25 ma Zero gate voltage drain current I DSS V DS =8 V, V GS = V, T j =25 C V DS =8 V, V GS = V, T j =15 C µa Gate-source leakage current I GSS V GS =2 V, V DS = V na Drain-source on-state resistance R DS(on) V GS =1 V, I D =3.8 A, T j =25 C V GS =1 V, I D =3.8 A, T j =15 C Ω Gate resistance R G f =1 MHz, open drain Ω Rev Page

3 Parameter Symbol Conditions Values Unit Dynamic characteristics min. typ. max. Input capacitance C iss V GS = V, V DS =1 V, pf Output capacitance C oss f =1 MHz Effective output capacitance, energy related 6) C o(er) V GS = V, V DS = V to 48 V Effective output capacitance, time related 7) C o(tr) Turn-on delay time t d(on) ns Rise time t r V DD =4 V, V GS =/1 V, I D =6 A, Turn-off delay time t d(off) R G =15?, T j =25 C Fall time t f Gate Charge Characteristics Gate to source charge Q gs nc Gate to drain charge Q gd V DD =64 V, I D =6 A, Gate charge total Q g V GS = to 1 V Gate plateau voltage V plateau V Reverse Diode Diode forward voltage V SD V GS = V, I F =I S =6 A, T j =25 C V Reverse recovery time t rr ns Reverse recovery charge Q rr V R =4 V, I F =I S =6 A, di F /dt =1 A/µs µc Peak reverse recovery current I rrm A 1) J-STD2 and JESD22 2) Limited only by maximum temperature 3) Pulse width t p limited by T j,max 4) Repetitive avalanche causes additional power losses that can be calculated as P AV =E AR *f. 5) I SD =I D, di/dt=4a/µs, V DClink = 4V, V peak <V (BR)DSS, T j <T jmax, identical low side and high side switch 6) C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from to 8% V DSS. 7) C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from to 8% V DSS. Rev Page

4 1 Power dissipation 2 Safe operating area P tot =f(t C ) I D =f(v DS ); T C =25 C; D = parameter: t p limited by on-state resistance µs 1 µs P tot [W] 2 I D [A] 1 µs 1 ms 1 1 ms 1 DC T C [ C] V DS [V] 3 Max. transient thermal impedance 4 Typ. output characteristics Z thjc =f(t P ) I D =f(v DS ); T j =25 C; t p =1 µs parameter: D=t p /T 1 1 parameter: V GS 2 2 V V Z thjc [K/W] I D [A] V V single pulse V 5 V t p [s] V DS [V] Rev Page

5 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D =f(v DS ); T j =15 C; t p =1 µs R DS(on) =f(i D ); T j =15 C parameter: V GS 12 parameter: V GS V 2 V 6 V I D [A] V 5 V 5.5 V R DS(on) [Ω] V 5 V 5.5 V 6 V 1 V 2 V V DS [V] I D [A] 7 Drain-source on-state resistance 8 Typ. transfer characteristics R DS(on) =f(t j ); I D =3.8 A; V GS =1 V I D =f(v GS ); V DS >2 I D R DS(on)max ; t p =1 µs parameter: T j C R DS(on) [Ω] % typ I D [A] 1 15 C T j [ C] V GS [V] Rev Page

6 9 Typ. gate charge 1 Forward characteristics of reverse diode V GS =f(q gate ); I D =6 A pulsed I F =f(v SD ); t p =1 µs parameter: V DD 1 parameter: T j V 25 C (98 C) 6 64 V C 15 C 15 C (98%) V GS [V] I F [A] Q gate [nc] V SD [V] 11 Avalanche energy 12 Drain-source breakdown voltage E AS =f(t j ); I D =1.2 A; V DD =5 V V BR(DSS) =f(t j ); I D =.25 ma E AS [mj] 15 1 V BR(DSS) [V] T j [ C] T j [ C] Rev Page

7 13 Typ. capacitances 14 Typ. Coss stored energy C =f(v DS ); V GS = V; f =1 MHz E oss = f(v DS ) Ciss 4 C [pf] 1 2 Coss E oss [µj] Crss V DS [V] V DS [V] Rev Page

8 Definition of diode switching characteristics Rev Page

9 Outline PG TO22 FullPAK MILLIMETERS DIMENSIONS MIN. MAX. DOCUMENT NO. A Z8B3319 A A REVISION b b b SCALE 5:1 b mm b c.4.63 D D EUROPEAN PROJECTION E e 2.54 H L L1 øp ISSUE DATE Q Rev Page

10 8VCoolMOSªC3PowerTransistor RevisionHistory Revision: ,Rev.2.92 Previous Revision Revision Date Subjects (major changes since last revision) Outline PG-TO-22 FullPAK update TrademarksofInfineonTechnologiesAG AURIX,C166,CanPAK,CIPOS,CoolGaN,CoolMOS,CoolSET,CoolSiC,CORECONTROL,CROSSAVE,DAVE,DI-POL,DrBlade, EasyPIM,EconoBRIDGE,EconoDUAL,EconoPACK,EconoPIM,EiceDRIVER,eupec,FCOS,HITFET,HybridPACK,Infineon, ISOFACE,IsoPACK,i-Wafer,MIPAQ,ModSTACK,my-d,NovalithIC,OmniTune,OPTIGA,OptiMOS,ORIGA,POWERCODE, PRIMARION,PrimePACK,PrimeSTACK,PROFET,PRO-SIL,RASIC,REAL3,ReverSave,SatRIC,SIEGET,SIPMOS,SmartLEWIS, SOLIDFLASH,SPOC,TEMPFET,thinQ,TRENCHSTOP,TriCore. TrademarksupdatedAugust215 OtherTrademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.pleasesendyourproposal(includingareferencetothisdocument)to: Publishedby InfineonTechnologiesAG 81726München,Germany 218InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics ( Beschaffenheitsgarantie ). Withrespecttoanyexamples,hintsoranytypicalvaluesstatedhereinand/oranyinformationregardingtheapplicationofthe product,infineontechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithoutlimitation warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Inaddition,anyinformationgiveninthisdocumentissubjecttocustomer scompliancewithitsobligationsstatedinthis documentandanyapplicablelegalrequirements,normsandstandardsconcerningcustomer sproductsandanyuseofthe productofinfineontechnologiesincustomer sapplications. Thedatacontainedinthisdocumentisexclusivelyintendedfortechnicallytrainedstaff.Itistheresponsibilityofcustomer s technicaldepartmentstoevaluatethesuitabilityoftheproductfortheintendedapplicationandthecompletenessoftheproduct informationgiveninthisdocumentwithrespecttosuchapplication. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice( Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestinfineontechnologiesoffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofinfineontechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. 1 Rev.2.92,

Product Summary V DS V. R DS(on),max V GS =10 V mw I D A. Parameter Symbol Conditions Value Unit T C =70 C, V GS =4.

Product Summary V DS V. R DS(on),max V GS =10 V mw I D A. Parameter Symbol Conditions Value Unit T C =70 C, V GS =4. BSG811ND Power Block Features Dual asymmetric N-channel OptiMOS 5 MOSFET Logic level (4.5V rated) Optimized for high performance buck converters Qualified according to JEDEC 1) for target applications