Stochastic Dynamic Thermal Management: A Markovian Decision-based Approach

Transcription

1 Schsic Dynmic Therml Mngemen: A Mrkvin Decisin-bsed Apprch Hwisung Jung, Mssud Pedrm Deprmen f Elecricl Engineering, Universiy f Suhern Clifrni {hwijung, pedrm}@usc.edu Absrc - This pper prpses schsic dynmic herml mngemen (DTM) echnique in high-perfrmnce VLSI sysem wih especil enin he unceriny in emperure bservin. Mre specificlly, we prpse schsic herml mngemen frmewrk imprve he ccurcy f decisin mking in DTM, which perfrms dynmic vlge nd frequency scling minimize l pwer dissipin nd nchip emperure. A key chrcerisic f he frmewrk is h herml ses re cnrlled by schsic prcesses, i.e., prilly bservble semi-mrkv decisin prcesses. Cllbrive pimizin is cnsidered wih mhemicl prgrmming frmulins reduce pering emperure by using muli-bjecive design pimizin mehds. Experimenl resuls wih 32bi embedded RISC prcessr demnsre he effeciveness f he echnique nd shw h he prpsed lgrihm ensures herml sfey under perfrmnce cnsrins. I. ITRODUCTIO "Smller nd fser" re he chief demnds driving dy's elecrnic designs becuse hey generlly men higher perfrmnce. Hwever, hey ls rnsle in high pwer densiies, higher pering emperures nd lwer circui relibiliy. Furhermre, lcl h sps, which hve much higher emperures cmpred he verge die emperure, re becming mre prevlen in VLSI circuis. Wih cmpnen pckges becming mre cmpc nd hving smller physicl prfiles, i is n lnger sufficien merely dd " bigger fn" s dwnsrem fix fr herml prblems. Becuse he flw mus be plnned nd herml resisnces minimized, herml mngemen is bes ccmplished when i is incrpred sring he beginning f he design cycle. In ddiin, lhugh wrs-cse heing cndiins seldm rise in circui during is lifeime, when hey d rise, hey cn cuse significn prblems, rnging frm circui rnsien iming errrs cmplee csrphic burnu. A pckge designed fr he wrs cse is excessive. Any pplicins h genere he shuld engge n lernive, runime herml-mngemen echnique (dynmic herml mngemen r DTM). Since ypicl high-pwer pplicins sill pere 2% r mre belw he wrs cse [], his cn led drmic svings. This is he philsphy behind he herml design f he Inel Penium 4. As evidenced in he recen lierure [2][3][4][5], incresing ineres hs fcused n dynmic herml mngemen. The wrk presened in [2] sudies he rchiecurl-level herml mdel, HSp, nd mngemen bsed n n equivlen circui mdels h crrespnds micr-rchiecure blcks. The rigger mechnism used cl he micrprcessr s emperure wih DTM hs been derived in [3] by using Wch. Predicive DTM [4], which explis cerin prperies f mulimedi pplicins, is n exmple f nline sregies fr herml mngemen. In reference [5], uhrs hve ckled he perfrmnce pimizin prblem fr disk drives by sudying he iner-relinship beween cpciy, perfrmnce, nd herml chrcerisics f disk drives. A gd summry f reserch h cmbines herml mngemen echniques nd penil risks is given in [6]. Alhugh ms f he previus wrks n DTM hs cncenred n herml mdeling nd simulin circui, ge, nd rchiecure levels, less enin hs been pid herml mngemen sysem level. Furhermre, hese DTM echniques, which depend n he use f emperure sensrs, cn hrdly bserve he pek pwer dissipin nd resuling pek emperure due he nn-unifrm pwer densiy crss chip. Thus, imprn specs cnribuing he dvncemen f herml-mnged sysem design is he biliies fully mdel nd chrcerize he herml behvir f he sysem. In priculr, since emperure vriin crss chip cn resul in significn unceriny in emperure bservin, imprving he ccurcy f decisin mking in herml mngemen by mdeling nd ssessing he unceriny is n imprn sep gurnee he quliy f he cnsumer elecrnics. I is believed h prmp regulin f n-chip emperure by DTM mus be cmbined wih dynmic vlge nd frequency scling (DVFS), which hs prven be n effecive echnique fr reducing l pwer cnsumpin [7], ensure higher herml sfey f he chips. In lierure, severl wrks [8][9] hve been prpsed n cmbining DVFS nd dynmic pwer mngemen bsed n schsic prcesses. Hwever, he bes f ur knwledge, n prpsed reserch wrk is cnduced n cmbining DTM nd DVFS echniques in schsic mdeling wih he unceriny in emperure bservin. This is specificlly he cnribuin f he presen pper. In his pper, we prpse schsic dynmic herml mngemen (SDTM) echnique cnrl he emperure f he sysem nd is pwer dissipin. we presen sysemic pprch fr mdeling schsic herml mngemen

2 frmewrk, which is bsed n i) prilly bservble Mrkv decisin prcess [] mdel he unceriny in emperure bservin nd ii) semi-mrkv decisin prcess mdel decisin mking fr DVFS. Mrkv decisin prcess mdel ffers rbus hereicl frmewrk which enbles ne pply srng mhemicl pimizin echniques in rder derive piml herml mngemen plicies fr herml-mnged sysem. Furhermre, muli-bjecive design pimizin mehd, which invlves he crdinin f muliple disciplinry perfrmnce cnsrins, is used relize mre effecive sluin. The reminder f his pper is rgnized s fllws. Secin 2 prvides he brief bckgrund n emperure prfile idenificin. The deil f schsic herml mngemen frmewrk is presened in secin 3. Secin 4 shws dynmic herml mngemen lgrihm. Experimenl resuls nd cnclusin re given in secin 5 nd secin 6. II. BACKGROUD: TEMPERATURE PROFILE IDETIFICATIO Temperure reding cn be perfrmed by eiher exernl r inernl emperure sensrs. Exernl emperure sensrs, sclled herm cuples, suffer ime-dely in he emperure reding due he herml cnsn frm he inegred circui he exernl sensr. Thus, inernl emperure sensrs, e.g., nlg CMOS sensrs r ring scillrs, which cn be deplyed in lrge number crss chip, hve been widely used in pursui f gre ccurcy in mesuring emperure wih quick respnse ime. Hwever, his pprch sill hs cler limiins. Fr exmple, ring scillr-bsed herml sensrs hve prblems in lrge re size nd lw ccurcy. Anlg CMOS sensrs, lhugh very successful in ccurcy nd size, re in generl sensiive nise n pwer nd grund lines. Furhermre, sensr upu is ffeced by prcess vriin n lw emperure []. T cmpense fr hese clibrin prblems, we cn deply muliple herml sensrs crss chip, bu we dd n he verll pwer cnsumpin s well s re size. I is cler h here is rde-ff beween efficiency nd ccurcy in herml mngemen due he lrge number f he surces in chip. The nn-unifrm n-chip emperure is relized due lrge emperure vriins crss chip, which cn be ffeced by he differen he diffusin lengh [2]. sr lu shifer mul regfile doureg dareg iareg buscl incr execue decde fech Temperure [ºC] y (mm).. x (mm) () (b) Figure. Temperure prfile idenificin: () flrpln. (b) emperure disribuin. A criicl prblem in emperure prfile idenificin induced by emperure vriin is s fllws: suppse h CMOS herml sensrs, which hve chrcerisics s explined bve, re implemened lng wih he prcessrs r funcinl.2 blcks in chip. Due ) he limiin f sensr deplymen in he chip, e.g., he number, size, nd lcin f he sensrs, nd b) nn-unifrm emperure disribuin crss chip, hese sensrs my be reme frm he h sps f ineres, which incurs he unceriny in emperure bservin. Figure shws he exmple f nn-unifrm emperure disribuin bined by running gcc (SPECin2) [2] n RISC prcessr designed by he uhrs. The vlues f herml prmeers were exrced frm he cmmercil d shee fr QFP pckge. The verge emperure cn be esimed using he fllwing equin, T = T + θ ( P + P + P + P ) () chip j s / w s / c sic in where T is he mbien emperure (25 C), θ j is he herml resisiviy [ C/W] f he chsen pckge, nd P s/w is he swiching cmpnen f pwer, P s/c is he shr-circui pwer, P sic is he lekge pwer, nd P in is he inernl chrge/dischrge pwer. III. THERMAL MAAGEMET FRAMEWORK We presen hereicl frmewrk cnsruc herml mngemen prcess under he emperure unceriny by cmbining he schsic prcesses. A. POSMDP Frmulin The unceriny prblem in emperure bservin, where herml mnger cnn relibly idenify he herml se f he chip during herml mngemen, cn be slved by mdeling decisin mking by schsic prcesses. e h herml mnger, which bserves he verll herml se nd issues cmmnds (r cins) cnrl he herml ses f he sysem, mkes decisin ech even ccurrence, clled decisin epchs. These cins nd herml ses deermine he prbbiliy disribuin ver pssible nex ses. Thus, he sequence f herml ses f he sysem cn be mdeled s schsic prcess. We use semi-mrkv decisin prcess (SMDP) mdel he even-driven decisin mking, bu ls cmbine i wih prilly bservble Mrkv decisin prcess (POMDP) cnsider he unceriny in emperure bservin. ice h he ime spen in priculr se in he SMDP fllws n rbirry prbbiliy disribuin, which is mre relisic ssumpin hn n expnenil disribuin. A prilly bservble semi-mrkv decisin prcess (POSMDP) exends he SMDP mdel by incrpring n bservin mdel, which is defined s fllws. Definiin : Prilly Observble Semi-Mrkv Decisin Prcess. A POSMDP is uple (S, A, O, T, R, Z) such h ) S is finie se f ses. 2) A is finie se f cins. 3) O is finie se f bservins. 4) T is rnsiin prbbiliy funcin. T: S A (S) 5) R is rewrd funcin. R: S A R 6) Z is n bservin funcin. Z: S A (Z) where ( ) denes he se f prbbiliy disribuins. Figure 2 shws he POSMDP frmewrk fr he dynmic herml mngemen. A priculr insnce in ime, chip emperure se is defined s rnge f emperures. The rnges re in urn defined by he emperure hreshlds frm he

3 ACPI (Advnced Cnfigurin nd Pwer Inerfce) specificin [3]. Fr exmple, given single emperure sensr n chip, nd ssuming emperure rnge f 5 9 C, hen we define he chip emperure se ime be ne f hree ses: s, s 2, r s 3 s shwn in he figure. The chip emperure evlves ver ime (i.e., he emperure se f he chip chnges) frm ime +. e h he ime unis re bsrcly defined nd he sk f csing hem in bslue ime unis (micr r milli secnds) is chieved by he sysem develper bsed n he ime cnsns sscied wih he diffusin mng her fcrs. Se s 3 = [75 C emp < 9 C] s 2 = [65 C emp < 75 C] s = [5 C emp < 65 C] Acin 3 = [.95V / 5MHz] 2 = [.8V / 35MHz] = [.65V / 2MHz] herml mnger Se + Figure 2. POSMDP Frmewrk. s 3 = [75 C emp < 9 C] s 2 = [65 C emp < 75 C] s = [5 C emp < 65 C] We ssume h he herml mngemen ccurs nly when he sysem is in is cive mde. The herml mnger cn chse n cin frm finie se f cins, i.e., dynmic vlge nd frequency scling (DVFS) ses, decisin epchs. Fr exmple, in Figure 2, he cin se includes hree pssible cins crrespnding.95v supply nd 5 MHz CPU clck speed,.8v nd 35MHz, ec. The disribuin f he ime durin beween he decisin epchs, which is se nd cin dependen, is given by F ( s, ) = G ( ) fr (2) where G() is n rbirry disribuin funcin rising in urn frm chrcerisics f wrkld f he sysem. In prilly bservble envirnmens, bservins re prbbilisiclly dependen n he underlying chip emperure. Trnsiin prbbiliy funcin deermines he prbbiliy f rnsiin frm herml se s herml se s fer execuing cin, i.e., T(s,, s) = Prb(s + = s =, s = s). Le p (s, s, ) dene he prbbiliy h s cnsequence f chsing cin when he sysem herml se is s, he se equls s fer ime. w, we cn cmpue he prbbiliy h he sysem will be in herml se s fr he nex decisin epch fer chsing cin in se s s Prb( s ' s, ) = p ( s, s ', ) γ d = T( s',, s) F( s, ) γ d where γ is discun fcr, γ <. p (s, s, ) cn be used clcule he expeced rnsiin ime beween decisin epchs. Cnsidering cs funcin, we ssume he cnveninl pprch whereby he expeced cs is lump-sum cs k(s, ) incurred when cin is chsen in se s []. An bservin funcin, which specifies he relinship beween he herml In his pper, subscrips dene se infrmin wheres superscrips dene ime smp. (3) ses nd bservins, cn be defined s he prbbiliy f mking bservin in s fer perfrming, i.e., Z(, s, ) = Prb( + = =, s + = s ). B. Plicy Represenin In prilly bservble envirnmen, since herml mnger cnn fully bserve he underlying emperure prfile f he prcessr, i cn mke decisins bsed n he bservble sysem hisry H, where he sysem hisry is sequence f se nd cin pir such s <s, >, <s, >,, <s, >, mking his nn-mrkvin prcess. Hwever, by using he belief se spce B, prperly upded prbbiliy disribuin ver he herml se S, we cn cnver he riginl POSMDP in fully bservble SMDP, s-clled belief se SMDP [4]. The belief se fr se s is dened s b(s), nd he sum f belief ses ver ll se is equl. A prperly upded belief se b (s ), fer cin nd bservin, cn be clculed frm he previus belief se b(s) s fllws. b'( s') = s S s S s' S Prb( s', s, ) b( s) Prb( s ', s, ) b( s) In his frmul, Prb(s, s, ) represens he prbbiliy f he sysem mving se s when herml mnger bserves emperure if he previus se is s nd he execued cin is, i.e., Prb(s, s, ) = Z(, s, )T(s,, s). A herml mnger s gl is chse plicy h minimizes cs funcin, C h is defined n he se f sysem hisry H. Le : B A represen sinry plicy h mps prbbiliy disribuin ver ses cins. By incrpring expecin ver cins, he cs f sinry plicy cn be deermined by using Bellmn equin [5] s s S C ( b) = b( s) k( s, ) + γ Z( s, ', ) T( s', s, ) C ( b') O s' S s S Simply speking, herml mnger mus execue he cin prescribed by plicy, nd hen upde is prbbiliy disribuin ver he sysem s herml ses ccrding (4). The piml cin ke b is bined by (4) (5) * ( b ) = rgmin C ( b ) (6) A A sndrd mehd f finding he piml infinie plicy is iere cs funcin fr SMDP by using sequence f piml finie cs funcins. Acin 2 3 Tble. Prmeer vlues fr given exmple. Descripin [.65V / 2MHz] [.8V / 35MHz] [.95V / 5MHz] cs [ k(s, ) k(s 2, ) k(s 3, ) ] [.5 ] [ ] [.5 ] Se, Descripin s, [5 C emp < 65 C] s 2, 2 [65 C emp < 75 C] s 3, 3 [75 C emp < 9 C] An exmple f cs ierin fr POSMDP mdel is given s fllws. Cnsider he POSMDP mdel f herml mnger wih hree ses, S = {s, s 2, s 3 }, hree cins, A = {, 2, 3 }, nd hree bservins, O = {, 2, 3 }, where prmeer vlues re given in Tble. Assume h he curren belief se is [.3.5.2] s shwn in Figure 3 (), where Σ s S b s =. Then, he

4 vlue f ding cin in his belief se is.95 (=.3*.5 +.5* +.2*) bsed n (5). Similrly, cins 2 nd 3 hve vlues.5 nd.8, respecively. Thus, cin 2 is chsen. Furhermre, since we hve finie number f cins nd bservins, here re finie number f pssible nex belief ses. Figure 3 (b) shws he belief se evluin when we fix ur firs cin be 2. Even hugh we knw he cin wih he ceriny, he bservin is n knwn in dvnce since he bservins re prbbilisic. The resn why here re hree pssible bservins fr given cin, e.g., 2 = [.8V / 35MHz], is depiced in Figure 4 wih he fllwing hree cses: ) he sysem remins in he cive mde wih sedy wrkld fer 2 is chsen, resuling in he sme chip emperure. b) The sysem remins in he cive mde, bu emperure increses due hevy wrkld fer 2 is chsen. c) The sysem eners in he idle mde fer 2 is chsen, resuling in lw emperure. Fr given belief se, ech bservin hs cerin prbbiliy sscied wih i. Suppse h we cmpue he prbbiliy f geing ech f he hree bservins nd he css f he resuling belief ses when cin 2 is chsen such s Prb(s, s 2, 2 )=.2, Prb(s 2, 2 s 2, 2 )=.5, Prb(s 3, 3 s 2, 2 )=.3 nd C * (b )=.7, C * (b 2 )=.2, C * (b 3 )=.8. Then, he cs f belief se when sysem chses 2 is.93, including he immedie cs. Thus, given n iniil belief se b, he piml plicy cn be fund by ging hrugh he se f ll useful plicy nd finding he ne whse cs funcin is minimized wih respec b. s s 3 curren belief se [ b b 2 b 3 ] b + b 2 + b 3 = s 2 s s Figure 3. A grphicl represenin f belief se: () curren belief se. (b) new belief se when 2 is chsen. 2 = [.8V / 35MHz] 2 = [.8V / 35MHz] s 2 2 = [.8V / 35MHz] () (b) (c) Figure 4. Exmple f hree pssible bservins. The prcess f minining he belief se is Mrkvin, which mens h he belief se SMDP prblem cn be slved by dping he vlue ierin lgrihm. The deil f he vlue ierin prblem fr he SMDP, which cn be slved in similr mnner s in [], is mied sve spce. IV. SDTM In his secin, we presen schsic dynmic herml mngemen (SDTM) lgrihm bsed n he POSMDP frmewrk cnrl he emperure f he sysem nd is pwer dissipin. A. SDTM Algrihm Since he number f cins nd bservins fr he POSMDP is finie, he se f ll plicies fr sysem hisry H cn be represened by he se f plicy rees s shwn in Figure 5 (). Assuming number f bservin ses, chices f cins, nd -sges plicy ree, he size f ll pssible H-plicy ree cn be clculed s = H = The digrm f SDTM is shwn in Figure 5 (b), where he ses f he sysem re divided in hree mdes. In he cive mde, he sysem cn swich beween differen speed levels, i.e., pwer-sving ses, mnged by herml mnger, resuling in pwer minimizin. In he digrm, we use n bservin sregy Λ, se f pir (, ψ), which is defined s fllws. Definiin 2: sregy. In plicy ree, n bservin sregy is defined s ψ : O Λ such h ) O is finie se f bservins 2) Λ = {(, ψ) A, ψ Λ } where A is finie se f cins, nd Λ is finie se f ll plicy rees. A priculr bservin sregy ells he SDTM wh cin perfrm, nd wh d nex cningen n n bservin received. Since he bservin sregy is sge-dependen, i.e., he bservin sregy f sge cn be defined in erms f bservin sregy f - sge, plicy ree herefre crrespnds n bservin sregy. cin 2 n cin cin cin cin cin cin = H = = () H -sges Dynmic herml mnger clcule b, C sleep cive sysem (b) (, ψ) idle Figure 5. SDTM: () plicy ree. (b) he digrm f herml mngemen. Figure 6 shws he schsic dynmic herml mngemen lgrihm bsed n n bservin sregy. The SDTM lgrihm wih n ses kes O(n) nd O(n) imes fr finding n piml cin nd upding he sysem hisry, respecively, which resuls in l O(n 2 ) running ime. Algrihm Schsic Dynmic Therml Mngemen Algrihm n: he number f ses inpu: : bserve emperure 2: fr i = n 3: if ( i = ) 4: clcule belief se b 5: clcule cs C 6: d bservin sregy ψ 7: fr j = n 8: if (s j = ) 9: upde sysem hisry H : reurn Figure 6. SDTM lgrihm. (7)

5 B. Muli-bjecive Design Opimizin A muli-bjecive design pimizin mehd is used pimize he perfrmnce merics by frmuling mhemicl prgrmming mdels. Cnsidering pwer meric, we use jin cs srucure such h he expeced cs re, i.e., pwer cnsumpin, is sum f he lump-sum cs k(s, ) nd cninuus cs re c(s,, s), which is given by cs(, s ) = k(, s ) + c( s ',, s) = pw( s) + Prb( s ' s, ) ene( s, s ') τ (, s) s S where pw(s) is he pwer cnsumpin f he sysem in herml se s, ene(s, s ) is he energy required by he sysem rnsi frm herml se s s, nd τ(s, ) is he expeced durin f he ime h he sysem spen in he se s if cin is chsen. Le sequence f herml ses s, s,, s k dene prcessing ph δ frm s s k f lengh k wih he prpery h p(s, s ),, p(s k-, s k ) >, where p(x, y) is he prbbiliy h he sysem mves se y frm se x. Fr plicy, we define he discuned cs C f prcessing ph δ f lengh k s fllws. k i = i i (8) i C ( δ) γ cs( s, ) (9) where i is he ime h he sysem spen in herml se s i befre cin i cuses rnsiin se s i+. Cnsidering he expecin wih respec he plicy ver he se f prcessing ph sring in herml se s, we cn define he expeced cs f he sysem, given h he sysem srs in se s by pw vg(s) = EXP[C (δ)]. The min bjecive is minimize he n-chip emperure, which is highly dependen n pwer cnsumpin. The design bjecive is vecr J f perfrmnce merics we re rying minimize r mximize. The design vecr cnins cin ses, i.e., DVFS ses, which impc he design perfrmnce. Prmeer is he vrible h cn be cnrlled nd influences he muli-cmpnen bjecive funcins s shwn in Figure 7. e h χ(s, ) is he frequency h he sysem is in herml se s nd cin is issued. prceeds. Fr exmple, fr min J (energy/perin) nd mx J 3 (hrughpu), we frmule he prblem s min f ( ) = λ J ( ) + λ [ J ( )] () 3 3 λ i s re se s λ = w / w i i, where w j i = ( U / J )/( U / J ), i nd U is he user-specified uiliy funcin, i.e., U = f(j). V. EXPERIMETAL RESULTS In he experimenl seup, we designed 32bi embedded RISC prcessr in HDL, which hs 3-sge pipeline wih bsic insrucin ses fr simplificin, nd synhesized wih.8um echnlgy librry. The prpsed lgrihm is implemened in Mlb. In he firs experimen, we nlyzed he chrcerisics f he designed prcessr in erms f he pwer dissipin nd he pering emperure by execuing SPECin2 benchmrks which hve insrucin disribuins s shwn in Tble 2. gcc gp gzip Tble 2. Insrucin chrcerisics fr SPECin2. SPECin # f insrucins 2 (in millins) % Tl dynmic percenge % ld sre dd/sub nd/r brnch ec. In rder chieve ccure pwer vlue, we bined SAIF (Swiching Aciviy Inerchnge File) [6] by bck-nned RTL simulin, nd hen execued he Pwer Cmpiler [6] nlyze he pwer dissipin disribuin s repred in Tble 3. The ble shws h cerin cmpnens f he prcessr such s execuin unis nd regiser unis hve significn impc n he nn-unifrm pwer densiy, which resuls in h sp n die due he pr herml cnduciviy f silicn. SPECin 2 gcc gp Tble 3. Pwer dissipin disribuin in RISC (n cche). doureg doureg dareg dareg iareg incr mul incr mul shifer lu sr reg decde decde fech execue buscl 4.6% 4.4% 3.8% 4.% 2.3% 2.7% 6.5% 2.2% 5.4% 4.% 4.% 4.%.7% 4.3% 3.% 5.7% 4.% 4.2% 3.% 4.2%.7% 4.8% 4.2% 4.2% 4.2% 2.3% fech Sysem Mdel Opimizer {design bjecive} J sys perfrmnce nlysis gzip 4.6% 9.2% 5.4% 4.6% 4.5% 3.8% 8.6% 2.3% 5.% 4.6% 4.6% 4.6% 8.% J J 2 J 3 min Energy/perin min pw ( s ) χ ( s, ) s vg mx Thrughpu subjec χ (, s ) χ ( s ', ) ( s ' s, ) =, χ ( s, ) τ ( s, ) =, χ (, s ) Prb s ' s ll s S, A Figure 7. Muli-bjecive design pimizin. We cnn slve he bve pimizin prblem excly since here is srng dependency beween he vrius perfrmnce merics. The prblem, hwever, cn be slved pprximely by using weighed liner cmbinin f differen bjecives, where ech bjecive J i is muliplied by sricly psiive sclr weigh λ i nd summed geher frm single-bjecive pimizin prblem. We dp sluin echnique in which he weighs re dynmiclly djused s he pimizin sr pin end pin Figure 8. Trce f belief ses in emperure bservin. The secnd experimen is demnsre he effeciveness f ur prpsed SDTM lgrihm. Firs, we rndmly chse sequence f 4 prgrms which include gcc, gp, nd gzip such s gcc -gzip 2 -gp 3 -gp 4 - -gcc 39 -gcc 4, where prgrm i is he i- h prgrm in he sequence. Then, he sequence f prgrms is execued n he RISC prcessr clcule he belief ses by

6 using he prmeers h re given in Tble. The rce f he belief ses in emperure bservin is depiced in Figure 8. Simulin resuls in Figure 9 shw he verge pering emperure f he prcessr. As cmprisn, we ls cmpued he verge emperure f prcessr which runs ).95V / 5MHz, 2).8V / 35MHz, nd 3).65V / 2MHz. Frm he figure, we cn see clerly h he prcessr wih he SDTM is selecing he piml cins, which in urn resul in lw verge emperure s shwn in Figure. Tble 4. rmlized vlues fr pimizin resuls..95v/5mhz.8v/35mhz.65v/2mhz SDTM Averge pwer Thrughpu Energy/perin VI. COCLUSIO Temperure [ºC] We prpse schsic dynmic herml mngemen echnique by prviding schsic mngemen frmewrk imprve he ccurcy f decisin mking under he unceriny in emperure bservin. The prpsed herml mngemen frmewrk, bsed n POSMDP, cnrls he herml ses f he sysem nd mkes decisin (i.e., DVFS se) reduce pering emperure. Experimenl resuls wih design pimizin frmulins demnsre he effeciveness f ur lgrihm. REFERECES.95V / 5MHz.8V / 35MHz.65V / 2MHz Prgrm sequences Figure 9. Temperure vriin fr es scenri. SDTM Averge emperure [ºC] Figure. Averge emperure fr es scenri. Figure shws he vlues f pssible rge cins, i.e., lw cin mens lw supply vlge nd lw frequency, nd vice vers, bined during muli-bjecive design pimizin. This figure indices h he perfrmnce merics re djused grdully nd rde-ffs beween pwer cnsumpin nd hers (hrughpu nd energy/perin) becme mre eviden wih repeed sluins bsed n he equin (). piml pwer zne Figure. Opimizin wih weighed sum pprch (nrmlized). Opimizin resul wih verge CPI (Clck Per Insrucin) =.6, s shwn in Tble 4, indices h he SDTM lgrihm gives lw pwer cnsumpin nd pering emperure wih lile perfrmnce impc n hrughpu nd energy/perin merics. [] E. Rhu nd M. Smih, Dynmiclly mnging prcessr emperure nd pwer, Prc. f FDDO-2, v [2] K. Skdrn, M.R. Sn, e l., Temperure-Awre Micrrchiecure, Prc. f In l Sympsium n Cmpuer Archiecure, June 23. [3] D. Brks nd M. Mrnsi, Dynmic Therml Mngemen fr High Perfrmnce Micrprcessr, Prc. f HPCA, Jn. 2. [4] J.Srinivsn nd S.V.Adve, Predicive Dynmic Therml Mngemen fr Mulimedi Applicins, Prc. f 7h Annul ACM In l Cnference n Supercmpuing. June 23. [5] S. Gurumurhi, e l., Disk Drive Rdmp frm he Therml Perspecive: A Cse fr Dynmic Therml Mngemen, ACM SIGARCH Cmpuer Archiecure ews. Vl.22, Issue 2. My 25. [6] P. Ddvr nd K. Skdrn, Penil Therml Securiy Risks, Prc. f 2s IEEE Semi-Therm Sympsium, Mr. 25. [7] L. Benini nd G. De Micheli, Dynmic Pwer Mngemen: Design Techniques nd CAD Tls, Kluwer Acdemic Publishers, 997. [8] Q. Qiu, Q. Wu, nd M. Pedrm, Schsic Mdeling f Pwer- Mnged Sysem - Cnsrucin nd Opimizin, IEEE Trns. n Cmpuer-Aided Design, Vl. 2,., Oc. 2. [9] T. Simunic nd S. Byd, Mnging Pwer Cnsumpin in ewrks n Chips, Prc. f DATE. Mrch 22. [] M.L. Puermn, Mrkv Decisin Prcesses: Discree Schsic Dynmic Prgrmming. Wiley Publisher, ew Yrk, 994. [] Y. Cheng, C. Tsi, C. Teng, nd S. Kng, Elecrherml Anlysis f VLSI Sysems. Kluwer Acdemic Publishers, 2. [2] hp:// CPU SPECin2 dcumens. [3] hp:// Advnced Cnfigurin nd Pwer Inerfce Specificin, Rev. 3.. Dec. 25. [4] A.R. Cssndr, e l., Acing Opimlly in Prilly Observble Schsic Dmins, Prc. f 2h Cnference n AI, Aug [5] R.E. Bellmn, Dynmic Prgrmming. Princen Universiy Press, Princen, 957. [6] hp:// Synpsys Pwer Cmpiler Dcumens.