Spread-Spectrum Technique and its Application to DS/CDMA

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1 Spread-Spectrum Technique and its Application to DS/CDMA Bernard H. Fleury and Alexander Kocian I&S Division Department of Communication Technology, Aalborg University DK Aalborg, Fredrik Bajers Vej 7 A3 {bfl,ak}@kom.aau.dk SS-course 2004 # 1 PRINCIPLES OF SS TECHNIQUE SS-course 2004 # 2

2 BLOCK DIAGRAM OF A DIGITAL COMMUNICATION SYSTEM Transmitter: t T S Bit stream Waveform Modulator d(t) Carrier Modulation & Amplification / Filtering Receiver: Bit stream Waveform Demodulator ˆd(t) Filtering / Amplification & Baseband Demodulation t T S SS-course 2004 # 3 BLOCK DIAGRAM OF A SPREAD SPECTRUM SYSTEM SS Transmitter: T S t Bit stream Waveform Modulator d(t) c(t) Carrier Modulation & Amplification / Filtering SS Receiver: Bit stream Wideband noise-like signal Waveform Demodulator Pseudo-Noise Generator Pseudo-Noise Generator cˆ (t) ˆd(t) Synchronization Filtering/Amplification & Baseband Demodulation T S t SS-course 2004 # 4

3 MAIN FEATURES OF THE NOISE-LIKE WIDEBAND SIGNAL c(t) Usually, the bandwidth W of c(t) is much higher than the bandwidth B of d(t): In military applications: G W B In UMTS/W-CDMA, G = The signal c(t) appears noise-like and random to any unintended user. The signal c(t) is easily generated by a device (pseudo-random generator) the initialization setting of which (key) is known only to the intended transmitter and receiver. Synchronization should be easily performed at the intended receiver. SS-course 2004 # 5 MULTIPLICATIVE BANDWIDTH EXPANSION Power spectrum of d(t) P B 1 Ts η = P 0 2B frequency d(t) c(t) d(t)c(t) Power spectrum of d(t)c(t) P W + 1 Ts W P 0 2W = η G frequency Power spectrum of c(t) W frequency SS-course 2004 # 6

4 MULTIPLICATIVE BANDWIDTH EXPANSION The ratio G W B = W T s is called the spreading factor (SF), spreading gain or processing gain of the SS system. SS-course 2004 # 7 ADVANTAGES OF SS TECHNIQUE SS-course 2004 # 8

5 ADVANTAGES OF SS SYSTEMS The following five items apply for large SF. 1. Privacy. It is a computational burden for an unintended user to demodulate a SS signal. 2. Low probability of intercept. Because of the low level of its power spectrum, a SS-signal can be hidden in the background noise. This feature makes a SS signal difficult to be detected by an unintended user. 3. High tolerance against interference. Intentional interference (jamming). Unintentional interference (multiuser interference in a multiuser communication system). SS-course 2004 # 9 ADVANTAGES OF SS SYSTEMS 3. High tolerance against interference (cont d) P B J W f P J B W f f Baseband digital signal 01 Bandwidth expansion Baseband spread digital signal + interference Bandwidth compression Bandwidth expansion Baseband digital signal + residual interference SS-course 2004 # 10

6 ADVANTAGES OF SS SYSTEMS 3. High tolerance against interference (cont d). Signal-to-interference power ratio after bandwidth compression (also called de-spreading): In db: SIR d = P J G = SIR i G [SIR d ] db = [SIR i ] db + [G] db SIR i : Input signal-to-interference ratio. SIR d : Signal-to-interference ratio after despreading. Interference reduction is proportional to the spreading factor G. SS-course 2004 # 11 ADVANTAGES OF SS SYSTEMS 4. Multiple access operation (CDMA). 2B 2B 2B d 1 (t) η 1 2W η 1 /G η 1 η 1 η 2 /G Lowpass filter η 2 /G ˆd 1 (t) 2B c 1 (t) 2W c 1 (t) 2B 2B d 2 (t) η 2 2W η 2 /G η 2 η 1 /G η 2 Lowpass filter η 2 η 1 /G ˆd 2 (t) c 2 (t) c 2 (t) SS-course 2004 # 12

7 ADVANTAGES OF SS SYSTEMS 5. Diversity processes exploited in SS technique. SS-course 2004 # 13 MAIN TYPES OF SS TECHNIQUES SS-course 2004 # 14

8 DIRECT SEQUENCE (DS) SS SYSTEM Power spectrum of d(t) c(t) Power spectrum of d(t) P T s P W η/g f B B η = 2B P f B 1 Ts Data waveform d(t) t d(t) c(t) t c(t) t PN sequence generator T c = T s /N 1 Power spectrum of c(t) 1/2W f W 1 Tc SS-course 2004 # 15 TIME-FREQUENCY OCCUPANCY OF A DS-SS SIGNAL 2W f f 0 t SS-course 2004 # 16

9 FREQUENCY HOPPING (FH) SS SYSTEM T h d(t) T s R{d(t) c(t)} T s d(t) c(t) Data waveform d(t) c(t) = exp{j2πf c (t)t} PN-Sequence Generator Digital Frequency Synthesizer R{c(t)} T h T s SS-course 2004 # 17 TIME-FREQUENCY OCCUPANCY OF A FH-SS SIGNAL Occupied time frequency slot f T h 2W f 0 2B t Processing gain, G = W B SS-course 2004 # 18

10 MULTI-CARRIER CDMA Transmitter Receiver chip #1 f c [1] f c [1] chip #1 bit stream chip #2 chip #2 Modulator Demodulator f c [2] f c [2] Combiner bit stream chip #M Code vector f c [M] f c [M] chip #M Code vector PN-Sequence Generator Synchronized PN-Sequence Generator SS-course 2004 # 19 ACCESS TECHNIQUES SS-course 2004 # 20

11 ACCESS TECHNIQUES Code Code Code User 3 User 2 User 2 Time User 1 Time User 1 Time User 3 User 1 User 2 User 3 Frequency Frequency Frequency FDMA TDMA CDMA SS-course 2004 # 21 DUPLEX TECHNIQUES frequency Downlink (DL) duplex separation Uplink (UL) FDD TDD frame DL UL DL UL DL UL TDD time SS-course 2004 # 22

12 THEORY AND APPLICATION OF PSEUDO RANDOM BINARY SEQUENCES SS-course 2004 # 23 PROPERTIES OF RANDOM BINARY SEQUENCES Let us consider a set S of periodic sequences of same length N. Example: S = {( ), ( )} In order for these sequences to be pseudo-random or pseudo-noise (PN) sequences, they have to satisfy the following properties: Balance Property For each sequence in S the relative frequencies of 0 and 1 approximately equal 1 2 each. Run Property For each sequence in S the relative frequencies of runs 0 } 0 {{...0 } n 1 and 1 } 1 {{...1 } of length n approximately equal 2 each. n n SS-course 2004 # 24

13 PROPERTIES OF RANDOM BINARY SEQUENCES (CONT D) Shift Property The numbers of disagreements and agreements between each sequence in S and its cyclically shifted versions are approximately the same = agreement - = disagreement SS-course 2004 # 25 PROPERTIES OF RANDOM BINARY SEQUENCES (CONT D) Separation Property The numbers of disagreements and agreements between any two sequences in S or their cyclically shifted versions are approximately the same = agreement - = disagreement SS-course 2004 # 26

14 AUTOCORRELATION OF BINARY SEQUENCES Let a = (a 0,...,a N 1 ), a n { 1, +1} denote a binary sequence of length N. Example: a = (1, 1, 1, 1, 1, 1, 1). Let a (l) denote the l-times cyclicly right-shifted version of a. a (2) = ( 1, 1, 1, 1, 1, 1, 1) Example: Autocorrelation of a: Example: R a (l) = N 1 n=0 a n a (l) n l = 2 a a (2) a a (2) R a (2) = 1 SS-course 2004 # 27 AUTOCORRELATION OF BINARY SEQUENCES 7 R a (l) l -1 R a (l) is a measure of the resemblance between the sequence a and its l-times cyclicly right-shifted version a (l). R a (l) = # of agreements - # of disagreements between a and a (l). Properties of R a (l): 1. R a (0) = N. 2. R a (l) R a (0) = N. SS-course 2004 # 28

15 CROSSCORRELATION OF BINARY SEQUENCES Let a = (a 0,...,a N 1 ) and b = (b 0,...,b N 1 ) denote two binary sequences of length N. Crosscorrelation of a and b: R a,b (l) = N 1 n=0 a n b (l) n R a,b (l) is a measure of the resemblance between a and b (l) n. R a,b (l) = N a = ±b R a,b (l) = 0 a and b are orthogonal SS-course 2004 # 29 CROSSCORRELATION OF BINARY SEQUENCES Example: a = ( 1, 1, 1, +1, 1, +1, +1) b = ( 1, +1, 1, 1, 1, +1, +1) R a,b (l) 3 l -1-5 SS-course 2004 # 30

16 WELCH BOUND We consider a set S of binary sequences of length N: S a b S contains M sequences of length N Welch bound: For M large max { R a,a(l) },max { R a,b (l) } N l cn l R c N M 1 MN 1 = R c The Welch bound gives a lower bound on the minimum resemblance between any arbitrary shifted, distinct versions of any two selected sequences in S. SS-course 2004 # 31 PSEUDO-NOISE SEQUENCES SS-course 2004 # 32

17 LINEAR FEEDBACK SHIFT REGISTER (LFSR) Modulo 2 adder Output Clock pulses Example r = 5-stage LFSR sequence generator. Output from the LFSR generator: }{{} init. SS-course 2004 # 33 LINEAR FEEDBACK SHIFT REGISTER a n f 1 f 2 f 3 f r a n 1 a n 2 a n 3 a n r Output Clock pulses The coefficients f i equal 0 or 1. The contents of the shift registers equal 0 or 1. The LFSR is entirely described by its characteristic polynomial: f(x) = 1 + f 1 x + f 2 x f r x r SS-course 2004 # 34

18 PROPERTIES OF SEQUENCES GENERATED BY LFSRS A sequence generated by a LFSR is periodic with length N, where N 2 r 1. If N = 2 r 1, then the sequence is referred to as a maximum-length (ML) sequence or pseudo-noise (PN) sequence. A LFSR generates a PN sequence if, and only if, its characteristic polynomial is primitive. SS-course 2004 # 35 PROPERTIES OF PN-SEQUENCES PN sequence of length N = 2 r 1. Example: r = 5, N = 31 : a = ( ). Balance property Number of 1 : 2 r 1. Number of 0 : 2 r 1 1. Run property Number of runs of consecutive 0 or 1 : 2 r of them have length of them have length 2. 2 (r 2) of them have length r 2. 1 run of length r 1: 0 } {{ 0 }. r 1 times 1 run of length r: 1 } {{ 1 }. r times SS-course 2004 # 36

19 PROPERTIES OF PN-SEQUENCES Shift property R a (l) = { N, l = 0 1, l = 1,...,N 1 Example: N = R a (l) l SS-course 2004 # 37 PROPERTIES OF PN-SEQUENCES (CONT D) Proof: Given the binary sequence a and the circularly shifted version a (l), both with period N, the auto-correlation R a (l) can be written as where R a (l) = A(a, a (l) ) D(a, a (l) ) A(a, a (l) ) # of term-by-term agreements between a and a (l) D(a, a (l) ) # of term-by-term disagreements between a and a (l) Notice that A(a, a (l) ) + D(a, a (l) ) = N. SS-course 2004 # 38

20 PROPERTIES OF PN-SEQUENCES (CONT D) Let W(a) be the Hamming weight of a. Then, ( ) R a (l) = N W(a a (l) ) W(a a (l) ). For ML sequences, W(a a (l in) ) = W(a) with W(a) = (N+1)/2. Hence, R a (l in) = N 2W(a a (l) ) = N 2W(a) = 1. SS-course 2004 # 39 NUMBER OF PRIMITIVE POLYNOMIALS r N = 2 r 1 N p (r) r N = 2 r 1 N p (r) N p (r) = φ p(2 r 1) r, φ p (m) Euler totient function (number of integers less than m which are relatively prime to m). SS-course 2004 # 40

21 CORRELATION PROPERTIES OF PN SEQUENCES N l l lag l Example: N = 31, N p (5) = 6 different PN sequences. SS-course 2004 # 41 PREFERRED PAIRS OF PN SEQUENCES The crosscorrelation between a preferred pair is three-valued: Let {a, b} be a preferred pair of length N = 2 r 1, r odd or r = 2 mod 4. Then R a,b { t(r), 1, t(r) 2} where t(r) = { r+1 2, r odd r+2 2, r = 2 mod 4 Example: r = 5 R a,b { 9, 1, +7} SS-course 2004 # 42

22 DEFINITION AND PROPERTIES OF GOLD SEQUENCES Let {a, b} be a preferred pair of PN sequences of length N = 2 r 1. Set of Gold sequences: {a, b, a b, a b (1),...,a b (N 1) } Number of Gold sequences: N + 2 = 2 r + 1. Let c and c denote two Gold sequences from the above set. Autocorrelation property: R c (l) { = N, l = 0 { t(r), 1, t(r) 2} l = 1,...,N 1 SS-course 2004 # 43 DEFINITION AND PROPERTIES OF GOLD SEQUENCES Crosscorrelation property: R c,c (l) { t(r), 1, t(r) 2} Comparison with Welch bound for large N max R c,c (l) = t(r) l 0, for c=c { 2 2 r/2 = 2R c, r odd 2 2 r/2 = 2R c, r = 2 mod 4 SS-course 2004 # 44

23 GOLD SEQUENCES A Gold sequence is generated by modulo-2 addition of two preferred pair sequences. b n f 1 f 2 f 3 f r b n 1 b n 2 b n 3 b n r Clock pulses Output c n a n 1 a n 2 a n 3 a n r a n f 1 f 2 f 3 f r SS-course 2004 # 45 GOLD SEQUENCES f 1 (x) = 1 + x 2 + x 5 seq1: N = = 31 chips N = 31 chips f 2 (x) = 1 + x 2 + x 3 + x 4 + x seq2: N = = 31 chips Sequence 1: Sequence 2: shift combination: shift combination: shift combination: Cyclic shift of sequence 2 to the left. SS-course 2004 # 46

24 GOLD SEQUENCES Ra(l) Ra,b(l) lag l lag l SS-course 2004 # 47 THEORY AND APPLICATION OF PSEUDO-NOISE (PN)/MAXIMUM LENGTH (ML) SEQUENCES SS-course 2004 # 48

25 DEFINITION OF A FIELD Let us consider a set F of elements endowed with two operations: Addition + and Multiplication. F is a field if the following properties hold: F is a commutative group w.r.t. the addition + ; F \{0} is a commutative group w.r.t. the multiplication ; Distributive law: for a, b, c F, a (b + c) = a b + a c, and (b + c) a = b a + c a. Finite field or Galois field (GF): F is finite. the residue class of any prime integer p forms a GF denoted by GF(p); the number of elements in any finite GF equals p m where p is a prime integer and m is a natural number, i.e. q = p m. Infinite field : F has infinite elements, e.g. the field of real numbers. SS-course 2004 # 49 IRREDUCIBLE POLYNOMIAL OVER GF(2) A polynomial f(x) = f 0 + f 1 x f n x n over GF(2), i.e. f 0,...,f n GF(2) is irreducible if it has positive degree and it cannot be factorized into the product of other polynomials with lower degrees larger than 0. Example: Find the irreducible polynomials over GF(2) of degree 4. a. First find the 2 4 = 16 polynomials over GF(2) of degree 4; b. Find all reducible polynomials by computing all products (x 3 + a 1 x 2 + a 2 x 1 + a 3 )(x + b 1 ) and (x 2 + a 1 x 1 + a 2 )(x 2 + b 1 x + b 2 ) with a 1, a 2, a 3, b 1, b 2 GF(2); c. Removing the reducible polynomials from the 16 polynomials yields the following irreducible polynomials over GF(2) of degree 4: f 1 (x) = x 4 + x + 1; f 2 (x) = x 4 + x 3 + 1; f 3 (x) = x 4 + x 3 + x 2 + x + 1; SS-course 2004 # 50

26 FIELD GENERATED BY AN IRREDUCIBLE POLYNOMIAL Let f(x) be irreducible with degree n and α a root of f(x): f 0 + f 1 α f n 1 α n 1 + α n = 0 Let GF(2 n ) = {c 0 + c 1 α c n 1 α n 1 ; c l GF(2), l = 1,...,n 1} Addition c 1 (α) = c 1,0 (α) + c 1,1 α + + c 1,n 1 α n 1 GF(2 n ) c 2 (α) = c 2,0 (α) + c 2,1 α + + c 2,n 1 α n 1 GF(2 n ) c 1 (α)+c 2 (α) = (c 1,0 c 2,0 )+(c 1,1 c 2,1 )α+ +(c 1,n 1 c 2,n 1 )α n 1 Multiplication c 1 (α) c 2 (α) = (c 1,0 + c 1,1 α + + c 1,n 1 α n 1 ) (c 2,0 + c 2,1 α + + c 2,n 1 α n 1 ) SS-course 2004 # 51 FIELD GENERATED BY AN IRREDUCIBLE POLYNOMIAL (CONT D) Where powers of α larger than n are reduced using the identity α n = f n 1 α n f 1 α + f 0 Example: Representation of GF(2 3 ) generated with f(x) = 1 + x 2 + x 3. α is a root of f(x): α 3 = α Elements of GF(2 3 ) Vector representation α 010 α α α 2 + α α α 2 + α 110 SS-course 2004 # 52

27 PRIMITIVE ELEMENTS An element of GF(2 n ) is called a primitive element if its generates GF(2 n ), i.e. {α 0, α 1,...,α 2n 2 } = GF(2 n )\{0} Example: α is a primitive element in GF(2 3 ) Powers of α Elements of GF(2 3 )\{0} α 0 = 1 α 1 = α α 2 = α 2 α 3 = α α 4 = α 2 + α + 1 α 5 = α + 1 α 6 = α 2 + α SS-course 2004 # 53 PRIMITIVE POLYNOMIAL Primitive polynomial: An irreducible polynomial f(x) of degree n is said to be primitive if one of its roots is a primitive element of GF(2 n ). Example: The irreducible polynomial of degree 3, f(x) = x 3 + x 2 + 1, is used to construct GF(2 3 ). Show that f(x) is a primitive polynomial. a. The roots of f(x) are x = α, α 2, α 4 ; b. The order of these roots is 7 according to Order of α k = 2 n 1 GCD(2 n 1, k), where GCD(n, k) is the greatest common divisor of n and k. Therefore these elements are primitive elements of GF(2 3 ). The polynomial f(x) is then a primitive polynomial. SS-course 2004 # 54

28 GENERATION OF ML SEQUENCES Simple Shift Register Generator (SSRG): c 1 c 2 c n 1 D x 1 x 2 x n 1 x n D D Modular Shift Register Generator (MSRG): c 1 c 2 c n 1 D x 1 x 2 x n 1 x n D D f(x) = 1 + c 1 x + c 2 x c n 1 x n 1 + x n is primitive. SS-course 2004 # 55 GENERATION OF ML SEQUENCES (CONT D) Alternative representation of shift register: X(t + 1) = TX(t), where X(t) = [x n (t), x n 1 (t),...,x 1 (t)] T is the state vector. and T is the characteristic matrix calculated as for SSRG: for MSRG: c n c n c n T S =, T M = c c n 1 c n 2 c 2 c SS-course 2004 # 56

29 GENERATION OF ML SEQUENCES (CONT D) Example: SSRG: f(x) = x 3 + x x 1 x 2 x 3 D D D T S = MSRG: x 1 x 2 x 3 D D D T M = SS-course 2004 # 57 GENERATION OF ML SEQUENCES (CONT D) Let α denote a root of f(x) = x 3 + x 2 + 1, α 3 = α SSRG MSRG Clock Memory State vectors Memory State vectors t = t = α 010 α t = α α 2 t = α α 3 t = α α 4 t = α α 5 t = α α 6 A MSRG successively generates the powers of α. Thus, the MSRG (and in fact any LSRG) will generate a ML sequence iff f(x) is primitive. SS-course 2004 # 58

30 RECIPROCAL POLYNOMIALS Consider an irreducible polynomial of degree n given by f(x) = 1 + c 1 x + c 2 x c n 1 x n 1 + x n (1) Then its reciprocal polynomial f (x) is given by f (x) = x n + c 1 x n 1 + c 2 x n c n 1 x + 1 = x n f(x 1 ) (2) The sequence generated by an SSRG using f(x) is the same as the sequence generated by an MSRG using f (x). SS-course 2004 # 59 PN SEQUENCE PHASE SHIFTS The output sequence of the SSRG can be formally written as a(x) = g(x) f(x), g(x) = g 0 + g 1 x g n x n 1. where g i GF(2), g(x) 0. There are 2 n 1 possible numerator polynomials g(x) that are uniquely related to the 2 n 1 phase shifts of the sequence a(x). Example: f(x) = 1 + x + x 3 and g(x) = 1 + x. By long division we find 1 + x 1 + x + x 3 = 1 + x 3 + x 4 + x 5 + x 7 + x 10 + x 11 + x bit period {}}{ 1 }{{ 0 0 } Initial conditions SS-course 2004 # 60

31 PN SEQUENCE PHASE SHIFTS (CONT D) Degree of g(x): Because the sequence a(x) is periodic with N, it follows g(x) f(x) = a(x) = First period {}}{ a 0 + a 1 x a N 1 x N 1 +a 0 x N +... = (a 0 + a 1 x a N 1 x N 1 ) (1 + x N + x 2N + x 3N +...) In modulo-2 arithmetic, Thus, 1 + x N + x 2N + x 3N +... = g(x) f(x) = a(x) = 1 1 x N = x N. b(x) {}}{ a 0 + a 1 x a N 1 x N x N. SS-course 2004 # 61 PN SEQUENCE PHASE SHIFTS (CONT D) Relationship among the degrees of f(x), g(x), and b(x): a(x) = degree = D g n 1 {}}{ g(x) f(x) }{{} degree = D f = n = degree = D b N 1 {}}{ b(x) 1 + x N }{{} degree = N degree{f(x)} degree{g(x)} = N degree{b(x)} D b = D g + N n. Knowing the degee of g(x), we can predict the number of 0s at the end of the first period, i.e. b(x) ends with (N 1) D b = n 1 D g zeros. SS-course 2004 # 62

32 BACK TO THE EXAMPLE f(x) = 1 + x + x 3 and g(x) = 1 + x n = 3 D g = 1 Period: N = 2 n 1 = = 7 Number of trailing zeros: n 1 D g = x 1 + x + x 3 = 1 + x 3 + x 4 + x 5 + x 7 + x 10 + x 11 + x bit period {}}{ 1 }{{ 0 0 } Initial conditions One trailing zero SS-course 2004 # 63 SHIFTED SEQUENCES Let a 0 (x) = 1/f(x) denote the reference sequence and a k (x) = g k(x) f(x) be the sequence a 0(x) cyclically right-shifted by k bits Then it can be shown that g k (x) = x k mod f(x). SS-course 2004 # 64

33 SHIFTED SEQUENCES (CONT D) Example: Consider the characteristic polynomial f(x) = 1 + x + x 3 Shift, k First period, b k g k (x) x x x x + x x + x x 2 Unique relationships for a particular shift of a PN sequence: a k (x), shift k g k (x) = x k mod f(x) degree D g {}}{ b k (x), first period, with n 1 D g zeros at end SS-course 2004 # 65 Initial loading: 1 SSRG IMPLEMENTATION n 1 zeros {}}{ c 1 c 2 c 3 c n f(x) 0 x f(x) x 2 f(x) x n 2 f(x) x n 1 f(x) x n 1 f(x) Initial loading: n 1 zeros {}}{ c 1 c 2 c 3 c n x f(x) x 2 f(x) x n 1 f(x) g n (x) f(x) g n (x) f(x) = xn modf(x) f(x) SS-course 2004 # 66

34 PHASE SHIFTING USING MASKS FOR A SSRG c 1 c 2 c 3 c n f(x) 0 x f(x) x 2 f(x) Mask x n 2 f(x) x n 1 f(x) x n 1 f(x) m 0 m 1 m 2 m n 2 m n 1 m(x) f(x) Phase shift network (PSN) SS-course 2004 # 67 MASK POLYNOMIALS FOR SSRGS There is a one-to-one correspondence between the P = 2 n 1 different shifted version of the PN sequence and numerator polynomials g(x) of degree < n. A particular sequence a(x) can be written as a(x) = g(x) f(x) = g 0 + g 1 x g n 1 x n 1 f(x) = g 0 1 f(x) + g 1 Define the mask polynomials x f(x) g n 1 xn 1 f(x) m(x) = m 0 + m 1 x m n 1 x n 1 (m 0, m 1,...,m n 1 ) To generate the kth shift relative to 1 f(x), select the mask polynomials m(x) = g k (x) = x k mod f(x) SS-course 2004 # 68

35 MASK POLYNOMIALS FOR MSRGS The kth shift at the output of the MSRG, relative to 1 f(x), is obtained as follows: 1. Find the polynomial g k (x) = x k mod f(x); 2. Calculate the sequence: g k (x) f(x) = xk mod f(x) f(x) = a 0 + a 1 x a n Select the mask polynomial to be: m(x) = m 0 + m 1 x m n 1 x n 1 = a 0 + a 1 x a n 1 x n 1. The formula for the mask can also be written [ ] x k mod f(x) m(x) = f(x) deg<n SS-course 2004 # 69 EXAMPLE: SSRG AND MSRG MASKS Primitive polynomial: f(x) = 1 + x + x 3 loading vector: 100 Delay, k SSRG mask MSRG mask 0 g 0 (x) = {g 0 (x)/f(x)} 3 bits = g 1 (x) = x 010 {g 1 (x)/f(x)} 3 bits = g 2 (x) = x {g 2 (x)/f(x)} 3 bits = g 3 (x) = 1 + x 110 {g 3 (x)/f(x)} 3 bits = g 4 (x) = x + x {g 4 (x)/f(x)} 3 bits = g 5 (x) = 1 + x + x {g 5 (x)/f(x)} 3 bits = g 6 (x) = 1 + x {g 6 (x)/f(x)} 3 bits = 110 SS-course 2004 # 70

36 SYNCHRONISATION ISSUES SS-course 2004 # 71 SYNCHRONISATION Signal model Channel noise n(t) Received signal {b} L 1 l=0 s(t) + Delay τ + + r(t) Amplification 2P cos(ω 0 t + θ(t)) r(t) = L 1 l=0 2P b (l) s(t lt τ) cos (ω 0 t + θ(t)) +w (l) (t) }{{} s (l) (t) The DS-SS receiver needs to estimate θ and τ. SS-course 2004 # 72

37 CARRIER SYNCHRONISATION: THE COSTAS LOOP Karhunen-Loeve expansion r(t) = r i φ i (t), i=0 0 t T where the basis functions are subject to T 0 φ i (t)φ j (t) dt = δ i,j, and φ i (t) = 1. Since cos(ω 0 t + θ(t)) = cos ω 0 t cos θ(t) sinω 0 t sinθ(t), suitable basis functions are φ (l) 1,2 (t) = { cos } 2P s(t lt τ) ω sin 0 t φ (l) 1,2 (t), φ (l) 1,2 (t) 2 = P T. SS-course 2004 # 73 COSTAS LOOP (CONT D) Projection of the received signal onto the respective basis function for each individual time slot yields r (l) 1,2 = n (l) 1,2 = (l+1)t lt (l+1)t lt r(t)φ (l) 1,2 (t)dt, l = 0,...,L 1 n(t)φ (l) 1,2 (t)dt, l = 0,...,L 1 s (l) 1,2 = (l+1)t lt s (l) (t)φ (l) 1,2 (t)dt, l = 0,...,L 1 } 2 = { 2P b (l) cos(ω0 t+θ(t)) sin(ω 0 t + θ(t)) { } P 2b (l) sinθ(t). T cos θ(t) T { cos } ω sin 0 t dt SS-course 2004 # 74

38 COSTAS LOOP (CONT D) ML receiver with feedback: Let r (l) = [r (l) 1 r (l) 2 ]T and s (l) = [s (l) 1 s (l) 2 ]T ( ) Λ(θ(t), b) exp 1 L 1 2σ 2 r (l) s (l) 2 exp ( 2 σ 2 P T l=0 l b (l) ( r (l) 1 ) ) sinθ(t) + r(l) 2 cos θ(t) By averaging over the unknown (i.i.d.) bits we get Λ(θ(t)) = Λ(θ(t), b) db = b ( 2 P ( ) ) cosh σ 2 r (l) 1 sinθ(t) + r(l) 2 T l SS-course 2004 # 75 COSTAS LOOP (CONT D) or, equivalently Hence, log Λ(θ(t)) = l log cosh ( 2 σ 2 P T ( ) ) r (l) 1 sinθ(t) + r(l) 2 cos θ(t). d log Λ(θ(t)) dθ(t) y 2 (t) { = ( }}{ 2 P ( ) ) σ 2 r (l) 1 cos θ(t) r(l) 2 T sinθ(t) l ( 1 P ( ) ) tanh σ 2 r (l) 1 sinθ(t) + r(l) 2 T cos θ(t). }{{} y 1 (t) SS-course 2004 # 76

39 COSTAS LOOP (CONT D) Derived receiver architecture: s( t) lt 2/σ 2 P/T SNR tanh( ) r(t) cos(w 0 t + ˆθ) 90 o VCO F(p) ε(t) y 1 (t) y 2 (t) s( t) lt 2/σ 2 P/T SNR SS-course 2004 # 77 replacements COSTAS LOOP (CONT D) With tanh(x) x we readily obtain the Costas Loop: z 1 (t) Low-Pass Filter G(p) y 1 (t) r(t) cos(w 0 t + ˆθ) 90 o VCO F(p) ε(t) z 2 (t) Low-Pass Filter G(p) y 2 (t) SS-course 2004 # 78

40 Remember, SQUARING LOOP r(t) = L 1 l=0 2P b (l) s(t lt τ) cos (ω 0 t + θ(t)) +w (l) (t) }{{} s (l) (t) This time, we square and bandpass filter the received signal z(t) = E{r(t) 2 } = P ( 2 s(t lt τ)) cos 2(ω 0 t + θ(t)) + n (l) (t), l n(t) 0. The PLL recovers the carrier phase at 2ω 0. SS-course 2004 # 79 SQUARING LOOP(CONT D) VCO output of the PLL: r VCO (t) sin2(ω 0 t + ˆθ(t)) Hence it follows for the error signal at the input of the loop filter: ε(t) = z(t) r VCO (t) = P s(t lt τ) 2 cos 2(ω 0 t + θ(t)) sin2(ω 0 t + ˆθ(t)) + ñ(t, φ) l = P 2 s(t lt τ) 2 sin2φ(t) + O(2ω 0 t) + ñ(t, φ) l where φ(t) θ(t) ˆθ(t). The loop filter suppresses the terms at 2ω 0. SS-course 2004 # 80

41 SQUARING LOOP(CONT D) Transfer function of the VCO in operator form 2ˆθ(t) = 1 p F(p){ε(t)} { } = 1 p F(p) P s(t lt τ) 2 sin 2φ(t) + ñ(t, φ). 2 l Hence, it follows for the integro-differential equation for the Squaring loop: { } φ = 2θ 1 p F(p) P s(t lt τ) 2 sin2φ(t) + ñ(t, φ). 2 l Phase diagram ε π 2 SS-course 2004 # 81 π 2 φ SQUARING LOOP(CONT D) For small phase errors, φ = 2θ 1 s F(s) ( P 2 } s(t lt τ) 2 2φ(t) + ñ(t, φ). l Receiver architecture: r(t) Square Law Device r(t) 2 Band Pass Filter z(t) ǫ(t) Loop Filter F(p) Phase Locked Loop (PLL) To next synchronization stage Frequency Scaling f 2 r VCO (t) VCO SS-course 2004 # 82

42 TIMING SYNCHRONISATION SS-course 2004 # 83 TIMING SYNCHRONISATION Pilot sequence with larger SNR Pilot chip sequence (unmodulated) data data time Next the DS-SS receiver needs to estimate τ. Back to our one-path channel: s(t) + Delay τ Channel noise n(t) Received signal 2Ps(t τ) r(t) + Amplification 2P SS-course 2004 # 84

43 TIMING SYNCHRONISATION (CONT D) We distinguish between Acquisition: coarse estimate ˆτ of τ Tracking: maintaining fine estimate ˆτ of τ, i.e. ˆτ τ < T c Q = δ SS-course 2004 # 85 Correlation method ACQUISITION s(t) = c(t) is the pilot signal (no data modulation) ˆτ c = arg where T D is the dwell-time. max ˆτ [0,NT c ] 2 TD r(t)c(t ˆτ)dt 0 }{{} λ(ˆτ) SS-course 2004 # 86

44 Correlation method ACQUISITION (CONT D) 2 2 r(t) = αc(t τ) + n(t) 2 Choose largest input signal Output 2 2 Number of performed correlation operations: 2N (Q = 2, T D = λt C ) SS-course 2004 # 87 Serial Search ACQUISITION (CONT D) r(t) = αc(t τ) + n(t) 2 ( )dt T D Threshold Detector Yes No Tracking c(t ˆτ) PN Generator ˆτ Adjust delay SS-course 2004 # 88

45 ACQUISITION (CONT D) Serial Search: Straight Line threshold Uncertainty interval SS-course 2004 # 89 ACQUISITION (CONT D) Serial Search Strategies SS-course 2004 # 90

46 ACQUISITION (CONT D) Single dwell serial acquisition + Bandpass filter Square law detector t t T D ( ) dt n T D Signal above threshold? Yes No Tracking PN code generator Adjust timing SS-course 2004 # 91 ACQUISITION (CONT D) Probability of Detection and False Alarm ˆτ τ ˆτ = τ Output of the correlator Threshold SS-course 2004 # 92

47 ACQUISITION (CONT D) Dual dwell serial acquisition No Next hypothesis (delay) Initial State: Integration time T D1 Output above threshold? Yes No Output above threshold? Verification State: Integration time T D2 > T D1 Yes Hypothesis accepted Acquisition achieved SS-course 2004 # 93 TRACKING Early-late gate tracking (coherent) The correlation estimate of the delay can be expressed as { } ˆτ c = arg max r(t)c(t ˆτ) dt ˆτ T } D {{} λ(ˆτ) This is equivalent to { } d ˆτ c = arg zero ˆτ dˆτ λ(ˆτ) arg zero{λ(ˆτ + δ) λ(ˆτ δ)} ˆτ { } arg zero r(t)c(t (ˆτ + δ)) dt r(t)c(t (ˆτ δ)) dt ˆτ T D T D SS-course 2004 # 94

48 TRACKING (CONT D) Early-late gate tracking The early-late gate algorithm attempts to maximize the autocorrelation between the received and the locally generated PN-sequence. The tracking algorithm is a simple gradient search algorithm. Current operating point Early Late Received power λ(ˆτ) δ δ Timing offset relative to ˆτ c ˆτ ˆτ c SS-course 2004 # 95 TRACKING (CONT D) A non-coherent delay-locked loop + ε + (t) Bandpass H(s) y + (t) Square-law envelope detector y + (t) 2 r(t) c(t ˆτ + δ) - + ε(t) + ε (t) Bandpass H(s) y (t) Square-law envelope detector y (t) 2 c(t ˆτ δ) PN code generator Voltage controlled clock (VCC) Loop filter F(s) Delay δ c(t ˆτ) SS-course 2004 # 96

49 TRACKING (CONT D) at the output of the bandpass filter we have y ± (t) = 2P C V± s(t τ)s(t ˆτ ± δ) dt +n(t) t } {{ } R PN± (τ ˆτ±δ)+s(t,ε) where s(t, ε) is referred to as self-noise. signals from both arms leaves Squaring and subtracting the ε(t) = y (t) 2 y + (t) 2 = P(C 2 V R 2 PN (τ ˆτ + δ) C 2 V+R 2 PN+(τ ˆτ δ)) + n total (t, ε) SS-course 2004 # 97 TRACKING (CONT D) Transferfunction of the VCC in operator notation ˆτ = F(p) T c p {ε(t)} Provided both multipliers have exactly the same gain, i.e. C V = C V+, it follows ˆτ = C V±F(p) {R 2 T c p PN (τ ˆτ + δ) RPN+(τ 2 ˆτ δ)) + n total (t, ε)} SS-course 2004 # 98

50 TRACKING (CONT D) Linearized model for a delay-locked loop n total τ T c. ε = τ ˆτ T c + D(ε ) + + C V ± F(s) ˆτ T c 2P loop filter 1 s VCC SS-course 2004 # 99 TRACKING (CONT D) Discriminator characteristic D(ε ) = R PN ([ε 1 Q ]T c) 2 R PN ([ε + 1 Q ]T c) Q Q 1 Q 1 Q 1 1 Q Q ε 1 δ = T c Q SS-course 2004 # 100

51 TRACKING (CONT D) Autocorrelation functions of the advanced and retarded PN code R PN ([ε + 1 Q ]T c) R PN ([ε 1 Q ]T c) +1 ε ε 1 1 Q 1 Q Q Q Q 1 Q SS-course 2004 # 101 DIVERSITY TECHNIQUES AND RAKE PROCESSING SS-course 2004 # 102

52 DIVERSITY TECHNIQUES Frequency diversity, transmitting or receiving the signal at difference frequencies: rarely used in CDMA since B s B coh. Time diversity, transmitting or receiving the signal at different times: FEC, interleaving. Space diversity, transmitting or receiving the signal at different locations: multiple antenna transmission/reception, resolving multipath components with a single antenna (=path diversity). Polarization diversity, transmitting or receiving the signal with different polarizations: antennas need to support dual polarization modes. SS-course 2004 # 103 PATH DIVERSITY Selection diversity(sd): take the signal diversity component with the highest SNR Maximum ratio combining(mrc): all signal diversity components are combined such that the SNR is maximized. Equal gain combining(egc): all signal diversity components are phase compensated and combined SS-course 2004 # 104

53 SELECTION DIVERSITY (CONT D) Receiver architecture: Transmitted signal Diversity channel #1 Diversity channel #l Diversity channel #L MF 1 MF l MF L Z 1 γ c,1 Z l γ c,l Z L γ c,l Select largest SNR channel User data SS-course 2004 # 105 SELECTION DIVERSITY Let the average SNR of any diversity channel (path) be γ c = γ c,1 = γ c,2 =... = γ c,l = E { α 2} E b LN 0 For Rayleigh distributed α, γ c is χ 2 distributed with 2 degrees of freedom p(γ c,l ) = 1 γ e γ c,l γc c The probability that SNRs at all L receivers are below the value λ P {γ c,1, γ c,2,...,γ c,l < λ} = = L P {γ c,l < λ} = l=1 l ( ) L 1 e λ γc λ 0 p(γ c,l ) dγ c,l SS-course 2004 # 106

54 SELECTION DIVERSITY (CONT D) Now the pdf for the largest SNR p(γ max ) = d dλ P {γ c,1, γ c,2,...,γ c,l < λ} λ=γmax = L γ (1 e γ max γc ) L 1 e γ max γc c For BPSK, P b = Q ( 2 E b N 0 ), Q(x) = 1 2π x e x2 /2 dx and hence, P b = = L 2 0 L 1 k ( ) Q 2γmax p(γ max ) dγ max ( L 1 k ) ( 1) k k + 1 [ 1 γc k γ c SS-course 2004 # 107 ]. SELECTION DIVERSITY (CONT D) 10 0 Probability of bit error L=1 L=2 AWGN L=3 L= SNR per bit (db) SS-course 2004 # 108

55 MAXIMUM RATIO COMBINING Receiver architecture: Diversity channel #1 (α 1, φ 1 ) n 1 (t) MF 1 g 1 Z 1 Combiner Transmitted signal Diversity channel #l (α l, φ l ) n l (t) MF l g l Z l L l=1 Z User data Diversity channel #L (α l, φ L ) n L (t) MF L g L Z L at the combiner output: ĝ = arg max g γ c (g) SS-course 2004 # 109 MAXIMUM RATIO COMBINING (CONT D) Instantaneous SNR of the output of the combiner γ c = E b i α ig i 2 LN 0 i g2 i Invoking Schwarz inequality 2 α i g i i i α i 2 j g j 2 Equality, iff g i = a i,i = 1,...,L. Hence, γ c = E b l α l 2 l α l 2 LN 0 l α l 2 SS-course 2004 # 110

56 MAXIMUM RATIO COMBINING (CONT D) For Rayleigh distributed α, γ c is χ 2 distributed with 2L degrees of freedom p(γ c ) = γl 1 c γ c L Γ(L) e γc γc, Γ(x) = 0 t x 1 e x dx. and hence P b = 0 L 1 ( ( Q 2γc )p(γ c ) dγ c = p L L + l 1 l p 1 2 ( 1 l γc 1 + γ c ). ) (1 p) l SS-course 2004 # 111 MAXIMUM RATIO COMBINING (CONT D) 10 0 Probability of bit error L=2 AWGN L=4 L= SNR per bit (db) 10 3 L=1 SS-course 2004 # 112

57 RAKE RECEIVER CONCEPT DS-SS receiver for the one path channel r(t) = α 1 s(t τ 1 ) + n(t) (n+1)t s+τ 1 nts+τ 1 ( )dt Detection Decoding c(t ˆτ 1 ) nt s + ˆτ 1 PN Generator c(t) Delay ˆτ 1 ˆα 1 h(τ) α 1 δ(τ τ 1 ) τ 1 τ SS-course 2004 # 113 RAKE RECEIVER CONCEPT (CONT D) We need to estimate α 1, α 2,...,α L. R c (τ) = r(t) c(t) = α 1 E{s(t τ 1 )c(t + τ)} ( α 1 R c (τ 1 ) 1 τ + τ ) 1, τ + τ 1 < T c T c Hence, ˆα 1 = 2 < r(t), c(t) >. R c (τ 1 ) SS-course 2004 # 114

58 RAKE RECEIVER CONCEPT (CONT D) (n+1)t s+ˆτ 1 nts+ˆτ 1 ( )dt nt s + ˆτ 1 β 1 r(t) = L l=1 α l s(t τ l ) + n(t) (n+1)t s+ˆτ 2 nts+ˆτ 2 ( )dt nt s + ˆτ 2 Detection Decoding β 2 c(t ˆτ 1 )c(t ˆτ 2 )c(t ˆτ L ) (n+1)t s+ˆτ L nts+ˆτ L ( )dt nt s + ˆτ L β L PN Generator c(t) ˆτ 1 ˆτ 2 Delay line ˆτ L h(τ) α 1 δ(t τ 1 ) α L δ(t τ L ) α 2 δ(t τ 2 ) τ 1 τ 2 τ L τ SS-course 2004 # 115 RAKE RECEIVER CONCEPT (CONT D) Maximum ratio combining: β l = ˆα l, l = 1,...,L Equal gain combining: β l = exp ( j arg(ˆα l )), l = 1,...,L SS-course 2004 # 116

59 UMTS W-CDMA SS-course 2004 # 117 MAIN REQUIREMENTS FOR UMTS RADIO ACCESS PART Envi- Operating ronment Maximum User Bit Rate Delay Constrained Max BER, Max Delay Delay Unconstrained Maximum User Bit Rate Rural Outdoor 144 kb/s BER=10 3, D=30 ms 144 kb/s BER=10 6, D=100 ms BER=10 7, D=300 ms Urban/Suburban 500 kb/s BER=10 3, D=30 ms 500 kb/s Outdoor BER=10 6, D=100 ms BER=10 7, D=300 ms Indoor/Low Range 2 Mb/s BER=10 3, D=30 ms 500 kb/s Outdoor BER=10 6, D=100 ms BER=10 7, D=300 ms BER SS-course 2004 # 118

60 IMT-2000 FREQUENCY ALLOCATION SS-course 2004 # 119 MULTIPLEX TECHNIQUES frequency Downlink (DL) duplex separation Uplink (UL) FDD TDD frame DL UL DL UL DL UL TDD time SS-course 2004 # 120

61 WIDEBAND CDMA SPECIFICATIONS (FDD, PHYSICAL LAYER) Multiple access DS-CDMA Duplex technique FDD Chip rate 3.84 Mchips/s Carrier spacing 5 MHz Frame size 10 ms Spreading technique Variable-spreading factor+multi-code Channel Coding 1/2-1/3 rate convolutional coding Turbo coding Interleaving Block interleaver with inter-column permutations Modulation QPSK with roll-off factor α = 0.22 SS-course 2004 # 121 UPLINK CHANNELIZATION CODES Code-tree for generation of Orthogonal Variable Spreading Factor (OVSF) codes C ch,1,0 1, C C ch,2,0 ch,2,1 C C ch,1,0 ch,1,0 C C ch,1,0 ch,1, C ch,1,0 = (1) C ch,2,0 = (1,1) C ch,2,1 = (1,-1) C ch,4,0 =(1,1,1,1) C ch,4,1 = (1,1,-1,-1) C ch,4,2 = (1,-1,1,-1) C ch,4,3 = (1,-1,-1,1) The OVSF codes are only orthogonal in the synchronous case. SS-course 2004 # 122

62 UPLINK LONG SCRAMBLING CODES Complex scrambling codes, Gold sequence generator c long,1,n MSB f 1 (X) = X 25 + X LSB f 2 (X) = X 25 + X 3 + X 2 + X + 1 c long,2,n Notice: no change in signal bandwidth! SS-course 2004 # 123 UPLINK SHORT SCRAMBLING CODES used to support MU-detection, codes defined from the family of periodically extended S(2) Codes (N=255) d(i) f 0 (X) = X 8 + X 5 + 3x 2 + x 2 + 2x + 1 mod mod n addition multiplication mod b(i) mod 4 + z n (i) Mapper cshort,1,n(i) cshort,2,n(i) f 1 (X) = X 8 + X 7 + X 5 + x a(i) f 2 (X) = X 8 + X 7 + X 5 + X 4 + x mod SS-course 2004 # 124

63 DOWNLINK SPREADING Any downlink physical channel except SCH S P C ch,sf,m I Q I+jQ S dl,n S j SCH: Synchronisation Channel SS-course 2004 # 125 DOWNLINK SCRAMBLING CODES Complex scrambling codes, Gold sequence generator f 1 (X) = X 18 + X I f 2 (X) = X 18 + X 10 + X 7 + X Q SS-course 2004 # 126

64 FORWARD ERROR CORRECTION IN UMTS Transport Channel Type Coding Scheme Coding Rate Broadcast ch. 1/2 Paging ch. Convolutional Code Randomaccess ch. 1/3, 1/2 Turbo Code 1/3 SS-course 2004 # 127 CONVOLUTIONAL ENCODER Input Input D D D D D D D D (a) Rate 1/2 convolutional coder D D D D D D D D (b) Rate 1/3 convolutional coder Output 0 G 0 = 561 (octal) Output 1 G 1 = 753(octal) Output 0 G 0 = 557 (octal) Output 1 G 1 = 663 (octal) Output 2 G 2 = 711 (octal) SS-course 2004 # 128

65 TURBO ENCODER SS-course 2004 # 129 PHYSICAL CHANNELS (FDD) Physical channels typically consist of a three-layer structure: Super frame: A super frame has a duration of 720 ms and consists of 72 radio frames. Radio frame: A radio frame is a processing unit of 10 ms which consists of 15 time slots. Time slot: A time slot is a unit which consits of fields containing bits. The number of bits per time slot depends on the physical channel (Spreading factor). Length of a timeslot is 667 ms. SS-course 2004 # 130

66 EXAMPLE DOWNLINK Pilot N pilot bits DPCCH TPC N TPC bits TFI N TFI bits DPDCH Data N data bits Time slot ms, 20*2 k bits (k=0..6) Slot #1 Slot #2 Slot #i Slot #16 T f = 10 ms Radio frame Frame #1 Frame #2 Frame #i Frame #72 Super frame T super = 720 ms SS-course 2004 # 131 UPLINK DEDICATED PHYSICAL CHANNELS DPDCH: Dedicated Physical Data Channel. This channel is used to carry dedicated data generated at Layer 2 and above, i.e. the dedicated transport channel (DCH). There may be none, one or several uplink DPDCH on each Layer 1 connection. DPCCH: Dedicated Physical Control Channel. This channel is used to carry control information generated at Layer 1 such as: pilot bits for coherent detection, power control, feedback information, and multiplexing information of the DPDCH. SS-course 2004 # 132

67 UPLINK DEDICATED PHYSICAL CHANNELS DPDCH DPCCH Pilot N pilot bits Data N data bits T slot = 2560 chips, N data = 10*2 k bits (k=0..6) TFCI N TFCI bits T slot = 2560 chips, 10 bits TPC N TPC bits Slot #0 Slot #1 Slot #i Slot #14 1 radio frame: T f = 10 ms FBI N FBI bits Pilot: Known pilot bits support channel estimation for coherent detection. TPC: Transmit powercontrol commands FBI: Feedback information TFCI: Optional transport format combination indicator SS-course 2004 # 133 UPLINK DEDICATED PHYSICAL CHANNELS c d,1 d DPDCH 1 DPDCH 3 c d,3 d I c d,5 d DPDCH 5 S dpch,n I+jQ c d,2 d S DPDCH 2 c d,4 d DPDCH 4 DPDCH 6 c d,6 d Q c c c j DPCCH SS-course 2004 # 134

68 DOWNLINK DEDICATED PHYSICAL CHANNELS DPDCH and DPCCH are time-multiplexed in downlink. The dedicated pilot channel facilitates the use of antennae in downlink. SS-course 2004 # 135 DOWNLINK DEDICATED PHYSICAL CHANNEL Pilot N pilot bits DPCCH TPC N TPC bits TFI N TFI bits DPDCH Data N data bits ms, 20*2 k bits (k=0..6) Slot #1 Slot #2 Slot #i Slot #16 T f = 10 ms Pilot: Known pilot bits support channel estimation for coherent detection. TPC: Transmit powercontrol commands TFI: Optional transport format combination indicator Frame #1 Frame #2 Frame #i Frame #72 T super = 720 ms SS-course 2004 # 136

69 SYNCHRONISATION IN UMTS The initial Cell Search is carried out in three steps: Slot synchronisation using the primary synchronisation channel. Frame synchronisation and code-group identification using the secondary synchronisation channel. Scrambling-code identification through symbol-by-symbol correlation over the primary CCPCH with all the scambling codes within the code group. SS-course 2004 # 137 MULTIPLE ACCESS INTERFERENCE Near-far scenario: K k User of interest Base station 2 strong 1 Interferer weak Remedy: either power control or multiuser detection SS-course 2004 # 138

70 POWER CONTROL SS-course 2004 # 139 OPEN LOOP POWER CONTROL P t1 d P r1 Duplexer AGC BTS P r2 P t2 Measure Rx power PA Adjust Tx power Mobile station P t2 = (P r1 ) nominal + P t1 P }{{ r2 [db] } loss SS-course 2004 # 140

71 OPEN LOOP POWER CONTROL Open loop power control relies on the assumption that the powerloss in the uplink and downlink channels are identical. The uplink and downlink channels are separated by 130 MHz in the UMTS system, which far exceeds the coherence bandwidth. Consequently, fluctuation of the channel coefficients in the two bands are uncorrelated and open loop power control fails in compensating for fast fading! SS-course 2004 # 141 CLOSED LOOP POWER CONTROL User data MUX Demultiplexer Decoding P C (n) Power control commands AGC adjust Eb/No target Eb/No, SNR measurement Power control commands Measure Quality Decoding Despreading & RAKE P t (n) PA user data Base station closed loop power control functions Mobile station closed loop power control functions P t (n) = P t (n 1) + P C (n) SS-course 2004 # 142

72 POWER CONTROL FOR THE UPLINK Closed-loop power control in IS-95: Standard deviation of the residual power adjustment error: db. SS-course 2004 # 143 UMTS FDD POWER CONTROL SPECIFICATIONS Open loop power control The downlink power is measured on the CCPCH (Common Control Physical Channel) before the MS transmits the randomaccess burst. Uplink interference level and required SIR is broadcast on the BCCH Closed loop power control Power control commands are sent every 0.625ms. The step size is db, and is fixed for each cell. Target SIR is determined by the outer loop. Outer loop power control The target SIR is determined by radio resource management, i.e. not a physical layer issue. The SIR level is adjusted according to a quality estimate (FER, BER, a.s.o). SS-course 2004 # 144

73 STREETCORNER EFFECT MS1 MS2 BTS1 MS3 BTS2 We expect a system crash in DS/CDMA. SS-course 2004 # 145 HANDOVER Interfrequency Handover Intrafrequency Handover f 1 f 1 f 2 f 3 f 2 f 2 f 1 f 1 f 2 f 1 f 1 f 1 a) b) Hierarchical cell structure Hot spot cells with several carriers SS-course 2004 # 146

74 INTRAFREQUENCY HANDOVER The MS is connected to two BS at the same time. Separate pilot channel used for signal strength measurments. Handover is initiated if signal becomes smaller than a certain threshold. Drawback: This 2 nd BS causes additional interference, because different cells use different scrambling codes. SS-course 2004 # 147 INTERFREQUENCY HANDOVER Using slotted downlink transmission, the MS can perform measurements on other frequencies. The regular 10 ms-frame is compressed in time, either by puncturing or by reducing the spreading factor with a factor of 2. During the remaining idle time of 5 ms, the MS can carry out interfrequency measurements. Instantaneous power Idle time Time Normal transmission Slotted Transmission SS-course 2004 # 148

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