Nonlinear Dynamic Analysis Efficiency by Using a GPU Parallelization

Transcription

1 Noliar Dyamic Aalysis Efficicy by Usig a GPU Paralllizatio Hog-yu Li, Ju g, Zuo-hua Li, ad Lu Zhag Abstract A graphics procssig uit (GPU) paralllizatio approach was implmtd to improv th fficicy of oliar dyamic aalysis. h GPU paralllizatio approach spdd up th computatio of implicit tim itgratio ad rducd total calculatio tim. I additio, a paralll quatios solvr is itroducd to solv th quatio systm. Numrical xampls of riforcd cocrt (RC) frams wr usd to ivstigat th paralll computig spdup of th GPU paralllizatio approach. A implmtatio of ths RC fram modls for fibr bam-colum lmts was prstd. h paralll fiit lmt program is dvlopd to provid paralll xcutio o prsoal computr (PC) with diffrt CUDA-capabl GPUs. h diffrt umbr of dgrs of frdom from low to high was adoptd i th umrical xampls. Dtaild tsts o accuracy, rutim, ad spdup ar coductd o diffrt GPUs. h oliar dyamic rspos usig th GPU paralllizatio program was i good agrmt with that obtaid by ABAQUS. Numrical studis idicat that compard with origial squtial approach, th GPU paralllizatio program achivs a 22 tims spdups of th solvig quatio systm ad improvs th ovrall fficicy of tim itgratio by up to 94%. Idx rms Equatios Solvr, Fiit Elmt Mthod, GPU Paralllizatio, Noliar Dyamic Aalysis I. INRODUCION h rfid structur modl is computatioally itsiv, spcially for larg-scal thr dimsioal (3D) modls, this maks th procss of oliar fiit lmt dyamic structural aalysis much tim cosumig. May modr paralll algorithms ad stratgis hav b proposd to rduc th computig tim so that girs could spd a rasoabl tim to coduct th oliar dyamic structural aalysis. Paralll algorithms applid to fiit lmt structural aalysis focusig rigorously o paralll quatios solvr mthod ad domai dcompositio mthod [1]. Paralll quatios solvr mthod grally mployd th dirct mthods or itrativ mthods to solv liar systm of quatios, such as Jacobi, Gauss-Sidl, Cojugat Gradits Mauscript rcivd April 11, 2015; rvisd July 20, his work was supportd i part by th Major Itratioal (Sio-US) Joit Rsarch Projct of th Natioal Natural Scic Foudatio of Chia (No ) ad th Natioal Natural Scic Foudatio of Chia (Nos ad ). Hog-yu Li, Ju g ad Zuo-hua Li ar with th School of Civil ad Eviromt Egirig, Shzh Graduat School, Harbi Istitut of chology, Shzh, Chia (pho: ; fax: ; mail: lhymoicahit@hotmail.com, tgj@hit.du.c, lizuohua@hitsz.du.c). Ju g is th corrspodig author. Lu Zhag is with th Dpartmt of Civil ad Matrials Egirig, Uivrsity of Illiois at Chicago, Chicago, IL 60607, USA (mail: zhag899@uic.du). (CG), tc. Usig dcompositio mthod, th structur was partitiod ito svral substructurs implmtd o computrs or computr clustrs utilizig diffrt applicatio programmig itrfacs (APIs), such as Op Multi-Procssig (OpMP) ad Mssag Passig Itrfac (MPI) [2]. Although may popular paralll quatios solvrs ad domai dcompositio mthods hav b applid to dyamic structural aalysis, som challgs still rmai. h mor complicatd aalysis tasks would b carrid out, th highr rsolutio mshs ad smallr tim icrmts ar rquird. Dirctly, mor tim ar dd i thos procsss. his is still a bottlck of paralll fficicy. It will caus dramatically high computatioal cost ad rquir larg mmory usag du to th larg amout of matrix opratios. h fficicy gts improvd by icrasig th umbr of procssig uits o computrs or computr clustrs. Howvr, high hat gratio ad powr cosumptio hidr th dvlopmts of such paralll mthods. Rctly, with th mrgc of gral-purpos computig o graphic procssig uit (GPU), shiftig th computatioal tasks to th GPU has bcom a attractiv optio. A typical GPU architctur is orgaizd as a array of multiprocssors or cors, capabl of hadlig graphical procssig opratios fficitly i paralll, thus solvig larg-scal computatioal problms usig ixpsiv off-th shlf hardwar bcoms possibl [3] [5]. I structural dyamic aalysis, a structur modl is mshd usig fiit lmts o rgular or irrgular grids i discrt spatial ad tim domais. h grid of fiit lmts forms a systm of (liar or oliar) quatios. Solvig th quilibrium quatios for ach tim stp (withi a icrmtal, itrativ Nwto stratgy to solv oliar quatios) domiats th computatioal cost of tim itgratio mthods. hus, solvig th systm of quatios is th ky lmt for high fficicy. h Prcoditiod Cojugat Gradit (PCG) solvr [6] offrs may advatags. h advatags com particularly to th for wh th solvr is usd i combiatio with a GPU as a modifid form of stram procssor that provids a massiv floatig-poit computatioal powr. his approach has alrady b a subjct of itrst of svral rsarchrs i rct yars [7] [9]. I this work, a GPU paralllizatio approach was implmtd to improv th fficicy of oliar dyamic aalysis. h GPU paralllizatio approach cotais paralllizatio Nwmark itgratio algorithm ad a paralll quatios solvr. h computig programs ca b xcutd o th GPU by usig Comput Uifid Dvic Architctur (CUDA). Compard with th implmtatio complxity of domai dcompositio mthod, th GPU paralllizatio i

2 this work is fi-grai paralllism, bcaus ach subrouti maps to th calculatio of a lmt of a array or matrix. hus, this approach ca b asily applid o a prsoal computr (PC) with CUDA-capabl GPU. Numrical xampls of riforcd cocrt (RC) frams wr usd to ivstigat th paralll computig spdups of th GPU paralllizatio approach. h rsults showd that th proposd GPU paralllizatio approach could highly improv th fficicy of oliar dyamic aalysis. riforcig bars withi th modl is discussd i Mgotto ad Pito [10]. I ordr to simulat th cocrt th modifid Kt Park modl [11] is applid, whr th mootoic vlop of th cocrt i comprssio follows th modl i [11] as xtdd by Scott t al. [12]. h hystrtic strss-strai rlatio of th cocrt implmtd with Blakly modl [13] ad th cocrt tsil strgth proposd by Yassi [14] ar also cosidrd. II. PROGRAM FRAMEWORK I ordr to implmt a program i a paralll architctur, th dtrmiatio of tasks that ca b paralllizd is formost. Paralllizatio is possibl oly wh th idividual tasks ar idpdt ad thr is o data dpdcy amog th tasks. I gral, FEM-basd umrical program icluds thr moduls: th pr-procss, th mai aalysis procss ad th post-procss. I this work, th CPU is usd for pr-procss ad post-procss tasks, whil th GPU is usd for th mai aalysis procss task. hat is, if ach tim stp solutio of th quilibrium quatios could b tratd as a subtask, it is dpdt oly i th sam tim stp, th th solutio would b do i a loop, o aftr th othr. his is o stratgy of coars-graid paralllizatio. Howvr, th most appropriat architctur of a GPU program should b basd o fi-graid paralllizatio, whr it is most fficit to hav adjact thrads oprat o adjact data, such as lmts of a array. Hc, i this work, data i matrics/vctors could b tratd as a idpdt computig uit whos variabls ar updatd idpdtly. h GPU xcuts idpdtly from th CPU but is cotrolld by th CPU. Most of th commuicatio ivolvs placig data i mmory ad trasmittig thm to th GPU. h framwork of tir program of paralll structural oliar dyamic aalysis is illustratd i Fig. 1. First, th mai program was xcutd i th CPU, calculatios iclud lmts matrix/vctor calculatios ad global matrix assmbly, matrial proprtis, boudary coditio forcmt, solutio paramtrs tc. h assmbly procss is prformd by th CPU bcaus svral ucoalscd global mmory accsss ad cosqutly poor prformac would occur at GPU for th sam procss. Also th groud motio is slctd for oliar dyamic aalysis at this stag. Scod, th CPU allocats storag o th GPU, th odal ad lmt data rquird ar stord i th global mmory of GPU ad first st to th GPU. h tasks assigd o GPU iclud radig th data from th CPU ad prformig tim-stp dyamic itgratios. Wh th tim-stp starts, th thrads ca b assigd o th GPU to prform th ffctiv stiffss/load matrix/vctor calculatios ad th paralll quatios solvr is usd at ach tim-stp. h th thrads ar assigd to prform th w rspos calculatios ad w iitial coditios updatig for xt tim-stp. Fially, rsults obtaid from th GPU ar trasfrrd ito th CPU ad output rsults ar prformd o th CPU aturally. I our program, th strai-displacmt matrix is calculatd oc durig th oliar procss ad its oliar part is updatd usig th currt displacmts by a simpl matrix product. h oliar bhaviour of th Fig. 1. Program framwork for paralll oliar dyamic aalysis III. IMPLICI DYNAMIC FINIE ELEMEN MEHOD A. Implicit im Itgratio I oliar aalysis, it is assumd that th physical proprtis rmai costat oly for short icrmts of tim; accordigly, it is covit to rformulat th rspos i trms of th icrmtal quatio of motio, as follows M U C U K U R (1) whr M is th global mass matrix; C is th global dampig matrix; K is th global tagt stiffss matrix; R is th icrmtal xtral load vctor; U is th icrmtal displacmt vctor; U is th icrmtal vlocity vctor; ad U is th icrmtal acclratio vctors. h Nwmark algorithm [15] was o of th most fficit implicit tim itgratio tchiqus, ad has b widly usd for both th liar ad oliar dyamic structural aalysis. Applicatio of Nwmark mthod i implicit tim itgratio of th dyamic rspos, th icrmtal vlocity ad displacmt ar xprssd as follows U =a0 U a2u t a 3U t (2) U =a1 U a4u t a 5U t (3) 2 whr a0 1/ t, a1 / t, a2 1/ t, a3 1/2, a4 /, a5 [ /(2 ) 1] t ; ad ar Nwmark paramtrs ad =1 4, =1 2. Substitutio of (2) ad (3) ito (1) will rsult i (4) th

3 quivalt quatio of motio Kˆ U R ˆ (4) i which K ˆ = K a a 0 M 1 C (5) ad Rˆ = R M ( a 2U t a 3U t ) C ( a 4Ut a 5U t ) (6) I oliar aalysis, th stiffss matrix should b updatd i ach tim stp ad th solutio schm usd i (4) corrspods to Nwto-Raphso itratio. B. Elmt to Structur Matrics ad Vctors h global structur matrics ar assmbld by dirct additio of th lmt matrics ad vctors by cosidrig itractios amog th lmts as wll as boudary coditios. h global stiffss matrix is K K (7) th global mass matrix is M M (8) th global dampig matrix is C cm ck (9) whr K is th stiffss matrix of th th lmt ad is th mass matrix of th th lmt. M C. Elmt Formulatios h stiffss matrix ad od forc vctor at lmt lvl ar prstd as follows N p s k k k k =1 N p s k k k =1 K B K B (10) F B F (11) whr N p is th umbr of itgral poits; B is th strai-displacmt matrix; K s s ad F ar th stiffss matrix ad od forc vctor of th sctio rspctivly. IV. GPU PARALLELIZAION A. Matrics/Vctors Calculatios via hrad-lvl Paralllism Rsarch i paralll programmig has producd a st of basic oprators for data paralll procssig. Paralll calculatios ar costructd from ths opratios. I this work, data i matrics/vctors (stiffss, forc, displacmt, tc.) ca b tratd as a idpdt computig uit whos variabls ar updatd idpdtly. Itsiv arithmtic opratios mak ths data particularly suitabl for paralll implmtatio o thrads. h thrad-lvl paralllism was carrid out by mappig th data oto a Stram Procssor as a thrad to xcut through th krl fuctio (krl) providd by CUDA [16]. hs thrads ca ru simultaously to achiv paralll xcutio ad acclratio. ak th ffctiv forc vctor for xampl, wh structurs ar subjctd to groud motio, Δ R= MΔU g, (6) ca b writt as Rˆ = M ( a U a U U ) C ( a U a U ) (12) 2 t 3 t g 4 t 5 t (1) (2) For th right had sid (1), if hr a lumpd mass matrix is usd, th corrspodig dsird thrad-data mappig ca b show i Fig. 2. h o-dimsioal arragmt of a collctio of blocks ad thrads that th krl is xcutd by N paralll blocks ar also illustratd. hat is, o-dimsioal grid of N blocks was costructd, whr th sam copy of krl cod was implmtd but havig diffrt valus for th variabl blockidx.x. W cosidr this simpl arragmt is workig o 1-dimsioal data, with a idx variabl blockidx.x, sstially rprstig th thrad ID. Fig. 2. hrad-data mappig i o-dimsioal arragmt For th (2) part i th right had sid of quatio (12), hr C is a symmtric badd spars matrix. I ordr to sav spac ad accss to ths data i matrix fficitly, oly th uppr (or lowr) badd portio of th matrix ds to b stord i o-dimsioal arrays. hs data typs ar orgaizd ito o-dimsioal arrays, which ca b fficitly maipulatd o a GPU. As th CUDA allows blocks to b split ito thrads, th two-dimsioal arragmt of a collctio of blocks ad thrads that th krl is xcutd by N paralll blocks with 128 GPU thrads ar show i Fig. 3. I this cas, th thrad ID should b blockdim%x*blockidx%x+thradidx%x. Fig. 3. hrad-data mappig i two-dimsioal arragmt B. Elmt to Structur Matrics ad Vctors Aothr possibl paralllizatio task is i th solutio of systm quatios. Itrativ mthods grally hav bttr scalability for paralll xcutio. Svral optimizd mthods for solvig th quatios hav b proposd. For xampl, a cojugat gradit solvr is a itrativ solvr for a symmtric positiv dfiit (SPD) spars matrix ad a Jacobi

4 solvr is a itrativ mthod for a liar systm with a diagoally domiat matrix [17]. hs solvrs mak havy us of th spars liar algbra mthods usig optimizd rprstatios ad algorithms to xploit th particular spars pattr. I this work, th GPU-basd paralll vrsio of prcoditiod cojugat gradit (PCG) algorithm is prstd. h PCG algorithm has show its fficicy ad robustss i a wid rag of applicatios. With a suitabl prcoditior, th prformac ca b dramatically icrasd. Jacobi prcoditiors ar commoly usd prcoditiors for paralll formulatios. I this work, a diagoal matrix P comprisig of th diagoal tris of matrix ˆK is dfid as prcoditior. Equatio (4) lads to a liar systm ad prcoditioig is rplacd by 1 1 P Ax P b (13) whr P is symmtric positiv dfiit. h squtial PCG algorithm is as follows k 0 : Iitializatio: x 0, r0 b Ax 0, Pz0 r 0, d0 z 0 k 0 : whil rk r 0 olrac k k 1. qk Ad k, k zr dq k k 2. x x d, r r q k 1 k k k k 1 k k k 3. Pzk 1 r k 1 k 1 k 1 4. k z r, d k 1 rk 1 kd k zr k k h PCG algorithm shows that most of th opratios iclud vctor-vctor additios combid with vctor-scalar multiplicatio, kow as SAXPY opratios; which is usd to comput matrix-vctor products of th form Ad ad vctor ir products. h paralllizatio of SAXPY opratios (for x, r ad d) ad spars matrix vctor opratios (for q) ar straightforward ad dirctly availabl from CUBLAS library, xcpt th prcoditioig opratio i stp 3 ( Pzk 1 r k 1) which was implmtd by writig krl. Algorithm 1 shows th GPU implmtatio of PCG. Algorithm 1: Computatioal stps of PCG implmtd o GPU bgi //Iitialisatio 1 Comput variabls ad paramtrs o CPU 2 Copy data from th CPU buffr to th GPU buffr //Itratio 3 Assig tasks for GPU 4 whil thr is a xt loop do 5 Lauch GPU CUBLAS library 6 if prcoditioig is dd th 7 Lauch GPU krl for th prcoditioig opratio part 8 if th stoppig critrio is mt, xit th loop 9 Copy data from th GPU buffr to th CPU buffr 10 Updat variabls ad paramtrs o CPU d V. NUMERICAL EXAMPLES A. Modl Cass riforcd cocrt (RC) fram modls (s Fig. 4) wr usd to ivstigat th paralll computig spdups of th GPU paralllizatio approach. hs modls wr simulatd usig fibr bam-colum lmts [18], ad th matrial oliaritis wr cosidrd. h diffrt umbr of dgrs of frdom (DOFs) from low to high was adoptd i th umrical xampls, ad th umbr of DOFs rags from 1,500 to 10,920 as show i abl I. North-south compot rcordd at Kob Japas Mtorological Agcy (JMA) statio durig th Hyogo-k Nabu (Kob) arthquak of Ja. 17, h magitud is 7.2. h pak groud acclratio (PGA) was ormalizd to 220gal, which corrspods to arthquaks with 2% probabilitis of xcdac i 50 yars [19]. With this lvl of PGA, th structurs will stp ito th oliar stats. I ach cas, th structur was subjctd to 20.0 s of th groud acclratio at a costat tim stp of s ad th umbr of tim stps was h dyamic aalysis of ths fram modls is prformd usig a 5% Rayligh dampig. (a) F1-1 (b) F2-1 (c) F3-1 (d) F4-1 () F5-1 (f) F1-2 (g) F2-2 (h) F3-2 (i) F4-2 (j) F5-2 Fig. 4. Fram modls ABLE I SIZE OF HE ESED FRAME MODELS No Modl Elmts umbr Nods umbr DOFs umbr 1 F F F F F F F F F F B. Paramtrs of Hardwar-Ovrviw h dvlopd GPU paralllizatio program was coductd o thr computrs. h computrs usd i tstig ar dscribd i abl II. ABLE II SPECS OF HE COMPUERS USED FOR ESING Spcs Computr 1 Computr 2 Computr 3 CPU Itl Quad-cor Itl Quad-cor Itl Quad-cor CPU i CPU i CPU i CPU cors RAM 4 GB 4 GB 4 GB GPU NVIDIA Gforc NVIDIA Gforc NVIDIA Gforc G430 G720 GX460 GPU cors Graphics mmory 1 GB 1 GB 1 GB Multiprocssors Opratig systm Widows 7, 64-bit Widows 7, 64-bit Widows 7, 64-bit

5 Egirig Lttrs, 23:4, EL_23_4_01 C. Numrical Validatio o sur that th GPUs aalysis could produc good aalysis accuracy compard with th commrcial FEM softwar ABAQUS, th aalysis rsults of F1-1 modl wr chckd. h displacmt, vlocity ad acclratio historis of th top of th buildig wr obtaid by GPU paralllizatio program ad ABAQUS program. Figurs 5 ad 6 show th groud motio, th top displacmt, vlocity ad acclratio wr aalyzd. h diffrcs of th top rsposs historis btw th two programs ar rlativly small ad idicat that th proposd GPU paralllizatio program is i good agrmt with that of ABAQUS. Fig. 5. Groud acclratio (N-S compot rcordd at Kob JMA St.) (a) top displacmt of F1-1 (b) top vlocity of F1-1 (c) top acclratio of F1-1 ABAQUS GPU program Fig. 6. Accuracy chck of F1-1 modl: (a) top displacmt; (b) top vlocity; (c) top acclratio h maximum story displacmts alog th hight of th structur wr plottd i Fig. 7(a). h dformd shap of th structur obtaid by GPU paralllizatio program is vry clos to th os by ABAQUS. Som mior diffrcs ar obsrvd i lowr storis ad th trd is rvrsd at uppr storis. h rlativ story displacmts (s Fig. 7(b)) ar clos btw storis four ad sv, whil i lowr ad uppr storis, th rsults obtaid usig GPU program wr smallr tha thos simulatd from ABAUQS. hrfor, it suggsts th fasibility of this paralll algorithm ad th vracity ad rliability i cas of oliar dyamic aalysis could b achivd. (a) Max. story displacmts (b) Max. rlativ story displacmts ABAQUS GPU program Fig. 7. Maximum rspos of F1-1 modl D. Efficicy Evaluatio I GPU paralll aalysis, all modls (s Fig. 4) wr aalyzd by NVIDIA Gforc G430 GPU, NVIDIA Gforc G720 GPU, ad NVIDIA Gforc GX460 GPU. h origial squtial CPU implmtatios wr coductd for compariso purposs. Aalyss o oly 100 tim stps wr carrid out bcaus this sctio focuss o paralll fficicy valuatio rathr tha th oliarity of th structural bhaviors. First, th block siz of CUDA i th GPU paralllizatio program is implmtd for all tstd modls. abl III shows th rlatioship btw umbr of thrads i a block ad th tim cost. As show i abl III, th tim cost is rlativ small wh th block siz rags from 32 to 256; wh th block siz is smallr tha 32, th tim cost will gt biggr. h primary raso of low prformac is that thrads should b ruig i groups of at last 32 (32 thrads is a warp) for optimal computig fficicy whil usig CUDA for paralll computig. hrfor, som of th computig capability is wastd wh th block siz is lss tha 32. Howvr, limitatio o th architctur of GPU is aothr factor to b cosidrd. I this work, w tak NVIDIA Gforc GX460 GPU for xampl, th availabl rgistrs for ach multiprocssor ar 4,681 (total 32,768 rgistrs ad 7 multiprocssors, 32,768/7 = 4,681 rgistrs pr multiprocssor). h maximum umbr rgistrs that ca b usd by ach thrad ar 98. If ach block uss may rgistrs, th umbr of blocks that ca b rsidt o a multiprocssor is rducd, thrby lowrig th prformac of th multiprocssor. hus, if th block siz is gratr tha 512, th availabl rgistrs for a thrad will dcras, thrby yildig lowr prformac for th paralll computatio. ABLE III RELAIONSHIP BEWEEN BLOCK SIZE AND IME COS FOR ESED MODELS otal tim of tstd modls usig GPU paralllizatio program (s) Modl hrad hrad hrad hrad hrad hrad hrad hrad =8 = 16 = 32 = 64 = 128 = 256 = 512 = 1024 a F F F F F F F F F F a h GPUs usd i this papr supports 1,024 thrads pr block.

6 Egirig Lttrs, 23:4, EL_23_4_01 Figur 8 illustrats th lapsd tim of modl F5-2 o diffrt GPU krls. It shows that th PCG basd quatios solutio krl of dyamic itratio taks mor tha 75% (G430 GPU) to 79% (GX460 GPU) of th rutim, whil othr procdurs tak lss rutim with 25% (G430 GPU) to 21% (GX460 GPU). h procss of solvig th quatios dtrmis th ovrall rutim; this mas that th PCG basd paralll quatios solvr spdup ca rprst th ovrall spdup to som xtt. ABLE IV ELAPSED IME OF PCG PARALLEL SOLVER ON DIFFEREN GPUS Elapsd tim (s) DOFs G430 GPU G720 GPU GX460 GPU 1, , , , , , , , , , (a) G430 GPU Fig. 9. Spdup of PCG solvr vrsus umbr of frdoms usig diffrt GPUs (b) G720 GPU (c) GX460 GPU Fig. 8. Elapsd tim of modl F5-2 o diffrt GPU krls. Elmts rprsts lmts ad odal calculatios (stiffss matrix, forc, displacmt, tc.); Stat updat mas th phas of lmt stat dtrmiatio aftr th lmt displacmts ar xtractd from th structural displacmts I structural dyamic aalysis, th proportio of th tim cost associatd with systm quatios solvig to th total tim sigificatly icrass with th problm siz. h lapsd tim o diffrt GPUs is show i abl IV (128 thrads pr block). h GX460 GPU is th last tim-cosumig o. h mai raso causig such diffrcs is th umbrs of CUDA cors. I paralll computig, spdup rfrs to th ratio of th squtial aalysis tim to th paralll aalysis tim [5]. W obtai diffrt spdup of PCG solvr vrsus problm siz, i.. umbr of DOFs, which is prstd i Fig. 9. It ca b obsrvd that v for small siz problms th paralll quatios solvr is suprior i prformac. h paralll quatios solvr shows a good paralll prformac, th maximum spdup rachs with almost 22 tims of th solvig quatio systm usig th GX460 GPU. For valuatig th ovrall computatioal prformac of th implicit tim itgratio algorithms, Fig. 10 shows th total lapsd tim o th CPU ad GX 460 GPU vrsus th umbr of DOFs. h total tim icluds th tim cosumd by pr-procss ad post-procss. Du to paucity of computr tim, th aalysis was carrid out for 200 tim stps, ad ach tim stp may cotai two or mor Nwto-Raphso itratios. It ca b obsrvd from Fig. 10 that th GPU paralll mthod could rduc th ovrall tim cosumd, spcially i larg problm siz. It savs 83% (modl of F1-1, DOFs = 1.5k) to 94% (modl of F5-2, DOFs = 11k) of total lapsd tim compard with th squtial mthod. Fig. 11 shows th spdup prformac of paralll algorithms chag with th umbr of DOFs. h spdup is approximatly 16 with a DOFs of 10,920 by usig th GX460 GPU. Fig. 10. otal lapsd tim vrsus th umbr of frdoms Fig. 11. Spdup for paralll implicit tim itgratio algorithms

7 A commo bottlck of GPU applicatios is avoidd by rducig th umbr of data trasfrs btw th CPU ad th GPU. hus, th commuicatio ovrhads btw CPU ad GPU wr discussd i this papr ad th rsults ar show i Fig. 12. h rsults idicat that, th commuicatio ovrhads icras with th icras of DOFs, but th proportio of th ovrall aalysis tim dcrass. Also, th commuicatio ovrhads of GX460 GPU ar rlativly small compard with th othr two GPUs, bcaus it has largr mmory ad widr badwidth. Fasibly, th commuicatio tim btw GPU ad CPU was trivial; furthrmor, with th icras of DOFs, th commuicatio tim cosumd will b ot worth mtioig. Fig. 12. Commuicatio tim btw CPU ad GPU vrsus th umbr of frdoms VI. CONCLUSION A fficit, GPU-basd paralllizatio program for structural oliar dyamic aalysis was dvlopd. h most tim cosumig procdur i implicit oliar dyamic aalysis is th liar quatios solvr. A PCG paralll quatios solvr has b dvlopd, ad Matrix-vctor computatio via th thrad-lvl paralllism was carrid out by mappig th data to thrad ad paralll xcutig through th krl fuctios. h solutio of a dyamic FEM has b prformd o th GPU by usig CUDA. h prformac of th paralll program is valuatd by solvig t RC fram modls subjctd to groud motio composd of fibr colum-bam lmts. Dtaild tsts o accuracy, rutim, ad spdup ar coductd o diffrt GPUs. Numrical tsts idicatd that th GPU paralllizatio approach i this papr has mad th ovrall program mor fficit. h GPU-basd paralllizatio program achivs a 22 tims spdups of th solvig quatio systm ad improvs th ovrall fficicy of implicit tim itgratio 83 to 94% compard with th CPU-basd squtial mthod. I futur work, optimizatios will b ivstigatd i practical problms o GPUs with diffrt cofiguratios. 3-D fiit lmt aalysis, Computrs & Structurs, vol. 79, o. 5, pp , [3] B. N. Chtvrushki, E. V. Shilikov, ad A. A. Davydov, Numrical simulatio of th cotiuous mdia problms o hybrid computr systms, Advacs i Egirig Softwar, vol , pp , [4] N. Zhag, C.-U. Li, ad K. L. Ma, Biomial Amrica Optio Pricig o CPU-GPU Htrogous Systm, Egirig Lttrs, vol. 20, o. 3, pp , [5] H.-Y. Li, J. g, ad Z.-H. Li, Aalysis mthod for sismic rspos of high-ris structur basd o CPU-GPU htrogous platform, Joural of Vibratio ad Shock, vol. 33, o. 13, pp , [6] O. Kardai, A. V. Lyami, ad K. Krabbhoft, A Comparativ Study of Prcoditioig chiqus for Larg Spars Systms Arisig i Fiit Elmt Limit Aalysis, IAENG Itratioal Joural of Applid Mathmatics, vol. 43, o. 4, pp , [7] J. Bolz, I. Farmr, E. Grispu, ad P. Schröodr, Spars matrix solvrs o th GPU: cojugat gradits ad multigrid, i ACM rasactios o Graphics (OG), vol. 22, o. 3, pp , [8] L. Buatois, G. Caumo, ad B. Lvy, Cocurrt umbr cruchr: a GPU implmtatio of a gral spars liar solvr, Itratioal Joural of Paralll, Emrgt ad Distributd Systms, vol. 24, o. 3, pp , [9] V. Galiao, H. Migalló, V. Migalló, ad J. Padés, GPU-basd paralll algorithms for spars oliar systms, Joural of Paralll ad Distributd Computig, vol. 72, o. 9, pp , [10] M. Mgotto, P. E. Pito, ad R. C. Sldr, Comprssd mmbrs i biaxial bdig, Joural of Structural Divisio, ASCE, vol. 103, o.3, pp , [11] D. C. Kt ad R. Park, Flxural Mmbrs with Cofid Cocrt, Joural of th Structural Divisio, ASCE, vol. 97, o. 7, pp , [12] B. D. Scott, R. Park, ad M. J. N Pristly, Strss strai bhaviour of cocrt cofid by ovrlappig hoops at low ad high strai rats, ACI Joural, vol. 79, o. 1, pp , [13] R. W. G. Blakly ad R. Park, Prstrssd cocrt sctios with cyclic flxur, Joural of th Structural Divisio, ASCE, vol. 99, o. 8, pp , [14] M. H. M. Yassi, Noliar aalysis of prstrssd cocrt structurs udr mootoic ad cyclig loads, Ph.D. dissrtatio, Uivrsity of Califoria, Brkly, [15] M. N. Natha, A mthod of computatio for structural dyamics, Joural of Egirig Mchaics, ASCE, vol. 85, o. 3, pp , [16] Vidai Corporatio. July CUDA C Programmig Guid. Availabl: < > [17] D. Blyth, Ris of th graphics procssor, Procdigs of th IEEE, vol. 96, o. 5, pp , [18] E. Spaco, F. C. Fillippou, ad F. F. aucr, Fibr bam-colum modl for oliar aalysis of RC frams: Part I. Formulatio, Earthquak Egirig & Structur Dyamics, vol. 25, pp , [19] Cod for sismic dsig of buildigs (GB ), Miistry of Costructio of th Popl s Rpublic of Chia (MCPRC), Bijig, Chia: Chia Architctur & Buildig Prss, ACKNOWLEDGMEN h authors ar gratful to th rviwrs for thir thoughtful i-dpth commts which hav b vry hlpful i th rvisio of this papr. REFERENCES [1] Y.-S. Yag, S. H. Hsih, ad. J. Hsih, Improvig paralll substructurig fficicy by usig a multilvl approach, Joural of Computig i Civil Egirig, vol. 26, o. 4, pp , [2] A. S. Gullrud ad R. H. Dodds Jr., MPI-basd implmtatio of a PCG solvr usig a EBE architctur ad prcoditior for implicit,