CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate

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Transcription:

CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate General Description These triple gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors All inputs are protected against static discharge with diodes to V DD and V SS Connection Diagrams CD4023M CD4023C Features Dual-In-Line Packages February 1988 Y Wide supply voltage range 3 0V to 15V Y High noise immunity 0 45 VDD (typ ) Y 5V 10V parametric ratings Y Low power CD4025M CD4025C CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate Top View TL F 5955 1 Top View TL F 5955 2 Order Number CD4023 or CD4025 C1995 National Semiconductor Corporation TL F 5955 RRD-B30M105 Printed in U S A

Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Voltage at Any Pin Operating Temperature Range CD4023M CD4025M CD4023C CD4025C V SS b to V DD a0 3V b55 Ctoa125 C b40 Ctoa85 C Storage Temperature Range Power Dissipation (P D ) Dual-In-Line Small Outline Operating V DD Range Lead Temperature (Soldering 10 seconds) b65 Ctoa150 C 700 mw 500 mw V SS a3 0V to V SS a15v 260 C DC Electrical Characteristics CD4023M CD4025M Symbol Parameter Conditions b55 C a25 C a125 C Units Limits Min Max Min Typ Max Min Max I L Quiescent Device V DD e 5 0V 0 05 0 001 0 05 3 0 ma Current V DD e 10V 0 1 0 001 0 1 6 0 ma P D Quiescent Device V DD e 5 0V 0 25 0 005 0 25 15 mw Dissipation Package V DD e 10V 1 0 0 01 1 0 60 mw V OL Output Voltage V DD e 5 0V V I e V DD I O e0a 0 05 0 0 05 0 05 V Low Level V DD e 10V V I e V DD I O e0a 0 05 0 0 05 0 05 V V OH Output Voltage V DD e 5 0V V I e V SS I O e0a 4 95 4 95 5 0 4 95 V High Level V DD e 10V V I e V SS I O e0a 9 95 9 95 10 9 95 V V NL Noise Immunity V DD e 5 0V V O e 3 6V I O e 0A 1 5 1 5 2 25 1 4 V (All Inputs) V DD e 10V V O e 7 2V I O e 0A 3 0 3 0 4 5 2 9 V V NH Noise Immunity V DD e 5 0V V O e 0 95V I O e 0A 1 4 1 5 2 25 1 5 V (All Inputs) V DD e 10V V O e 2 9V I O e 0A 2 9 3 0 4 5 3 0 V I D N Output Drive Current V DD e 5 0V V O e 0 4V V I e V DD 0 5 0 40 1 0 0 28 ma N-Channel (4025) (Note 2) V DD e 10V V O e 0 5V V I e V DD 1 1 0 9 2 5 0 65 ma I D P Output Drive Current V DD e 5 0V V O e 2 5V V I e V SS b0 62 b0 5 b2 0 b0 35 ma P-Channel (4025) (Note 2) V DD e 10V V O e 9 5V V I e V SS b0 62 b0 5 b1 0 b0 35 ma I D N Output Drive Current V DD e 5 0V V O e 0 4V V I e V DD 0 31 0 25 0 5 0 175 ma N-Channel (4023) (Note 2) V DD e 10V V O e 0 5V V I e V DD 0 63 0 5 0 6 0 35 ma I D P Output Drive Current V DD e 5 0V V O e 2 5V V I e V SS b0 31 b0 25 b0 5 b0 175 ma P-Channel (4023) (Note 2) V DD e 10V V O e 9 5V V I e V SS b0 75 b0 6 b1 2 b0 4 ma I I Input Current 10 pa Note 1 Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices should be operated at these limits The tables of Recommended Operating Conditions and Electrical Characteristics provide conditions for actual device operation Note 2 I D N and I D P are tested one output at a time 2

DC Electrical Characteristics CD4023C CD4025C Symbol Parameter Conditions b40 C a25 C a85 C Units Limits Min Max Min Typ Max Min Max I L Quiescent Device V DD e 5 0V 0 05 0 005 0 5 15 ma Current V DD e 10V 5 0 0 005 5 0 30 ma P D Quiescent Device V DD e 5 0V 2 5 0 025 2 5 75 mw Dissipation Package V DD e 10V 50 0 05 50 300 mw V OL Output Voltage V DD e 5 0V V I e V DD I O e0a 0 01 0 0 01 0 05 V Low Level V DD e 10V V I e V DD I O e0a 0 01 0 0 01 0 05 V V OH Output Voltage V DD e 5 0V V I e V SS I O e0a 4 99 4 99 5 0 4 95 V High Level V DD e 10V V I e V SS I O e0a 9 99 9 99 10 9 95 V I I Input Current 10 pa V NL Noise Immunity V DD e 5 0V V O e 3 6V I O e 0A 1 5 1 5 2 25 1 4 V (All Inputs) V DD e 10V V O e 7 2V I O e 0A 3 0 3 0 4 5 2 9 V V NH Noise Immunity V DD e 5 0V V O e 0 95V I O e 0A 1 4 1 5 2 25 1 5 V (All Inputs) V DD e 10V V O e 2 9V I O e 0A 2 9 3 0 4 5 3 0 V I D N Output Drive Current V DD e 5 0V V O e 0 4V V I e V DD 0 35 0 3 1 0 0 24 ma N-Channel (4025) (Note 2) V DD e 10V V O e 0 5V V I e V DD 0 72 0 6 2 5 0 48 ma I D P Output Drive Current V DD e 5 0V V O e 2 5V V I e V SS b0 35 b0 3 b2 0 b0 24 ma P-Channel (4025) (Note 2) V DD e 10V V O e 9 5V V I e V SS b0 3 b0 25 b1 0 b0 2 ma I D N Output Drive Current V DD e 5 0V V O e 0 4V V I e V DD 0 145 0 12 0 5 0 095 ma N-Channel (4023) (Note 2) V DD e 10V V O e 0 5V V I e V DD 0 3 0 25 0 6 0 2 ma I D P Output Drive Current V DD e 5 0V V O e 2 5V V I e V SS b0 145 b0 12 b0 5 b0 095 ma P-Channel (4023) (Note 2) V DD e 10V V O e 9 5V V I e V SS b0 35 b0 3 b1 2 b0 24 ma I I Input Current 10 pa Note 1 Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices should be operated at these limits The tables of Recommended Operating Conditions and Electrical Characteristics provide conditions for actual device operation Note 2 I D N and I D P are tested one output at a time 3

AC Electrical Characteristics T A e 25 C C L e 15 pf and input rise and fall times e 20 ns Typical temperature coefficient for all values of V DD e 0 3% C Symbol Parameter Conditions Min Typ Max Units CD4025M t PHL Propagation Delay Time V DD e 5 0V 35 50 ns High to Low Level V DD e 10V 25 40 ns t PLH Propagation Delay Time V DD e 5 0V 35 40 ns Low to High Level V DD e 10V 25 70 ns t THL Transition Time V DD e 5 0V 65 125 ns High to Low Level V DD e 10V 35 70 ns t TLH Transition Time V DD e 5 0V 65 175 ns Low to High Level V DD e 10V 35 75 ns CD4025C t PHL Propagation Delay Time V DD e 5 0V 35 80 ns High to Low Level V DD e 10V 25 55 ns t PLH Propagation Delay Time V DD e 5 0V 35 120 ns Low to High Level V DD e 10V 25 65 ns t THL Transition Time V DD e 5 0V 65 200 ns High to Low Level V DD e 10V 35 115 ns t TLH Transition Time V DD e 5 0V 65 300 ns Low to High Level V DD e 10V 35 125 ns CD4023M t PHL Propagation Delay Time V DD e 5 0V 50 75 ns High to Low Level V DD e 10V 25 40 ns t PLH Propagation Delay Time V DD e 5 0V 50 75 ns Low to High Level V DD e 10V 25 40 ns t THL Transition Time V DD e 5 0V 75 125 ns High to Low Level V DD e 10V 50 75 ns t TLH Transition Time V DD e 5 0V 75 100 ns Low to High Level V DD e 10V 40 60 ns CD4023C t PHL Propagation Delay Time V DD e 5 0V 50 100 ns High to Low Level V DD e 10V 25 50 ns t PLH Propagation Delay Time V DD e 5 0V 50 100 ns Low to High Level V DD e 10V 25 50 ns t THL Transition Time V DD e 5 0V 75 150 ns High to Low Level V DD e 10V 50 100 ns t TLH Transition Time V DD e 5 0V 75 125 ns Low to High Level V DD e 10V 40 75 ns AC Parameters are guaranteed by DC correlated testing 4

Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number CD4023MJ CD4023CJ CD4025MJ or CD4025CJ NS Package Number J14A 5

CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number CD4023MN CD4023CN CD4025MN or CD4025CN NS Package Number N14A LIFE SUPPORT POLICY NATIONAL S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or 2 A critical component is any component of a life systems which (a) are intended for surgical implant support device or system whose failure to perform can into the body or (b) support or sustain life and whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system or to affect its safety or with instructions for use provided in the labeling can effectiveness be reasonably expected to result in a significant injury to the user National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd Japan Ltd 1111 West Bardin Road Fax (a49) 0-180-530 85 86 13th Floor Straight Block Tel 81-043-299-2309 Arlington TX 76017 Email cnjwge tevm2 nsc com Ocean Centre 5 Canton Rd Fax 81-043-299-2408 Tel 1(800) 272-9959 Deutsch Tel (a49) 0-180-530 85 85 Tsimshatsui Kowloon Fax 1(800) 737-7018 English Tel (a49) 0-180-532 78 32 Hong Kong Fran ais Tel (a49) 0-180-532 93 58 Tel (852) 2737-1600 Italiano Tel (a49) 0-180-534 16 80 Fax (852) 2736-9960 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications