74VHC244 74VHCT244 Octal Buffer Line Driver with TRI-STATE Outputs
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1 244 T244 Octal Buffer Line Driver with TRI-STATE Outputs General Description The HC HCT244 is an advanced high speed CMOS octal bus buffer fabricated with silicon gate C2MOS technology It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation The HC HCT244 is a non-inverting TRI-STATE buffer having two active-low output enables These devices are designed to be used as TRI-STATE memory address drivers clock drivers and bus oriented tramitter receivers An input protection circuit eures that 0 7 can be applied to the input pi without regard to the supply voltage This device can be used to interface 5 to 3 systems and two supply systems such as battery back up This circuit prevents device destruction due to mismatched supply and input voltages Features High noise immunity HC NIH e NIL e 28% CC (min) HCT IH e 2 0 IL e 0 8 Power down protection HC inputs only HCT inputs and outputs Low noise HC OLP e 0 6 (typ) HCT OLP e 0 7 (typ) Low power dissipation I CC e 4 ma (max) T A e 25 C Balanced propagation delays tplh j t PHL Pin and function compatible with 74HC HCT244 October 1995 NOTE ADD EXTERNAL PULL UP RESISTOR TO HCT OUTPUTS TO DRIE CMOS INPUTS Commercial Package Number Package Description 244M M20B 20-Lead Molded JEDEC SOIC 244SJ M20D 20-Lead Molded EIAJ SOIC 244MSC MSC20 20-Lead Molded EIAJ Type 1 SSOP 244MTC MTC20 20-Lead Molded JEDEC Type 1 TSSOP 244N N20A 20-Lead Molded DIP T244M M20B 20-Lead Molded JEDEC SOIC T244SJ M20D 20-Lead Molded EIAJ SOIC T244MTC MTC20 20-Lead Molded JEDEC Type 1 TSSOP T244N N20A 20-Lead Molded DIP Note Surface mount packages are also available on Tape and Reel Specify by appending the suffix letter X to the ordering code EIAJ Type 1 SSOP available on Tape and Reel only order MSCX Logic IEEE IEC Connection Diagram Pin Assignment for DIP SSOP TSSOP and SOIC Truth Tables Inputs Outputs (Pi ) OE 1 I n L L L L H H H X Z Inputs Outputs OE 2 I n (Pi ) L L L L H H H X Z 244 T244 Octal Buffer Line Driver with TRI-STATE Outputs TL F TL F H e HIGH oltage Level L e LOW oltage Level I e Immaterial Ze High Impedance Pin Names OE 1 OE 2 I 0 I 7 O 0 O 7 Description TRI-STATE Output Enable Inputs Inputs TRI-STATE Outputs TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F RRD-B30M125 Printed in U S A
2 Absolute Maximum Ratings (Note 1) Supply oltage ( CC ) DC Input oltage ( IN ) DC Output oltage ( OUT ) HC HCT Input Diode Current (I IK ) Output Diode Current (I OK ) HC HCT DC Output Current (I OUT ) DC CC GND Current (I CC ) Storage Temperature (T STG ) Lead Temperature (T L ) (Soldering 10 seconds) OUT l CC only if output is in H or Z state b0 5 to a7 0 b0 5 to a7 0 b0 5 to CC a 0 5 b0 5 to 7 0 b20 ma g20 ma b20 ma g25 ma g75 ma b65 Ctoa150 C 260 C DC Characteristics for HC Family Devices CC () Note 1 Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired The databook specificatio should be met without exception to eure that the system design is reliable over its power supply temperature and output input loading variables National does not recommend operation outside databook specificatio Recommended Operating Conditio Supply oltage ( CC ) HC HCT Input oltage ( IN ) Output oltage ( OUT ) Operating Temperature (T OPR ) HCT Input Rise and Fall Time (t r t f ) CC e 3 3 g0 3 (HC Only) CC e 5 0 g0 5 T T A e 25 C A eb40 C to a85 C Min Typ Max Min Max Units 2 0 to to 5 5 0to a5 5 0to CC b40 Ctoa85 C 0 E E 20 Conditio IH High Level Input oltage CC 0 7 CC IL Low Level Input oltage CC 0 3 CC OH High Level Output oltage IN e IH I OH eb50 ma or IL I OH eb4ma I OH eb8ma OL Low Level Output oltage IN e IH I OL e 50 ma or IL I OL e 4mA I OL e 8mA 2
3 DC Characteristics for HC Family Devices (Continued) I OZ TRI-STATE Output Off-State Current CC () T A e 25 C Min Typ Max Min Max T A eb40 C Units Conditio to a85 C 5 5 g0 25 g2 5 ma IN e IH or IL OUT e CC or GND I IN Input Leakage Current g0 1 g1 0 ma IN e 5 5 or GND I CC Quiescent Supply Current ma IN e CC or GND DC Characteristics for HC Family Devices CC () T A e 25 C Units Conditio Typ Limits OLP OL IHD ILD guaranteed by design Quiet Output Maximum Dynamic OL Quiet Output Minimum Dynamic OL Minimum High Level Dynamic Input oltage Maximum High Level Dynamic Input oltage b0 6 b
4 DC Characteristics for HCT Family Devices CC () T T A e 25 C A eb40 C to a85 C Min Typ Max Min Max IH High Level Input oltage IL Low Level Input oltage OH High Level Output oltage OL Low Level Output oltage Units Conditio IN e IH I OH eb50 ma or IL IOH eb8ma IN e IH I OL e 50 ma or IL IOL e 8mA I OZ TRI-STATE IN e IH or IL Output Off-State 5 5 g0 25 g2 5 ma OUT e CC or GND Current I IN Input IN e 5 5 or GND Leakage g0 1 g1 0 ma Current I CC Quiescent IN e CC or GND Supply ma Current I CCT Maximum ma IN e 3 4 Other I CC Input Inputs e CC or GND I OPD Output OUT e 5 5 Leakage (Power Down State) 0 0 a0 5 a5 0 ma DC Characteristics for HCT Family Devices CC () T T A e 25 C Units Conditio Typ Limits OLP Quiet Output Maximum Dynamic OL OL Quiet Output Minimum Dynamic OL b0 7 b1 0 IHD Minimum High Level Dynamic Input oltage 2 0 ILD Maximum High Level Dynamic Input oltage 0 8 guaranteed by design 4
5 AC Electrical Characteristics for HC Family Devices CC () T T A e 25 C A eb40 C to a85 C Min Typ Max Min Max Units Conditio t PLH Propagation Delay Time C 3 3 g0 3 L e 15 pf t PHL CL e 50 pf 5 0 g C L e 15 pf t PZL TRI-STATE Output Enable R 3 3 g0 3 L e 1kX C L e15 pf t PZH Time CL e 50 pf 5 0 g C L e 15 pf t PLZ TRI-STATE 3 3 g R L e 1kX C L e50 pf t PHZ Output 5 0 g Disable Time t OSLH Output to Output Skew 3 3 g (Note 1) t OSHL 5 0 g CL e 50 pf C IN Input Capacitance pf CC e Open C OUT Output Capacitance 6 pf CC e 5 0 C PD Power Dissipation Capacitance 19 pf (Note 2) Note 1 guaranteed by design t OSLH e lt PLHmax b t PLHminl t OSHL e lt PHLmax b t PHLminl Note 2 C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current coumption without load Average operating current can be obtained by the equation I CC (OPR ) e C PD CC f IN a I CC 8 (per bit) 5
6 AC Electrical Characteristics for HCT Family Devices CC () T T T T A e 25 C A eb40 C to a85 C Min Typ Max Min Max Units Conditio t PLH Propagation Delay Time 5 0 g C L e 15 pf t PHL CL e 50 pf t PZL TRI-STATE Output Enable Time 5 0 g R L e 1kX C L e15 pf t PZH CL e 50 pf t PLZ TRI-STATE 5 0 g0 5 R L e 1kX C L e50 pf t PHZ Output Disable Time t OSLH Output to Output Skew 5 0 g0 5 (Note 1) t OSHL C IN Input Capacitance pf CC e Open C OUT Output Capacitance 9 pf CC e 5 0 C PD Power Dissipation Capacitance 18 pf (Note 2) Note 1 guaranteed by design t OSLH e lt PLHmax b t PLHminl t OSHL e lt PHLmax b t PHLminl Note 2 C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current coumption without load Average operating current can be obtained by the equation I CC (OPR ) e C PD CC f IN a I CC 8 (per bit) 6
7 Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows TL F
8 Physical Dimeio inches (millimeters) 20-Lead Small Outline Integrated Circuit JEDEC SOIC (M) Order Number 244M 244MX T244M or T244MX NS Package Number M20B 20-Lead Small Outline Integrated Circuit-EIAJ SOIC (SJ) Order Number 244SJ 244SJX T244SJ or T244SJX NS Package Number M20D 8
9 Physical Dimeio millimeters 20-Lead Plastic EIAJ SSOP Type I (MSC) Order Number 244MSCX NS Package Number MSC20 20-Lead Plastic JEDEC TSSOP Type I (MTC) Order Number 244MTC 244MTCX T244MTC or T244MTCX NS Package Number MTC20 9
10 244 T244 Octal Buffer Line Driver with TRI-STATE Outputs Physical Dimeio (millimeters) (Continued) LIFE SUPPORT POLIC 20-Lead Molded DIP Order Number 244N or T244N NS Package Number N20A NATIONAL S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEICES OR SSTEMS WITHOUT THE EXPRESS WRITTEN APPROAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or 2 A critical component is any component of a life systems which (a) are intended for surgical implant support device or system whose failure to perform can into the body or (b) support or sustain life and whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system or to affect its safety or with itructio for use provided in the labeling can effectiveness be reasonably expected to result in a significant injury to the user National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd Japan Ltd 1111 West Bardin Road Fax (a49) th Floor Straight Block Tel Arlington TX cnjwge tevm2 c com Ocean Centre 5 Canton Rd Fax Tel 1(800) Deutsch Tel (a49) Tsimshatsui Kowloon Fax 1(800) English Tel (a49) Hong Kong Fran ais Tel (a49) Tel (852) Italiano Tel (a49) Fax (852) National does not assume any respoibility for use of any circuitry described no circuit patent licees are implied and National reserves the right at any time without notice to change said circuitry and specificatio
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74AC138 74ACT138 1-of-8 Decoder/Demultiplexer
1-of-8 Decoder/Demultiplexer General Description The AC/ACT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The
74VHC123A Dual Retriggerable Monostable Multivibrator
Dual Retriggerable Monostable Multivibrator General Description The VHC123A is an advanced high speed CMOS Monostable Multivibrator fabricated with silicon gate CMOS technology. It achieves the high speed
MM74HC00 Quad 2-Input NAND Gate
MM74HC00 Quad 2-Input NAND Gate General Description The MM74HC00 NAND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption
74VHC221A Dual Non-Retriggerable Monostable Multivibrator
April 1994 Revised May 1999 74VHC221A Dual Non-Retriggerable Monostable Multivibrator General Description The VHC221A is an advanced high speed CMOS Monostable Multivibrator fabricated with silicon gate
9312 DM9312 One of Eight Line Data Selectors Multiplexers
9312 DM9312 One of Eight Line Data Selectors Multiplexers General Description These data selectors multiplexers contain inverter drivers to supply full complementary on-chip binary decoded data selection
MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop
February 1990 Revised May 2005 MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop General Description The MM74HCT573 octal D-type latches and MM74HCT574 octal D-type flip-flop advanced
54LS352 DM74LS352 Dual 4-Line to 1-Line Data Selectors Multiplexers
54LS352 DM74LS352 Dual 4-Line to 1-Line Data Selectors Multiplexers General Description Each of these data selectors multiplexers contains inverters and drivers to supply fully complementary on-chip binary
MM74HC154 4-to-16 Line Decoder
4-to-16 Line Decoder General Description The MM74HC154 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications. It possesses high
CD4070BM CD4070BC Quad 2-Input EXCLUSIVE-OR Gate CD4077BM CD4077BC Quad 2-Input EXCLUSIVE-NOR Gate
CD4070BM CD4070BC Quad 2-Input EXCLUSIVE-OR Gate CD4077BM CD4077BC Quad 2-Input EXCLUSIVE-NOR Gate General Description Employing complementary MOS (CMOS) transistors to achieve wide power supply operating
CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate
CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate General Description These triple gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and
74LCX760 Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs
July 2001 74LCX760 Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs General Description The LCX760 is the Open Drain version of the LCX244. The LCX760 contains eight non-inverting
54153 DM54153 DM74153 Dual 4-Line to 1-Line Data Selectors Multiplexers
54153 DM54153 DM74153 Dual 4-Line to 1-Line Data Selectors Multiplexers General Description Each of these data selectors multiplexers contains inverters and drivers to supply fully complementary on-chip
74LCXH Low Voltage 16-Bit D-Type Flip-Flop with Bushold and 26Ω Series Resistors in Outputs
February 2001 Revised October 2001 74LCXH162374 Low oltage 16-Bit D-Type Flip-Flop with Bushold and 26Ω Series Resistors in Outputs General Description The LCXH162374 contains sixteen non-inverting D-type
74AC08 74ACT08 Quad 2-Input AND Gate
Quad 2-Input AND Gate General Description The AC/ACT08 contains four, 2-input AND gates. Ordering Code: Features I CC reduced by 50% on 74AC only Outputs source/sink 24 ma Device also available in Tape
74ACT Bit D-Type Flip-Flop with 3-STATE Outputs
74ACT18823 18-Bit D-Type Flip-Flop with 3-STATE Outputs General Description The ACT18823 contains eighteen non-inverting D-type flipflops with 3-STATE outputs and is intended for bus oriented applications.
93L34 8-Bit Addressable Latch
93L34 8-Bit Addressable Latch General Description The 93L34 is an 8-bit addressable latch designed for general purpose storage applications in digital systems It is a multifunctional device capable of
MM74HC32 Quad 2-Input OR Gate
Quad 2-Input OR Gate General Description The MM74HC32 OR gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard
MM74HC139 Dual 2-To-4 Line Decoder
MM74HC139 Dual 2-To-4 Line Decoder General Description The MM74HC139 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications.
74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
June 1998 Revised February 2001 74LCX112 Low oltage Dual J-K Negative Edge-Triggered Flip-Flop with 5 Tolerant Inputs General Description The LCX112 is a dual J-K flip-flop. Each flip-flop has independent
Features. Y Low power TTL Fan out of 2 driving 74L. Y 5V 10V 15V parametric ratings. Y Symmetrical output characteristics
CD4001BM CD4001BC Quad 2-Input NOR Buffered B Series Gate CD4011BM CD4011BC Quad 2-Input NAND Buffered B Series Gate General Description These quad gates are monolithic complementary MOS (CMOS) integrated
MM74HC08 Quad 2-Input AND Gate
Quad 2-Input AND Gate General Description The MM74HC08 AND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard
CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset
CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset General Description These dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-
MM74HC138 3-to-8 Line Decoder
3-to-8 Line Decoder General Description The MM74HC138 decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications. The circuit features
MM74HCT138 3-to-8 Line Decoder
3-to-8 Line Decoder General Description The MM74HCT138 decoder utilizes advanced silicon-gate CMOS technology, and are well suited to memory address decoding or data routing applications. Both circuits
Features. Y Wide supply voltage range 3V to 15V. Y High noise immunity 0 45 VDD (typ ) Y Low power TTL compatibility Fan out of 2
CD40192BM CD40192BC Synchronous 4-Bit Up Down Decade Counter CD40193BM CD40193BC Synchronous 4-Bit Up Down Binary Counter General Description These up down counters are monolithic complementary MOS (CMOS)