P-Channel Enhancement Mde Pwer Ms.FET Descriptin The prvide the designer with the best cmbinatin f fast switching, lw n-resistance and cst-effectiveness. The is universally preferred fr all cmmercial industrial surface munt applicatin and suited fr lw vltage applicatins such as DC/DC cnverters. Features S L Tp iew 1 G B D C J SC-59 Dim Min Max.70.10 B 1.40 1.60 C 1.00 1.0 D 0.5 0.50 G 1.70.10 H 0.00 0.10 J 0.10 0.6 * Super high dense cell design fr extremely lw RDS(ON) * Reliable and rugged pplicatins H Gate Drain Surce K D K 0.0 0.60 L 0.85 1.15 S.40.80 ll Dimensin in mm * Pwer Management in Ntebk Cmputer * Prtable Equipment * Battery Pwered System G Marking : 05 S bslute Maximum Ratings Parameter Symbl Ratings Unit Drain-Surce ltage DS -0 Gate-Surce ltage GS ±1 Cntinuus Drain Current ID@T=5 C -4. Cntinuus Drain Current ID@T=70 C -.4 Pulsed Drain Current IDM -10 Ttal Pwer Dissipatin PD@T=5 C 1.8 W Linear Derating Factr 0.01 W / C Operating Junctin and Strage Temperature Range Tj, Tstg -55~+150 C Thermal Data Parameter Symbl Ratings Unit Thermal Resistance Junctin-ambient Rthj-a 90 C /W
P-Channel Enhancement Mde Pwer Ms.FET Electrical Characteristics( Tj=5 C Unless therwise specified) Parameter Symbl Min. Typ. Max. Unit Test Cnditin Drain-Surce Breakdwn ltage BDSS -0 GS=0, ID=-50u Breakdwn ltage Temp. Cefficient BDS/ Tj -0.1 / Reference t 5 C,ID=-1m Gate Threshld ltage GS(th) -0.5 DS=GS, ID=-50u Gate-Surce Leakage Current IGSS ± 100 n GS= ±1 Drain-Surce Leakage Current (Tj=5 C) Drain-Surce Leakage Current (Tj=70 C) IDSS -1-10 u u DS=-0,GS=0 DS=-16,GS=0 0 5 GS=-4.5, ID=-4.0 Static Drain-Surce On-Resistance RDS(ON) 6 4 GS=-.5, ID=-4.0 m 46 55 GS=-1.8, ID=- 60 GS=-1.5, ID=-1 Ttal Gate Charge Gate-Surce Charge Gate-Drain ("Miller") Charge Qg Qgs Qgd 10.6..68 nc ID=-4. DS=-16 GS=-4.5 Turn-n Delay Time Rise Time Turn-ff Delay Time Fall Time Td(ON) Tr Td(Off) Tf 5.9.6.4.6 ns DS=-15 ID=-4. GS=-10 RG=6 RD=.6 Input Capacitance Output Capacitance Reverse Transfer Capacitance Ciss Css Crss 740 167 16 pf GS=0 DS=-15 f=1.0mhz Frward Transcnductance Gfs 9 S DS=-5, ID=-.8 Surce-Drain Dide Parameter Symbl Min. Typ. Max. Unit Test Cnditin Frward On ltage SD -1. IS=-1., GS=0. Reverse Recvery Time Trr Reverse Recvery Charge Qrr nc 7.7 ns Is=-4.,GS=0 dl/dt=100/us Ntes: 1.Pulse width limited by Max. junctin temperature..pulse width 00us, dutycycle %..Surface munted n 1 inch cpper pad f FR4 bard; 70 C/W when munted n min. cpper pad.
P-Channel Enhancement Mde Pwer Ms.FET Characteristics Curve
P-Channel Enhancement Mde Pwer Ms.FET
P-Channel Enhancement Mde Pwer Ms.FET Ordering Infrmatin: Device PN Packing T (1) G () WS Tape&Reel: Kpcs/Reel Nte: (1) Packing cde, Tape & Reel () RHS prduct fr packing cde suffix G ;Halgen free prduct fr packing cde suffix H ***Disclaimer*** WILLS reserves the right t make changes withut ntice t any prduct specificatin herein, t make crrectins, mdificatins, enhancements r ther changes. WILLS r anyne n its behalf assumes n respnsibility r liability fr any errrs r inaccuracies. Data sheet specificatins and its infrmatin cntained are intended t prvide a prduct descriptin nly. "Typical" parameters which may be included n WILLS data sheets and/ r specificatins can and d vary in different applicatins and actual perfrmance may vary ver time. WILLS des nt assume any liability arising ut f the applicatin r use f any prduct r circuit. WILLS prducts are nt designed, intended r authrized fr use in medical, life saving implant r ther applicatins intended fr life sustaining r ther related applicatins where a failure r malfunctin f cmpnent r circuitry may directly r indirectly cause injury r threaten a life withut expressed written apprval f WILLS. Custmers using r selling WILLS cmpnents fr use in such applicatins d s at their wn risk and shall agree t fully indemnify WILLS Inc and its subsidiaries harmless against all claims, damages and expenditures.