Max Q1. Symbol V GS I DM 15 I DSM 7.8 I AS E AS V SPIKE P D 2.5 P DSM. Junction and Storage Temperature Range T J, T STG

Similar documents
V DS I D (at V GS =10V) R DS(ON) (at V GS =4.5V) 100% UIS Tested 100% R g Tested. Top View. Symbol V

V DS I D (at V GS =10V) R DS(ON) (at V GS = 4.5V) 100% UIS Tested 100% R g Tested. Top View

V DS I D (at V GS =10V) R DS(ON) (at V GS = 4.5V) 100% UIS Tested 100% R g Tested. Top View. Symbol Drain-Source Voltage 30 Gate-Source Voltage V GS

V DS I D (at V GS =10V) R DS(ON) (at V GS = 4.5V) 100% UIS Tested 100% R g Tested. DFN 3.3x3.3 EP D. Top View

V DS I D (at V GS =10V) R DS(ON) (at V GS = 4.5V) 100% UIS Tested 100% R g Tested. Top View

V DS I D (at V GS =10V) R DS(ON) (at V GS =4.5V) 100% UIS Tested 100% R g Tested. Top View. Top View G PIN1

V DS I D (at V GS =10V) R DS(ON) (at V GS =4.5V) 100% UIS Tested 100% Rg Tested. Top View. Pin 1

V DS I D (at V GS =10V) R DS(ON) (at V GS =4.5V) 100% UIS Tested 100% Rg Tested. G Pin 1

V DS I D (at V GS =10V) R DS(ON) (at V GS = 4.5V) 100% UIS Tested 100% R g Tested. Top View

V DS I D (at V GS =10V) R DS(ON) (at V GS = 4.5V) 100% UIS Tested 100% R g Tested. Top View

AOD4184A 40V N-Channel MOSFET

AON V N-Channel SRFET

V DS. I D (at V GS =-4.5V) -40A R DS(ON) (at V GS =-1.8V) 100% UIS Tested 100% R g Tested. DFN 3x3_EP D

AON V Channel AlphaSGT TM

V DS I D (at V GS = -10V) -50A R DS(ON) (at V GS = -6V) 100% UIS Tested 100% R g Tested. Symbol V V GS. Gate-Source Voltage I DM I D A A

V DS I D (at V GS =10V) R DS(ON) (at V GS =4.5V) 100% UIS Tested 100% R g Tested G G S G

AONR V P-Channel MOSFET

AON6266E 60V N-Channel AlphaSGT TM

AOD466 N-Channel Enhancement Mode Field Effect Transistor

AON V Common-Drain Dual N-Channel MOSFET

AO4620 Complementary Enhancement Mode Field Effect Transistor

V DS I D (at V GS =10V) R DS(ON) (at V GS =10V) R DS(ON) (at V GS = 4.5V) 100% UIS Tested 100% R g Tested. Symbol

AO V Dual P + N-Channel MOSFET

AO V Dual N-Channel MOSFET

AOP606 Complementary Enhancement Mode Field Effect Transistor

AON V N-Channel MOSFET

AON4605 Complementary Enhancement Mode Field Effect Transistor

AOV11S60. V T j,max 700V 45A. The AOV11S60 has been fabricated using the advanced αmos TM high voltage process that is designed to deliver

AOT404 N-Channel Enhancement Mode Field Effect Transistor

AOP605 Complementary Enhancement Mode Field Effect Transistor

V DS I D (at V GS =10V) R DS(ON) (at V GS =4.5V) 100% UIS Tested 100% R g Tested. DFN 3x3 EP D. Top View

AO3411 P-Channel Enhancement Mode Field Effect Transistor

AO7401 P-Channel Enhancement Mode Field Effect Transistor

AO4802 Dual N-Channel Enhancement Mode Field Effect Transistor

V DS I D (at V GS =10V) R DS(ON) (at V GS = 4.5V) 100% UIS Tested 100% R g Tested. Top View S S S G. Symbol

AO4607, AO4607L(Lead-Free) Complementary Enhancement Mode Field Effect Transistor

AOD452 N-Channel Enhancement Mode Field Effect Transistor

AO V Dual N-Channel MOSFET

AOD444/AOI444 60V N-Channel MOSFET

500V N-Channel MOSFET

AOD452 N-Channel Enhancement Mode Field Effect Transistor

Features. Symbol Parameter Rating Units V DS Drain-Source Voltage 30 V V GS Gate-Source Voltage ±20 V

AON7404G 20V N-Channel MOSFET

V DS. 100% UIS Tested 100% R g Tested. Top View. Top View S2 G2

P-Channel Enhancement Mode Field Effect Transistor PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS

Top View. Top View S2 G2 S1 G1

Top View. Top View. V DS Gate-Source Voltage ±8 ±8 Continuous Drain Current Pulsed Drain Current C V GS I D -2.5 I DM P D 0.

V T j,max I DM. 100% UIS Tested 100% R g Tested TO251A IPAK AOI11S60

Features. Symbol Parameter Rating Units V DS Drain-Source Voltage 600 V V GS Gate-Source Voltage ±30 V

GP1M003A080H/ GP1M003A080F GP1M003A080HH/ GP1M003A080FH

M C C. Revision: A 2017/01/27 MCQ15N10Y SOP-8. Features Halogen free available upon request by adding suffix "-HF"

TSP10N60M / TSF10N60M

SSF7NS65UF 650V N-Channel MOSFET

V CE I C (T C =100 C) V CE(sat) (T C =25 C) 1.55V. Symbol V GE I C. 20 A 10 Forward Current T C =100 C 5 I FM. t SC P D T L.

V CE I C (T C =100 C) V CE(sat) (T C =25 C) 1.55V. Symbol V GE I C I CM I LM I F I FM. t SC P D T L. R θ JA

AO V P-Channel MOSFET

P-Channel Enhancement Mode Mosfet

N- & P-Channel Enhancement Mode Field Effect Transistor

SPECIFICATIONS (T J = 25 C, unless otherwise noted)

P-Channel Enhancement Mode Mosfet

TrenchT2 TM Power MOSFET

AO V Complementary Enhancement Mode Field Effect Transistor

SSF65R580F. Main Product Characteristics 700V. V J max. 0.52Ω (typ.) I D 8.0A TO-220F. Features and Benefits. Description

N-Channel ENHANCEMENT MODE POWER MOSFET 0V

Product Summary: BVDSS 30V RDSON (MAX.) 50mΩ 4.5A I D. Pb Free Lead Plating & Halogen Free EMB50P03J

N-Channel 30-V (D-S) MOSFET With Sense Terminal

TO-247-3L Inner Circuit Product Summary I C) R DS(on)

PPM3T60V2 P-Channel MOSFET

Complementary (N- and P-Channel) MOSFET

Product Summary: BVDSS RDSON (MAX.) D 60V 60mΩ 12A I D. UIS, Rg 100% Tested Pb Free Lead Plating & Halogen Free EMB60N06C

Shenzhen Tuofeng Semiconductor Technology Co., Ltd 4402A. N-Channel Enhancement Mode Field Effect Transistor. Features

APQ02SN60AA-XXJ0 APQ02SN60AB DEVICE SPECIFICATION. 600V/2A N-Channel MOSFET

Maximum Ratings Parameter Symbol Value Unit Continuous drain current T C = 25 C T C = 100 C

OptiMOS 3 M-Series Power-MOSFET

Maximum Ratings Parameter Symbol Value Unit Continuous drain current T C = 25 C T C = 100 C

OptiMOS 2 Power-Transistor

-3.3A -2.8A. Part Number Case Packaging DMC2057UVT-7 TSOT / Tape & Reel DMC2057UVT-13 TSOT / Tape & Reel

OptiMOS 2 Power-Transistor

TrenchT2 TM Power MOSFET

OptiMOS 3 M-Series Power-MOSFET

OptiMOS 2 Power-Transistor

Automotive N- and P-Channel 40 V (D-S) 175 C MOSFET

MDS9651 Complementary N-P Channel Trench MOSFET

OptiMOS 2 Power-Transistor

OptiMOS 2 Power-Transistor

SIPMOS Power-Transistor

OptiMOS (TM) 3 Power-Transistor

OptiMOS 3 Power-MOSFET

IXFH400N075T2 IXFT400N075T2

OptiMOS 2 Small-Signal-Transistor

OptiMOS 3 Power-Transistor

IXTH80N65X2 V DSS. X2-Class Power MOSFET = 650V I D25. = 80A 38m. R DS(on) N-Channel Enhancement Mode Avalanche Rated TO-247 G D S

OptiMOS P2 Small-Signal-Transistor

OptiMOS (TM) 3 Power-Transistor

OptiMOS 2 Power-Transistor

OptiMOS 3 Power-Transistor

OptiMOS 2 Power-Transistor

OptiMOS 3 Power-Transistor

TrenchMV TM Power MOSFET

OptiMOS 3 Power-Transistor

Transcription:

3V Dual Asymmetric N-Channel AlphaMOS General Description Latest Trench Power AlphaMOS (αmos LV) technology Very Low RDS(on) at 4.V GS Low Gate Charge High Current Capability RoHS and Halogen-Free Compliant Product Summary Q Q2 V DS 3V 3V I D (at V GS =V) 6A 8A R DS(ON) (at V GS =V) <.2mΩ <7.7mΩ R DS(ON) (at V GS = 4.V) <.8mΩ <.6mΩ % UIS Tested Application % Rg Tested DC/DC Converters in Computing, Servers, and POL Isolated DC/DC Converters in Telecom and Industrial Top View Power DFN3x3A Bottom View Top View Bottom View S2 G2 S2 S2 (S/D2) D D D D G Absolute Maximum Ratings T A =2 C unless otherwise noted Parameter Drain-Source Voltage Gate-Source Voltage V DS Spike Power Dissipation B Power Dissipation A ns T C =2 C Symbol V DS Continuous Drain T A =2 C 3 I DSM Current T A =7 C 7.8 9 V GS I DM I AS E AS V SPIKE P D P DSM Junction and Storage Temperature Range T J, T STG - to C ±2 Continuous Drain T C =2 C 6 I Current G D T C = C 2 Pulsed Drain Current C 64 Avalanche Current C Avalanche Energy L=.mH C 9 6 mj T C = C T A =2 C T A =7 C Max Q 9 3 Max Q2 ±2 8 72 2 36 36 23 9 2. 4 2 2..9.9 Units V V A A A V W W Thermal Characteristics Parameter Symbol Typ Q Max Q Typ Q2 Max Q2 Maximum Junction-to-Ambient A t s 4 4 R Maximum Junction-to-Ambient A D θja Steady-State 7 9 7 9 Maximum Junction-to-Case Steady-State R θjc 4..4 4.2 Units C/W C/W C/W Rev : April 22 www.aosmd.com Page of

Q Electrical Characteristics (T J =2 C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units STATIC PARAMETERS BV DSS Drain-Source Breakdown Voltage I D =2µA, V GS =V 3 V V DS =3V, V GS =V I DSS Zero Gate Voltage Drain Current µa T J = C I GSS Gate-Body leakage current V DS =V, V GS = ±2V na V GS(th) Gate Threshold Voltage V DS =V GS I D =2µA.2.8 2.2 V R DS(ON) Static Drain-Source On-Resistance V GS =V, I D =3A V GS =4.V, I D =A 8.3.2 T J =2 C.2 3.7 2.4.8 mω g FS Forward Transconductance V DS =V, I D =3A S V SD Diode Forward Voltage I S =A,V GS =V.7 V I S Maximum Body-Diode Continuous Current G 6 A DYNAMIC PARAMETERS C iss Input Capacitance 48 pf C oss Output Capacitance V GS =V, V DS =V, f=mhz 23 pf C rss Reverse Transfer Capacitance 32 pf R g Gate resistance V GS =V, V DS =V, f=mhz.9.8 2.7 Ω SWITCHING PARAMETERS Q g (V) Total Gate Charge 8 nc Q g (4.V) Total Gate Charge 3.9.3 nc V GS =V, V DS =V, I D =3A Q gs Gate Source Charge. nc Q gd Gate Drain Charge 2. nc t D(on) Turn-On DelayTime 3. ns t r Turn-On Rise Time V GS =V, V DS =V, R L =.2Ω, 2.8 ns t D(off) Turn-Off DelayTime R GEN =3ΩΩ 6.3 ns t f Turn-Off Fall Time 3 ns t rr Body Diode Reverse Recovery Time I F =3A, di/dt=a/µs 9.9 ns Q rr Body Diode Reverse Recovery Charge I F =3A, di/dt=a/µs 2.9 nc A. The value of R θja is measured with the device mounted on in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =2 C. The Power dissipation P DSM is based on R θja t s value and the maximum allowed junction temperature of C. The value in any given application depends on the user's specific board design. B. The power dissipation P D is based on T J(MAX) = C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature T J(MAX) = C. Ratings are based on low frequency and duty cycles to keep initial T J =2 C. D. The R θja is the sum of the thermal impedence from junction to case R θjc and case to ambient. E. The static characteristics in Figures to 6 are obtained using <3µs pulses, duty cycle.% max. F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of T J(MAX) = C. The SOA curve provides a single pulse rating. G. The maximum current rating is limited by package. H. These tests are performed with the device mounted on in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=2 C. mω COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev : April 22 www.aosmd.com Page 2 of

Q-CHANNEL: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS I D (A) 8 6 4 2 V 6V 8V 4.V 4V 3.V V GS =3V ID(A) 6 4 3 2 V DS =V 2 C 2 C 2 3 4 Fig : On-Region Characteristics (Note E) 2 3 4 Figure 2: Transfer Characteristics (Note E) R DS(ON) (mω) 2 V GS =4.V V GS =V Normalized On-Resistance.6.4.2 V GS =V I D =3A V GS =4.V I D =A 2 4 6 8 2 4 I D (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E).8 2 7 2 7 Temperature ( C) Figure 4: On-Resistance vs. Junction Temperature (Note E) 2.E+2 R DS(ON) (mω) 2 2 C I D =3A 2 C I S (A).E+ 4.E+.E-.E-2.E-3.E-4 2 C 2 C 2 4 6 8 Figure : On-Resistance vs. Gate-Source Voltage (Note E).E-..2.4.6.8..2.4 V SD (Volts) Figure 6: Body-Diode Characteristics (Note E) Rev : April 22 www.aosmd.com Page 3 of

Q-CHANNEL: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 8 6 4 2 V DS =V I D =3A Capacitance (pf) 7 6 4 3 2 C rss C iss C oss 2 4 6 8 Q g (nc) Figure 7: Gate-Charge Characteristics 2 2 3 Figure 8: Capacitance Characteristics. 2 I D (Amps)... R DS(ON) limited DC µs us ms Power (W) 6 2 8 T J(Max) = C T C =2 C. T J(Max) = C T C =2 C 4... Figure 9: Maximum Forward Biased Safe Operating Area (Note F).... Figure : Single Pulse Power Rating Junction-to- Case (Note F) Z θjc Normalized Transient Thermal Resistance.. D=T on /T T J,PK =T C +P DM.Z θjc.r θjc R θjc =.4 C/W Single Pulse In descending order D=.,.3,.,.,.2,., single pulse..... Figure : Normalized Maximum Transient Thermal Impedance (Note F) P D T on T Rev : April 22 www.aosmd.com Page 4 of

Q-CHANNEL: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 3 4 Power Dissipation (W) 2 2 Current rating ID(A) 3 2 2 7 2 T CASE ( C) Figure 2: Power De-rating (Note F) 2 7 2 T CASE ( C) Figure 3: Current De-rating (Note F) T A =2 C Power (W)... Figure 4: Single Pulse Power Rating Junction-to-Ambient (Note H) Z θja Normalized Transient Thermal Resistance... D=T on /T T J,PK =T A +P DM.Z θja.r θja R θja =9 C/W Single Pulse In descending order D=.,.3,.,.,.2,., single pulse..... Figure : Normalized Maximum Transient Thermal Impedance (Note H) 4 P D T on T Rev : April 22 www.aosmd.com Page of

Q2 Electrical Characteristics (T J =2 C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units STATIC PARAMETERS BV DSS Drain-Source Breakdown Voltage I D =2µA, V GS =V 3 V I DSS V DS =3V, V GS =V Zero Gate Voltage Drain Current µa T J = C I GSS Gate-Body leakage current V DS =V, V GS = ±2V na V GS(th) Gate Threshold Voltage V DS =V GS I D =2µA.2.8 2.2 V R DS(ON) Static Drain-Source On-Resistance V GS =V, I D =A V GS =4.V, I D =A 6.3 7.7 T J =2 C 8.4.3 9..6 mω g FS Forward Transconductance V DS =V, I D =A S V SD Diode Forward Voltage I S =A,V GS =V.7 V I S Maximum Body-Diode Continuous Current G 8 A DYNAMIC PARAMETERS C iss Input Capacitance 87 pf C oss Output Capacitance V GS =V, V DS =V, f=mhz 34 pf C rss Reverse Transfer Capacitance 4 pf R g Gate resistance V GS =V, V DS =V, f=mhz.6.3 2 Ω SWITCHING PARAMETERS Q g (V) Total Gate Charge 2.9 7. nc Q g (4.V) Total Gate Charge 6 8. nc V GS =V, V DS =V, I D =A Q gs Gate Source Charge 2. nc Q gd Gate Drain Charge 3 nc t D(on) Turn-On DelayTime 4.8 ns t r Turn-On Rise Time V GS =V, V DS =V, R L =Ω, 3.3 ns t D(off) Turn-Off DelayTime R GEN =3ΩΩ 8.8 ns t f Turn-Off Fall Time 3.3 ns t rr Body Diode Reverse Recovery Time I F =A, di/dt=a/µs.3 ns Q rr Body Diode Reverse Recovery Charge I F =A, di/dt=a/µs nc A. The value of R θja is measured with the device mounted on in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =2 C. The Power dissipation P DSM is based on R θja t s value and the maximum allowed junction temperature of C. The value in any given application depends on the user's specific board design. B. The power dissipation P D is based on T J(MAX) = C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature T J(MAX) = C. Ratings are based on low frequency and duty cycles to keep initial T J =2 C. D. The R θja is the sum of the thermal impedence from junction to case R θjc and case to ambient. E. The static characteristics in Figures to 6 are obtained using <3µs pulses, duty cycle.% max. F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of T J(MAX) = C. The SOA curve provides a single pulse rating. G. These tests are performed with the device mounted on in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =2 C. mω COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev : April 22 www.aosmd.com Page 6 of

Q2-CHANNEL: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 8 V 8V V 4.V 6 V DS =V I D (A) 6 4 4V ID(A) 4 3 2 2 C 2 C 2 =3V 2 3 4 Fig : On-Region Characteristics (Note E) 2 3 4 Figure 2: Transfer Characteristics (Note E) R DS(ON) (mω) 9 8 7 6 V GS =4.V V GS =V Normalized On-Resistance.6.4.2 V GS =V I D =A 7 V GS =4.V 2 I D =A 4 3 6 9 2 I D (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E).8 2 7 2 7 Temperature ( C) Figure 4: On-Resistance vs. Junction 8Temperature (Note E) 2 I D =A.E+2.E+ 4 2 C R DS(ON) (mω) 2 C I S (A).E+.E- 2 C 2 C.E-2 2 4 6 8 Figure : On-Resistance vs. Gate-Source Voltage (Note E).E-3..2.4.6.8..2 V SD (Volts) Figure 6: Body-Diode Characteristics (Note E) Rev : April 22 www.aosmd.com Page 7 of

Q2-CHANNEL: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 8 V DS =V I D =A 2 C iss 6 4 Capacitance (pf) 8 6 4 C oss 2 2 C rss 3 6 9 2 Q g (nc) Figure 7: Gate-Charge Characteristics 2 2 3 Figure 8: Capacitance Characteristics I D (Amps).... R DS(ON) limited DC µs µs ms Power (W) 2 6 2 8 T J(Max) = C T C =2 C. T J(Max) = C T C =2 C 4... Figure 9: Maximum Forward Biased Safe Operating Area (Note F).... Figure : Single Pulse Power Rating Junction-to- Case (Note F) Z θjc Normalized Transient Thermal Resistance. D=T on /T T J,PK =T C +P DM.Z θjc.r θjc R θjc = C/W Single Pulse In descending order D=.,.3,.,.,.2,., single pulse 4 P D T on T...... Figure : Normalized Maximum Transient Thermal Impedance (Note F) Rev : April 22 www.aosmd.com Page 8 of

Q2-CHANNEL: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS Power Dissipation (W) 3 2 2 Current rating I D (A) 4 3 2 2 7 2 T CASE ( C) Figure 2: Power De-rating (Note F) 2 7 2 T CASE ( C) Figure 3: Current De-rating (Note F) Power (W) T A =2 C... Figure 4: Single Pulse Power Rating Junction-to-Ambient (Note G) Z θja Normalized Transient Thermal Resistance... D=T on /T T J,PK =T A +P DM.Z θja.r θja R θja =9 C/W Single Pulse In descending order D=.,.3,.,.,.2,., single pulse.... Figure : Normalized Maximum Transient Thermal Impedance (Note G) 4 P D T on T Rev : April 22 www.aosmd.com Page 9 of

Gate Charge Test Circuit & Waveform Qg VDC + - DUT VDC + - V Qgs Qgd Ig RL Resistive Switching Test Circuit & Waveforms Charge Rg DUT VDC + - Vdd 9% % td(on) t r t d(off) t f t on t off Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L 2 E = /2 LI AR AR BV DSS Id Rg VDC + - Vdd Id I AR DUT Diode Recovery Test Circuit & Waveforms + DUT Q = - Idt rr - Ig Isd L VDC + - Vdd Isd I F di/dt I RM t rr Vdd Rev : April 22 www.aosmd.com Page of