TNL/4L, VNL/LS N-Channel -, -, 4-V (D-S) MOSFETs Part Number V (BR)DSS Min (V) r DS(on) Max ( ) V GS(th) (V) I D (A) TNL. @ V GS = V.5 to.64 TN4L 4. @ V GS = V.5 to.64 VNL. @ V GS = V.8 to.5.64 VNLS. @ V GS = V.8 to.5.67 Low On-Resistance:.85 Low Threshold:.4 V Low Input Capacitance: 8 pf Fast Switching Speed: 9 ns Low Input and Output Leakage Low Offset Voltage Low-Voltage Operation Easily Driven Without Buffer High-Speed Circuits Low Error Voltage Direct Logic-Level Interface: TTL/CMOS Drivers: Relays, Solenoids, Lamps, Hammers, Displays, Memories, Transistors, etc. Battery Operated Systems Solid-State Relays S G D TO-6AA (TO-9) Top View TNL TN4L VNL Device Marking Front View TNL S TN L TN4L S TN 4L VNL S VN L S = Siliconix Logo = Date Code TO-9S (Copper Lead Frame) S G D Top View VNLS Device Marking Front View VNLS S VN LS S = Siliconix Logo = Date Code Parameter Symbol TNL TN4L VNL VNLS Unit Drain-Source Voltage V DS 4 Gate-Source Voltage V GS T A = 5 C.64.64.64.67 Continuous Drain Current I (T J = 5 C) D T A = C.8.8.8.4 A Pulsed Drain Current a I DM.5.5 Power Dissipation T A = 5 C.8.8.8.9 T A = C P D....4 Thermal Resistance, Junction-to-Ambient R thja 56 56 56 56 C/W Operating Junction and Storage Temperature Range T J, T stg 55 to 5 C Notes a. Pulse width limited by maximum junction temperature. V W Document Number: 799 S-479 Rev. E, 6-Jul- -
TNL/4L, VNL/LS Limits TNL TN4L VNL VNLS Parameter Symbol Test Conditions Typ a Min Max Min Max Unit Static V Drain-Source Breakdown Voltage V GS = V (BR)DSS I D = A TNL 55 TN4L 55 4 V V DS = V GS, I D =.5 ma.4.5 Gate-Threshold Voltage V GS(th) V DS = V GS, I D = ma.5.8.5 V DS = V, V GS = V Gate-Body Leakage I GSS V DS = V, V GS = V na V DS = V, V GS = V T J = 5 C 5 Zero Gate Voltage Drain Current I DSS V DS =.8 x V (BR)DSS, V GS = V A T J = 5 C V DS = V, V GS = 4.5 V.9.5 On-State Drain Current b I D(on) V DS = V, V GS = V.5 A V GS =.5 V, I D =.5 A.8 4 V GS = 5 V, I D =. A.. V GS = 4.5 V, I D =.5 A.4 Drain-Source On-Resistance b r DS(on) T J = 5 C.6 4 V GS = V, I D = A.85.. T J = 5 C.6.4 Forward Transconductance b g fs V DS = V, I D =.5 A 5 ms Dynamic Input Capacitance C iss 8 6 Output Capacitance C oss V DS = 5 V, V GS = V, f = MHz 5 95 pf Reverse Transfer Capacitance C rss 8 5 5 Switching c Turn-On Time t ON V DD = 5 V, R L = 4 I D A, V GEN = V Turn-Off Time t OFF R G = 5 ns Notes a. For DESIGN AID ONLY, not subject to production testing.. VNDQ b. Pulse test: PW s duty cycle %. c. Switching time is essentially independent of operating temperature. - Document Number: 799 S-479 Rev. E, 6-Jul-
TNL/4L, VNL/LS. V GS = V Ohmic Region Characteristics 7 V 6 V Output Characteristics for Low Gate Drive V.9 V.6 6.7 V..8 5 V 4 V 8.5 V. V.4 V 4. V V 4 5.7 V.4.8..6. 5 Transfer Characteristics On-Resistance vs. Gate-to-Source Voltage 4 V DS = 5 V 5 C T J = 55 C 5 C r DS(on) On-Resistance ( Ω ) I D =. A.5 A. A 4 5 4 8 6 V GS Gate-Source Voltage (V) V GS Gate-Source Voltage (V).5 On-Resistance vs. Drain Current.5 Normalized On-Resistance vs. Junction Temperature r DS(on) Drain-Source On-Resistance ( Ω )..5..5 V GS = 4.5 V 6 V V r DS(on) Drain-Source On-Resistance ( Ω ) (Normalized)..75.5.5..75.5 V GS = V I D =.5 A. A 5 7 5 T J Junction Temperature ( C) Document Number: 799 S-479 Rev. E, 6-Jul- -
TNL/4L, VNL/LS V DS = V T J = 5 C Threshold Region V GS = V f = MHz Capacitance. C 5 C C Capacitance (pf) 8 6 4 C iss C oss 55 C..6.8...4.6.8. V GS Gate-to-Source Voltage (V) C rss 4 5 V GS Gate-to-Source Voltage (V) 6 5 4 I D = A Gate Charge V DS = 5 V 4 V t Switching Time (ns) Load Condition Effects on Switching V DD = 5 V R G = 5 V GS = to V t d(on) t r t d(off) t f 8 6 4 4 Q g Total Gate Charge (pc). Normalized Effective Transient Thermal Impedance, Junction-to-Ambient (TO-6AA) Duty Cycle =.5 Normalized Effective Transient Thermal Impedance....5.. Single Pulse...5 5 5 5 K 5 K t Square Wave Pulse Duration (sec) Notes: P DM t t t. Duty Cycle, D = t. Per Unit Base = R thja = 56 C/W. T JM T A = P DM Z (t) thja K -4 Document Number: 799 S-479 Rev. E, 6-Jul-
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