LC 2 MOS Precision Analog Switch in MSOP ADG419-EP

Similar documents
Low Capacitance, Low Charge Injection, ±15 V/+12 V icmos Quad SPST Switches ADG1212-EP

High Voltage, Latch-Up Proof, 4-Channel Multiplexer ADG5204

1 pc Charge Injection, 100 pa Leakage CMOS 5 V/5 V/3 V 4-Channel Multiplexer ADG604

CMOS ±5 V/+5 V/+3 V Triple SPDT Switch ADG633

onlinecomponents.com

CMOS, +1.8 V to +5.5 V/ 2.5 V, 2.5 Low-Voltage, 8-/16-Channel Multiplexers ADG706/ADG707 REV. A

LC2 MOS 4-/8-Channel High Performance Analog Multiplexers ADG408/ADG409

Low Voltage 400 MHz Quad 2:1 Mux with 3 ns Switching Time ADG774A

AG726/AG732 SPECIFICATIONS ( = V %, = V, GN = V, unless otherwise noted.) B Version 4 C Parameter +2 C to +8 C Unit Test Conditions/Comments ANALOG SW

1 pc Charge Injection, 100 pa Leakage, CMOS 5 V/+5 V/+3 V Quad SPST Switches ADG611/ADG612/ADG613

Low Voltage 2-1 Mux, Level Translator ADG3232

DG2707. High Speed, Low Voltage, 3, Differential 4:1 CMOS Analog Multiplexer/Switch. Vishay Siliconix FEATURES DESCRIPTION APPLICATIONS

I2 C Compatible Digital Potentiometers AD5241/AD5242

Precision 8-Ch/Dual 4-Ch Low Voltage Analog Multiplexers

Low-Voltage Single SPDT Analog Switch

DG211. Features. SPST 4-Channel Analog Switch. Part Number Information. Functional Block Diagrams. Pinout. Data Sheet December 21, 2005 FN3118.

MAX14753 V DD INA0 INA1 INA2 INA3 OUT INB0 INB1 INB2 INB3

High Speed Quad SPST CMOS Analog Switch

2Ω, Quad, SPST, CMOS Analog Switches

Features. Functional Diagrams, Pin Configurations, and Truth Tables

Low-Voltage Single SPDT Analog Switch

MAX4638/MAX Ω, Single 8:1 and Dual 4:1, Low-Voltage Analog Multiplexers

Powered-off Protection, 1, 1.8 V to 5.5 V, SPDT Analog Switch (2:1 Multiplexer)

LOW HIGH OFF ON. Maxim Integrated Products 1

COM COM GND MAX4644 OFF OFF

Monolithic CMOS Analog Multiplexers

DLA LAND AND MARITIME COLUMBUS, OHIO TITLE MICROCIRCUIT, LINEAR, CMOS SPDT SWITCH, MONOLITHIC SILICON REVISIONS

74HC General description. 2. Features. Octal D-type flip-flop; positive-edge trigger; 3-state; inverting

Powered-off Protection, 6, 1.8 V to 5.5 V, SPDT Analog Switch (2:1 Multiplexer)

Improved, Dual, High-Speed Analog Switches

Low-Leakage, CMOS Analog Multiplexers

8-Ch/Dual 4-Ch High-Performance CMOS Analog Multiplexers

Precision, 8-Channel/Dual 4-Channel, High-Performance, CMOS Analog Multiplexers

P-Channel 30 V (D-S) MOSFET

DG417/418/419. Precision CMOS Analog Switches. Features Benefits Applications. Description. Functional Block Diagram and Pin Configuration

Low-Power, High-Speed CMOS Analog Switches

P-Channel 20 V (D-S) MOSFET

PMV65XP. 1. Product profile. 2. Pinning information. P-channel TrenchMOS extremely low level FET. 1.1 General description. 1.

3.2, Fast Switching Speed, +12 V / +5 V / +3 V / ± 5 V, 4- / 8-Channel Analog Multiplexers

SGM48753 CMOS Analog Switch

Quad SPST CMOS Analog Switch

Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows:

Precision, Quad, SPDT, CMOS Analog Switch

2N7002T. 1. Product profile. 2. Pinning information. N-channel TrenchMOS FET. 1.1 General description. 1.2 Features. 1.

NC7SB3157 TinyLogic Low Voltage UHS Analog Switch 2-Channel Multiplexer/Demultiplexer (Preliminary)

Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog Multiplexers

DG411CY. Pin Configurations/Functional Diagrams/Truth Tables IN2 DG412 IN3 DIP/SO/TSSOP DG412 LOGIC SWITCH OFF SWITCHES SHOWN FOR LOGIC 0 INPUT

PS381/PS383/PS385. Precision, 17V Analog Switches. Features. Applications. Functional Diagrams, Pin Configurations, and Truth Tables

74HC1GU04GV. 1. General description. 2. Features. 3. Ordering information. Marking. 5. Functional diagram. Inverter

TrenchMOS technology Very fast switching Logic level compatible Subminiature surface mount package.

PMV56XN. 1. Product profile. 2. Pinning information. µtrenchmos extremely low level FET. 1.1 Description. 1.2 Features. 1.

Improved Quad CMOS Analog Switches

Precision CMOS Analog Switches

PMWD16UN. 1. Product profile. 2. Pinning information. Dual N-channel µtrenchmos ultra low level FET. 1.1 General description. 1.

PMV40UN. 1. Product profile. 2. Pinning information. TrenchMOS ultra low level FET. 1.1 Description. 1.2 Features. 1.

Low Drift, Low Power Instrumentation Amplifier AD621

Dual 3-channel analog multiplexer/demultiplexer with supplementary switches

2N7002F. 1. Product profile. 2. Pinning information. N-channel TrenchMOS FET. 1.1 General description. 1.2 Features. 1.

N-Channel 30 V (D-S) MOSFET

N-channel enhancement mode Field-Effect Transistor (FET) in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package using

PMN40LN. 1. Description. 2. Features. 3. Applications. 4. Pinning information. TrenchMOS logic level FET

Device Type Generic Number Circuit Function 01 DG406A(x)/883B 16-Channel Analog Multiplexer 02 DG407A(x)/883B Dual 8-Channel Analog Multiplexer

N-Channel 8 V (D-S) MOSFET

ON OFF PART. Pin Configurations/Functional Diagrams/Truth Tables 5 V+ LOGIC

N-channel µtrenchmos ultra low level FET. Top view MBK090 SOT416 (SC-75)

CA3086. General Purpose NPN Transistor Array. Applications. Pinout. Ordering Information. Data Sheet August 2003 FN483.5

NDS9953A Dual P-Channel Enhancement Mode Field Effect Transistor

74AHC373; 74AHCT373. Octal D-type transparant latch; 3-state

PART TOP VIEW. Maxim Integrated Products 1

2-input AND gate with open-drain output. The 74AHC1G09 is a high-speed Si-gate CMOS device.

Temperature range Name Description Version XC7SET32GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.

N-Channel 150 V (D-S) MOSFET

Octal D-type transparent latch; 3-state

Features A, -25 V. R DS(ON) Symbol Parameter Ratings Units

N-Channel 20 V (D-S) MOSFET

TrenchMOS ultra low level FET

PSMN006-20K. N-channel TrenchMOS SiliconMAX ultra low level FET

2-input EXCLUSIVE-OR gate

TC74VHCT573AF,TC74VHCT573AFW,TC74VHCT573AFT

BUK9Y53-100B. N-channel TrenchMOS logic level FET. Table 1. Pinning Pin Description Simplified outline Symbol 1, 2, 3 source (S) 4 gate (G)

PHD/PHP36N03LT. 1. Product profile. 2. Pinning information. N-channel TrenchMOS logic level FET. 1.1 General description. 1.

NDS8947 Dual P-Channel Enhancement Mode Field Effect Transistor

µtrenchmos standard level FET Low on-state resistance in a small surface mount package. DC-to-DC primary side switching.

74HC1G02; 74HCT1G02. The standard output currents are half those of the 74HC02 and 74HCT02.

P-Channel 8 V (D-S) MOSFET

PHT6N06T. 1. Product profile. 2. Pinning information. TrenchMOS standard level FET. 1.1 Description. 1.2 Features. 1.

Description. For Fairchild s definition of Eco Status, please visit:

IRFR Description. 2. Features. 3. Applications. 4. Pinning information. N-channel enhancement mode field effect transistor

74HC1G86; 74HCT1G86. 2-input EXCLUSIVE-OR gate. The standard output currents are half those of the 74HC/HCT86.

8-channel analog multiplexer/demultiplexer. For operation as a digital multiplexer/demultiplexer, V EE is connected to V SS (typically ground).

Improved, SPST/SPDT Analog Switches

N-channel TrenchMOS logic level FET

SHM-14 Ultra-Fast, 14-Bit Linear Monolithic Sample-Hold Amplifiers

N-Channel 20 V (D-S) MOSFET

IN1 IN2 DG412 GND IN3 IN4 DIP/SO/TSSOP DG412 LOGIC SWITCH OFF SWITCHES SHOWN FOR LOGIC 0 INPUT

High Performance Driver/Comparator, Active Load on a Single Chip AD53509

APQ02SN60AA-XXJ0 APQ02SN60AB DEVICE SPECIFICATION. 600V/2A N-Channel MOSFET

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

60 V, 0.3 A N-channel Trench MOSFET

N-Channel 30 V (D-S) MOSFET

Transcription:

LC 2 MOS Precision Analog Switch in MSOP AG49-EP FEATURES 44 V supply maximum ratings VSS to V analog signal range Low on resistance: <35 Ω Ultralow power dissipation: <35 μw Fast transition time: 45 ns maximum Break-before-make switching action Plug-in replacement for G49 Supports defense and aerospace applications (AQEC standard) Military temperature range: 55 C to +25 C Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request APPLICATIONS Precision test equipment Precision instrumentation Battery-powered systems Sample-and-hold systems GENERAL ESCRIPTION The AG49-EP is a monolithic CMOS SPT switch. This switch is fabricated on an enhanced LC 2 MOS process that provides low power dissipation yet gives high switching speed, low on resistance, and low leakage current. The on resistance profile of the AG49-EP is very flat over the full analog input range, ensuring excellent linearity and low distortion. The part also exhibits high switching speed and high signal bandwidth. CMOS construction ensures ultralow power dissipation, making the part ideally suited for portable and battery-powered instruments. Each switch of the AG49-EP conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. The AG49-EP exhibits break-before-make switching action. Full details about this enhanced product are available in the AG49 data sheet, which should be consulted in conjunction with this data sheet. FUNCTIONAL BLOCK IAGRAM S AG49-EP SWITCH SHOWN FOR A LOGIC INPUT. Figure. PROUCT HIGHLIGHTS. Extended Signal Range. The AG49-EP is fabricated on an enhanced LC 2 MOS process, giving an increased signal range that extends to the supply rails. 2. Ultralow Power issipation. 3. Low RON. 4. Single-Supply Operation. For applications where the analog signal is unipolar, the AG49-EP can be operated from a single rail power supply. The part is fully specified with a single 2 V power supply and remains functional with single supplies as low as 5 V. S2 IN 08846-00 Rev. 0 Information furnished by Analog evices is believed to be accurate and reliable. However, no responsibility is assumed by Analog evices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog evices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 906, Norwood, MA 02062-906, U.S.A. Tel: 78.329.4700 www.analog.com Fax: 78.46.33 200 Analog evices, Inc. All rights reserved.

TABLE OF CONTENTS Features... Applications... Functional Block iagram... General escription... Product Highlights... Revision History... 2 Specifications... 3 ual Supply... 3 Single Supply...4 Absolute Maximum Ratings...5 ES Caution...5 Pin Configuration and Function escriptions...6 Typical Performance Characteristics...7 Test Circuits...8 Outline imensions... 0 Ordering Guide... 0 REVISION HISTORY 7/0 Revision 0: Initial Version Rev. 0 Page 2 of 2

SPECIFICATIONS UAL SUPPLY V = 5 V ± 0%, VSS = 5 V ± 0%, VL = 5 V ± 0%, GN = 0 V, unless otherwise noted. Table. Parameter +25 C 40 C to +85 C 55 C to +25 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range VSS to V V RON 25 Ω typ V = ±2.5 V, IS = 0 ma; see Figure 9 35 45 45 Ω max V = +3.5 V, VSS = 3.5 V; see Figure 9 LEAKAGE CURRENT V = +6.5 V, VSS = 6.5 V Source Off Leakage, IS (Off) ±0. na typ V = ±5.5 V, VS = 5.5 V; see Figure 0 ±0.25 ±5 ±5 na max rain Off Leakage, I (Off) ±0. na typ V = ±5.5 V, VS = 5.5 V; see Figure 0 ±0.75 ±5 ±30 na max Channel On Leakage, I, IS (On) ±0.4 na typ VS = V = ±5.5 V; see Figure ±0.75 ±5 ±30 na max IGITAL INPUTS Input High Voltage, VINH 2.4 2.4 V min Input Low Voltage, VINL 0.8 0.8 V max Input Current, IINL or IINH ±0.005 ±0.005 μa typ VIN = VINL or VINH ±0.5 ±0.5 μa max YNAMIC CHARACTERISTICS ttransition 45 200 200 ns max RL = 300 Ω, CL = 35 pf; VS = ±0 V, VS2 = 0 V; see Figure 2 Break-Before-Make Time elay, t 30 ns typ RL = 300 Ω, CL = 35 pf; VS = VS2 = ±0 V; see Figure 3 5 ns min Off Isolation 80 db typ RL = 50 Ω, f = MHz; see Figure 4 Channel-to-Channel Crosstalk 90 db typ RL = 50 Ω, f = MHz; see Figure 5 CS (Off) 6 pf typ f = MHz C, CS (On) 55 pf typ f = MHz POWER REQUIREMENTS V = +6.5 V, VSS = 6.5 V I 0.000 μa typ VIN = 0 V or 5 V 2.5 2.5 μa max ISS 0.000 μa typ 2.5 2.5 μa max IL 0.000 μa typ VL = 5.5 V 2.5 2.5 μa max Guaranteed by design; not subject to production test. Rev. 0 Page 3 of 2

SINGLE SUPPLY V = 2 V ± 0%, VSS = 0 V, VL = 5 V ± 0%, GN = 0 V, unless otherwise noted. Table 2. Parameter +25 C 40 C to +85 C 55 C to +25 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range 0 to V V RON 40 Ω typ V = 3 V, 8.5 V, IS = 0 ma; see Figure 9 60 70 Ω max V = 0.8 V; see Figure 9 LEAKAGE CURRENT V = 3.2 V Source Off Leakage, IS (Off) ±0. na typ V = 2.2 V/ V, VS = V/2.2 V; see Figure 0 ±0.25 ±5 ±5 na max rain Off Leakage, I (Off) ±0. na typ V = 2.2 V/ V, VS = V/2.2 V; see Figure 0 ±0.75 ±5 ±30 na max Channel On Leakage, I, IS (On) ±0.4 na typ VS = V = 2.2 V/ V; see Figure ±0.75 ±5 ±30 na max IGITAL INPUTS Input High Voltage, VINH 2.4 2.4 V min Input Low Voltage, VINL 0.8 0.8 V max Input Current, IINL or IINH ±0.005 ±0.005 μa typ VIN = VINL or VINH ±0.5 ±0.5 μa max YNAMIC CHARACTERISTICS ttransition 70 250 250 ns max RL = 300 Ω, CL = 35 pf; VS = 0 V/8 V, VS2 = 8 V/0 V; see Figure 2 Break-Before-Make Time elay, t 60 ns typ RL = 300 Ω, CL = 35 pf; VS = VS2 = 8 V; see Figure 3 Off Isolation 80 db typ RL = 50 Ω, f = MHz; see Figure 4 Channel-to-Channel Crosstalk 70 db typ RL = 50 Ω, f = MHz; see Figure 5 CS (Off) 3 pf typ f = MHz C, CS (On) 65 pf typ f = MHz POWER REQUIREMENTS V = 3.2 V I 0.000 μa typ VIN = 0 V or 5 V 2.5 2.5 μa max IL 0.000 μa typ VL = 5.5 V 2.5 2.5 μa max Guaranteed by design; not subject to production test. Rev. 0 Page 4 of 2

ABSOLUTE MAXIMUM RATINGS TA= 25 C, unless otherwise noted. Table 3. Parameter Rating V to VSS 44 V V to GN 0.3 V to +25 V VSS to GN +0.3 V to 25 V VL to GN 0.3 V to V + 0.3 V Analog, igital Inputs VSS 2 V to V + 2 V or 30 ma, whichever occurs first Continuous Current, Sx or 30 ma Peak Current, Sx or (Pulsed at ms, 00 ma 0% uty Cycle Maximum) Operating Temperature Range 55 C to +25 C Storage Temperature Range 65 C to +50 C Junction Temperature 50 C Power issipation (MSOP) 35 mw Thermal Impedance, θja 205 C/W Lead Temperature, Soldering As per JEEC J-ST-020 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one maximum rating may be applied at any one time. ES CAUTION Overvoltages at IN, Sx, or are clamped by internal diodes. Limit current to the maximum ratings given. Rev. 0 Page 5 of 2

PIN CONFIGURATION AN FUNCTION ESCRIPTIONS S GN V 2 3 4 AG49-EP TOP VIEW (Not to Scale) 8 S2 7 V SS 6 IN 5 V L Figure 2. Pin Configuration 08846-002 Table 4. Pin Function escriptions Pin No. Mnemonic escription rain Terminal. Can be an input or an output. 2 S Source Terminal. Can be an input or an output. 3 GN Ground Reference (0 V). 4 V Most Positive Power Supply Potential. 5 VL Logic Power Supply (5 V). 6 IN Logic Control Input. 7 VSS Most Negative Power Supply Potential in ual-supply Applications. In single-supply applications, this pin can be connected to GN. 8 S2 Source Terminal. Can be an input or an output. Table 5. Truth Table Logic Switch Switch 2 0 On Off Off On Rev. 0 Page 6 of 2

TYPICAL PERFORMANCE CHARACTERISTICS 50 40 T A = 25 C V = +5V V SS = 5V 00 80 T A = 25 C V = 5V V SS = 0V R ON (Ω) 30 20 V = +0V V SS = 0V R ON (Ω) 60 40 V = 0V V SS = 0V V = 2V V SS = 0V 0 V = +2V V SS = 2V 0 5 0 5 0 5 0 5 V S, V (V) V = +5V V SS = 5V Figure 3. RON as a Function of V (VS), ual-supply Voltage 08846-003 20 V = 5V V SS = 0V 0 0 5 0 5 V S, V (V) Figure 6. RON as a Function of V (VS), Single-Supply Voltage 08846-006 45 40 35 V = +5V V SS = 5V GN = 0V V L = +5V 70 60 V = 2V V SS = 0V GN = 0V V L = 5V R ON (Ω) 30 25 T A = +25 C T A = +85 C R ON (Ω) 50 40 T A = +25 C T A = +85 C 20 T A = +25 C 30 T A = +25 C 5 0 T A = 40 C T A = 55 C 20 T A = 40 C T A = 55 C 5 5 0 5 0 5 0 5 V S, V (V) Figure 4. RON as a Function of V (VS) for ifferent Temperatures, ual-supply Voltage 08846-004 0 0 2 4 6 8 0 2 V S, V (V) Figure 7. RON as a Function of V (VS) for ifferent Temperatures, Single-Supply Voltage 08846-007 LEAKAGE CURRENT (na) 0 9 8 7 6 5 4 3 2 0 2 3 0 V = +6.5V V SS = 6.5V GN = 0V +, : V = +5.5V/V S = 5.5V, +: V = 5.5V/V S = +5.5V +, +: V = +5.5V/V S = +5.5V, : V = 5.5V/V S = 5.5V I S (OFF) +, I, I S (ON) +, + I (OFF), + I, I S (ON), 5 0 5 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 00 05 0 5 20 25 TEMPERATURE ( C) Figure 5. Leakage Current vs. Temperature, ual-supply Voltage 08846-07 LEAKAGE CURRENT (na) 6 5 4 3 2 0 0 V = 3.2V V SS = 0V GN = 0V +, : V = 2.2V/V S = V, +: V = V/V S = 2.2V +, +: V = 2.2V/V S = 2.2V, : V = V/V S = V I, I S (ON) +, + I S (OFF) +, I, I S (ON), I S (OFF), + 5 0 5 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 00 05 0 5 20 25 TEMPERATURE ( C) Figure 8. Leakage Current vs. Temperature, Single-Supply Voltage 08846-08 Rev. 0 Page 7 of 2

TEST CIRCUITS I S V I S (OFF) A S I (OFF) A S I (ON) A V S S R ON = V /I S 08846-0 V S V 08846-02 V S V 08846-03 Figure 9. On Resistance Figure 0. Off Leakage Figure. On Leakage +5V +5V 3V V V L V IN 50% 50% S V S V OUT t TRANSITION t TRANSITION 0V V S2 V IN S2 IN GN V SS 5V R L 300Ω C L 35pF V OUT 90% 90% 08846-04 Figure 2. Transition Time, ttransition +5V +5V V S V S2 V IN S S2 IN V GN V L V SS R L 300Ω C L 35pF V OUT 3V ARESS RIVE (V IN ) 0V t t V OUT 90% 90% 90% 90% 5V 08846-05 Figure 3. Break-Before-Make Time elay, t Rev. 0 Page 8 of 2

0.µF +5V +5V 0.µF +5V +5V 0.µF 0.µF V V L S S V V L V OUT V S R S 50Ω V S V IN IN GN V SS R L 50Ω V OUT R L 50Ω S2 GN IN V SS V IN 0.µF 5V 08846-06 0.µF 5V CHANNEL-TO-CHANNEL CROSSTALK = 20 log V S /V OUT 08846-07 Figure 4. Off Isolation Figure 5. Crosstalk Rev. 0 Page 9 of 2

OUTLINE IMENSIONS 3.20 3.00 2.80 3.20 3.00 2.80 8 5 4 5.5 4.90 4.65 PIN IENTIFIER 0.65 BSC 0.95 0.85 0.75 0.5 0.05 COPLANARITY 0.0 0.40 0.25.0 MAX 5 MAX 0.80 6 0.23 0.55 0 0.09 0.40 COMPLIANT TO JEEC STANARS MO-87-AA Figure 6. 8-Lead Mini Small Outline Package [MSOP] (RM-8) imensions shown in millimeters 00709-B ORERING GUIE Model Temperature Range Package escription Package Option Branding AG49SRMZ-EP-RL7 55 C to +25 C 8-Lead Mini Small Outline Package [MSOP] RM-8 S3U Z = RoHS Compliant Part. Rev. 0 Page 0 of 2

NOTES Rev. 0 Page of 2

NOTES 200 Analog evices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 08846-0-7/0(0) Rev. 0 Page 2 of 2