DATASHT CD0BMS, CD0BMS CMOS Quad State R/S Latches FN Rev 0.00 December Features High Voltage Types (0V Rating) Quad NOR R/S Latch- CD0BMS Quad NAND R/S Latch - CD0BMS State Outputs with Common Output NABL Separate ST and RST Inputs for ach Latch NOR and NAND Configuration V, 0V and V Parametric Ratings Standardized Symmetrical Output Characteristics 00% Tested for Quiescent Current at 0V Maximum Input Current of a at V Over Full Package-Temperature Range; - 00nA at V and o C Noise Margin (Over Full Package Temperature Range): - V at = V - V at = 0V -.V at = V Meets All Requirements of JDC Tentative Standard No. B, Standard Specifications for Description of B Series CMOS Devices Applications Holding Register in Multi-Register System Four Bits of Independent Storage with Output NABL Strobed Register General Digital Logic CD0BMS for Positive Logic Systems CD0BMS for Negative Logic Systems Description CD0BMS types are quad cross-coupled -state CMOS NOR latches and the CD0BMS types are quad cross-coupled - state CMOS NAND latches. ach latch has a separate Q output and individual ST and RST inputs. The Q outputs are controlled by a common NABL input. A logic or high on the NABL input connects the latch states to the Q outputs. A logic 0 or low on the NABL input disconnects the latch states from the Q outputs, results in an open circuit feature allows common busing of the outputs. The CD0BMS and CD0BMS are supplied in these - lead outline packages: Braze Seal DIP HT HT Frit Seal DIP HC HI Ceramic Flatpack HX HW CD0B Only CD0B Only Pinout Q Q R S NABL S R Q NC S R NABL R CD0BMS TOP VIW NC = NO CONNCTION S CD0BMS TOP VIW NC = NO CONNCTION 0 0 R S NC S R Q Q S R Q R S Q Q FN Rev 0.00 Page of 0 December
CD0BMS, CD0BMS Absolute Maximum Ratings DC Supply Voltage Range, ()............... -0.V to +0V (Voltage Referenced to Terminals) Input Voltage Range, All Inputs.............-0.V to +0.V DC Input Current, Any One Input 0mA Operating Temperature Range................ - o C to + o C Package Types D, F, K, H Storage Temperature Range (TSTG)........... - o C to +0 o C Lead Temperature (During Soldering)................. + o C At Distance / / Inch (.mm 0.mm) from case for 0s Maximum Reliability Information Thermal Resistance................ ja jc Ceramic DIP and FRIT Package..... 0 o C/W 0 o C/W Flatpack Package................ 0 o C/W 0 o C/W Maximum Package Power Dissipation (PD) at + o C For TA = - o C to +00 o C (Package Type D, F, K)...... 00mW For TA = +00 o C to + o C (Package Type D, F, K)..... Derate Linearity at mw/ o C to 00mW Device Dissipation per Output Transistor............... 00mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature.............................. + o C TABL. DC LCTRICAL PRFORMANC CHARACTRISTICS GROUP A PARAMTR SYMBOL CONDITIONS (NOT ) SUBGROUPS TMPRATUR MIN MAX UNITS Supply Current IDD = 0V, VIN = or GND + o C - A + o C - 00 A = V, VIN = or GND - o C - A Input Leakage Current IIL VIN = or GND = 0 + o C -00 - na + o C -000 - na = V - o C -00 - na Input Leakage Current IIH VIN = or GND = 0 + o C - 00 na + o C - 000 na = V - o C - 00 na Output Voltage VOL = V, No Load,, + o C, + o C, - o C - 0 mv Output Voltage VOH = V, No Load (Note ),, + o C, + o C, - o C. - V Output Current (Sink) IOL = V, VOUT = 0.V + o C 0. - ma Output Current (Sink) IOL0 = 0V, VOUT = 0.V + o C. - ma Output Current (Sink) IOL = V, VOUT =.V + o C. - ma Output Current (Source) IOHA = V, VOUT =.V + o C - -0. ma Output Current (Source) IOHB = V, VOUT =.V + o C - -. ma Output Current (Source) IOH0 = 0V, VOUT =.V + o C - -. ma Output Current (Source) IOH = V, VOUT =.V + o C - -. ma N Threshold Voltage VNTH = 0V, ISS = -0 A + o C -. -0. V P Threshold Voltage VPTH = 0V, IDD = 0 A + o C 0.. V Functional F =.V, VIN = or GND + o C VOH > VOL < V = 0V, VIN = or GND + o C / / = V, VIN = or GND A + o C = V, VIN = or GND B - o C Input Voltage Low VIL = V, VOH >.V, VOL < 0.V,, + o C, + o C, - o C -. V (Note ) Input Voltage High (Note ) VIH = V, VOH >.V, VOL < 0.V,, + o C, + o C, - o C. - V Input Voltage Low (Note ) Input Voltage High (Note ) Tri-State Output Leakage Tri-State Output Leakage VIL VIH IOZL IOZH = V, VOH >.V, VOL <.V = V, VOH >.V, VOL <.V VIN = or GND VOUT = 0V VIN = or GND VOUT =,, + o C, + o C, - o C - V,, + o C, + o C, - o C - V = 0V + o C -0. - A + o C - - A = V - o C -0. - A = 0V + o C - 0. A + o C - A = V - o C - 0. A FN Rev 0.00 Page of 0 December
CD0BMS, CD0BMS PARAMTR SYMBOL CONDITIONS (NOT ) NOTS:. All voltages referenced to device GND, 00% testing being implemented.. Go/No Go test with limits applied to inputs. TABL. AC LCTRICAL PRFORMANC CHARACTRISTICS PARAMTR SYMBOL CONDITIONS Set or Reset to Q - State nable to Q - State nable to Q Transition Time TPHL TPLH TPHZ TPZH TPLZ TPZL TTHL TTLH TABL. DC LCTRICAL PRFORMANC CHARACTRISTICS = V, VIN = or GND (Notes, ) = V, VIN = or GND (Notes, ) = V, VIN = or GND (Notes, ) = V, VIN = or GND (Notes, ) NOTS:. CL = 0pF, RL = 00K, Input TR, TF < 0ns.. - o C and + o C limits guaranteed, 00% testing being implemented.. CL = 0pF, RL = K, Input TR, TF < 0ns. GROUP A SUBGROUPS. For accuracy, voltage is measured differentially to. Limit is 0.00V max. GROUP A SUBGROUPS TMPRATUR TMPRATUR TABL. LCTRICAL PRFORMANC CHARACTRISTICS MIN MAX UNITS + o C - 00 ns 0, + o C, - o C - 0 ns + o C - 0 ns 0, + o C, - o C - ns + o C - 0 ns 0, + o C, - o C - ns + o C - 00 ns 0, + o C, - o C - 0 ns PARAMTR SYMBOL CONDITIONS NOTS TMPRATUR MIN MAX UNITS Supply Current IDD = V, VIN = or GND, - o C, + o C - A + o C - 0 A = 0V, VIN = or GND, - o C, + o C - A + o C - 0 A = V, VIN = or GND, - o C, + o C - A + o C - 0 A Output Voltage VOL = V, No Load, + o C, + o C, - 0 mv - o C Output Voltage VOL = 0V, No Load, + o C, + o C, - o C Output Voltage VOH = V, No Load, + o C, + o C, - o C Output Voltage VOH = 0V, No Load, + o C, + o C, - o C - 0 mv. - V. - V Output Current (Sink) IOL = V, VOUT = 0.V, + o C 0. - ma - o C 0. - ma Output Current (Sink) IOL0 = 0V, VOUT = 0.V, + o C 0. - ma - o C. - ma Output Current (Sink) IOL = V, VOUT =.V, + o C. - ma - o C. - ma Output Current (Source) IOHA = V, VOUT =.V, + o C - -0. ma - o C - -0. ma Output Current (Source) IOHB = V, VOUT =.V, + o C - -. ma - o C - -.0 ma MIN MAX UNITS FN Rev 0.00 Page of 0 December
CD0BMS, CD0BMS Output Current (Source) IOH0 = 0V, VOUT =.V, + o C - -0. ma - o C - -. ma Output Current (Source) IOH =V, VOUT =.V, + o C - -. ma - o C - -. ma Input Voltage Low VIL = 0V, VOH > V, VOL < V, + o C, + o C, - o C - V Input Voltage High VIH = 0V, VOH > V, VOL < V, + o C, + o C, - o C Set or Reset to Q State nable to Q State nable to Q Transition Time TPLH TPHL TPHZ TPZH TPLZ TPZL TTHL TTLH - V = 0V,, + o C - 0 ns = V,, + o C - 00 ns = 0V,, + o C - 0 ns = V,, + o C - 0 ns = 0V,, + o C - 00 ns = V,, + o C - 0 ns = 0V,, + o C - 00 ns = V,, + o C - 0 ns Minimum Set or Reset TW = V,, + o C - 0 ns Pulse Width = 0V,, + o C - 0 ns = V,, + o C - 0 ns Input Capacitance CIN Any Input, + o C -. pf NOTS:. All voltages referenced to device GND.. The parameters listed on Table are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics.. CL = 0pF, RL = 00K, Input TR, TF < 0ns.. CL = 0pF, RL = K, Input TR, TF < 0ns. TABL. POST IRRADIATION LCTRICAL PRFORMANC CHARACTRISTICS PARAMTR SYMBOL CONDITIONS NOTS TMPRATUR MIN MAX UNITS Supply Current IDD = 0V, VIN = or GND, + o C -. A N Threshold Voltage VNTH = 0V, ISS = -0 A, + o C -. -0. V N Threshold Voltage VTN = 0V, ISS = -0 A, + o C - V Delta P Threshold Voltage VTP = 0V, IDD = 0 A, + o C 0.. V P Threshold Voltage VTP = 0V, IDD = 0 A, + o C - V Delta Functional F = V, VIN = or GND = V, VIN = or GND + o C VOH > / Time TPHL TPLH NOTS: TABL. LCTRICAL PRFORMANC CHARACTRISTICS (Continued) PARAMTR SYMBOL CONDITIONS NOTS TMPRATUR. All voltages referenced to device GND.. CL = 0pF, RL = 00K, Input TR, TF < 0ns. VOL < / = V,,, + o C -. x + o C Limit. See Table for + o C limit.. Read and Record MIN MAX UNITS V ns FN Rev 0.00 Page of 0 December
CD0BMS, CD0BMS TABL. BURN-IN AND LIF TST DLTA PARAMTRS + O C PARAMTR SYMBOL DLTA LIMIT Supply Current - MSI- IDD 0. A Output Current (Sink) IOL 0% x Pre-Test Reading Output Current (Source) IOHA 0% x Pre-Test Reading TABL. APPLICABL SUBGROUPS CONFORMANC GROUP MIL-STD- MTHOD GROUP A SUBGROUPS RAD AND RCORD Initial Test (Pre Burn-In) 00% 00,, IDD, IOL, IOHA Interim Test (Post Burn-In) 00% 00,, IDD, IOL, IOHA Interim Test (Post Burn-In) 00% 00,, IDD, IOL, IOHA PDA (Note ) 00% 00,,, Deltas Interim Test (Post Burn-In) 00% 00,, IDD, IOL, IOHA PDA (Note ) 00% 00,,, Deltas Final Test 00% 00,, A, B, 0, Group A Sample 00,,,, A, B,, 0, Group B Subgroup B- Sample 00,,,, A, B,, 0,, Deltas Subgroups,,,, 0, Subgroup B- Sample 00,, Group D Sample 00,,, A, B, Subgroups, NOT:. % Parameteric, % Functional; Cumulative for Static and. TABL. TOTAL DOS IRRADIATION MIL-STD- TST RAD AND RCORD CONFORMANC GROUPS MTHOD PR-IRRAD POST-IRRAD PR-IRRAD POST-IRRAD Group Subgroup 00,, Table, Table TABL. BURN-IN AND IRRADIATION TST CONNCTIONS FUNCTION OPN GROUND V -0.V PART NUMBR CD0BMS Static Burn-In Note Static Burn-In Note Dynamic Burn- In Note Irradiation Note PART NUMBR Static Burn-In Note Static Burn-In Note Dynamic Burn- In Note Irradiation Note NOT:,,, 0, -,,,,,,, 0, -,,, - OSCILLATOR 0kHz khz,,,,,,,,,,,,, 0, -,,, - CD0BMS,,, 0, -,,,,,,, 0, -,,, -,,, 0,,,,,,,,,, 0, -,,, -. ach pin except and GND will have a series resistor of 0K %, = V 0.V. ach pin except and GND will have a series resistor of K %; Group, Subgroup, sample size is dice/wafer, 0 failures, = 0V 0.V FN Rev 0.00 Page of 0 December
CD0BMS, CD0BMS Functional Diagram S R Q R S Q S R Q R S Q S R 0 Q R S 0 Q S R Q R S Q NABL NC NABL NC Logic Diagram CD0BMS CD0BMS S QUIVALNT NOR S QUIVALNT NAND Q Q R R ALL INPUTS AR PROTCTD BY CMOS PROTCTION NTWORK ALL INPUTS AR PROTCTD BY CMOS PROTCTION NTWORK CD0BMS CD0BMS TRUTH TABL CD0BMS CD0BMS S R Q S R Q X X O OC X X O OC O O NC NC O O O O O O O O Open Circuit Open Circuit No Change No Change Dominated by S = input Dominated by R = O input FN Rev 0.00 Page of 0 December
CD0BMS, CD0BMS Typical Performance Characteristics OUTPUT LOW (SINK) CURRNT (IOL) (ma) 0 0 0 AMBINT TMPRATUR (T A ) = + o C GAT-TO-SOURC VOLTAG (VGS) = V 0V V OUTPUT LOW (SINK) CURRNT (IOL) (ma).0. 0.0..0. AMBINT TMPRATUR (T A ) = + o C GAT-TO-SOURC VOLTAG (VGS) = V 0V V 0 0 DRAIN-TO-SOURC VOLTAG (VDS) (V) FIGUR. TYPICAL OUTPUT LOW (SINK) CURRNT CHARACTRISTICS 0 0 DRAIN-TO-SOURC VOLTAG (VDS) (V) FIGUR. MINIMUM OUTPUT LOW (SINK) CURRNT CHARACTRISTICS DRAIN-TO-SOURC VOLTAG (VDS) (V) - -0 - AMBINT TMPRATUR (T A ) = + o C GAT-TO-SOURC VOLTAG (VGS) = -V -0V -V 0 0 - -0 - -0 - -0 OUTPUT HIGH (SOURC) CURRNT (IOH) (ma) DRAIN-TO-SOURC VOLTAG (VDS) (V) - -0 - AMBINT TMPRATUR (T A ) = + o C GAT-TO-SOURC VOLTAG (VGS) = -V -0V -V 0 0 - -0 - OUTPUT HIGH (SOURC) CURRNT (IOH) (ma) FIGUR. TYPICAL OUTPUT HIGH (SOURC) CURRNT CHARACTRISTICS FIGUR. MINIMUM OUTPUT HIGH (SOURC) CURRNT CHARACTRISTICS TRANSITION TIM (tthl, ttlh) (ns) 00 0 00 0 AMBINT TMPRATUR (T A ) = + o C SUPPLY VOLTAG () = V 0V V PROPAGATION DLAY TIM (tphl, tplh) (ns) 0 00 0 AMBINT TMPRATUR (T A ) = + o C SUPPLY VOLTAG () = V 0V V 0 0 0 0 0 0 00 LOAD CAPACITANC (CL) (pf) 0 0 0 0 0 0 0 0 0 0 00 LOAD CAPACITANC (CL) (pf) FIGUR. TYPICAL TRANSITION TIM AS A FUNCTION OF LOAD CAPACITANC FIGUR. TYPICAL PROPAGATION DLAY TIM vs LOAD CAPACITANC - ST, RST, to Q, Q FN Rev 0.00 Page of 0 December
CD0BMS, CD0BMS Typical Performance Characteristics (Continued) POWR DISSIPATION PR DVIC (PD) ( W) 0 AMBINT TMPRATUR (T A ) = + o C 0 0 SUPPLY VOLTAG () = V 0 0V 0 0V V 0 CL =pf CL = 0pF 0 0 0 0 0 INPUT FRQUNCY (fi) (khz) FIGUR. TYPICAL POWR DISSIPATION vs FRQUNCY M M S Q R OUTPUT S Q R OUTPUT M M CD0BMS CD0BMS FIGUR. SWITCH BOUNC LIMINATOR NABL 0 IN IN K A CL = 0pF TST IN IN A tphz tplz tpzh tpzl Z = HIGH IMPDANC NABL 0% 0% tpzh POINT A (IN =, IN = ) POINT A (IN =, IN = ) tpzl tphz 0% 0% tplz 0% 0% / / / / FIGUR. NABL PROPAGATION DLAY TIM TST CIRCUIT AND WAVFORM FN Rev 0.00 Page of 0 December
CD0BMS, CD0BMS BUS A CD00 OF 0 CD0 0 LOAD A NABL A BUS B CD00 0 CD0 0 LOAD B NABL B OUTPUT DATA BUS BUS C CD00 0 CD0 0 / CD00 0 LOAD C NABL C BUS D CD00 0 CD0 0 LOAD D NABL D RST FIGUR 0. MULTIPL BUS STORAG FN Rev 0.00 Page of 0 December
CD0BMS, CD0BMS Chip Dimensions and Pad Layouts CD0BMSH Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (0 - inch) CD0BMSH MTALLIZATION: Thickness: kå kå, AL. PASSIVATION: 0.kÅ -.kå, Silane BOND PADS: 0.00 inches X 0.00 inches MIN DI THICKNSS: 0.0 inches - 0.0 inches Copyright Intersil Americas LLC. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO00 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN Rev 0.00 Page 0 of 0 December