EE155/255 Green Electronics Power Circuits 10/4/17 Prof. William Dally Computer Systems Laboratory Stanford University
HW2 due Monday 10/9 Lab groups have been formed Lab1 signed off this week Lab2 out Course Logistics
Course at a Glance No Date Topic HW out HW in Lab out Lab ck Lab HW 1 9/25/17 Intro (basic converters) 1 1 Intro to ST32F3 Periodic Steady State 2 9/27/17 Embedded Prog/Power Elect. 3 10/2/17 Power Electronics - 1 (switches) 2 1 2 1 AC Energy Meter Power Devices 4 10/4/17 Power Electronics - 2 (circuits) 5 10/9/17 Photovoltaics 3 2 3 2 PV MPPT Motor control Matlab 6 10/11/17 Feedback Control 7 10/16/17 Electric Motors 4 3 4 3 Motor control - Lab/ Feedback 8 10/18/17 Isolated Converters 9 10/23/17 Solar Day 5/PP 4 5 4 PS Isolated Converters 10 10/25/17 Magnetics 11 10/30/17 Soft Switching 6 5/PP 6 5 Magnetics Magnetics and Inverters 12 11/1/17 Project Discussions 13 11/6/17 Inverters, Grid, PF, and Batteries 6 P 6 Project 14 11/8/17 Thermal & EMI 15 11/13/17 Quiz Review C1 16 11/15/17 Grounding, and Debugging Q 11/15/17 Quiz - in the evening 11/20/17 Thanksgiving Break C2 11/22/17 Thanksgiving Break 17 11/27/17 Wrapup 18 11/29/17 Guest Lecture C3 19 12/4/17 Guest Lecture 20 12/6/17 No Class TBD Project presentations P 12/15/17 Project webpage due
Multi-Level PV System Test Setup
Primary and Secondary PCBs
Course to Date We need sustainable energy systems At the core they are voltage converters Periodic steady-state analysis, buck and boost Intelligent control + power path Intelligent control done with event-driven embedded software Real devices have switching and conduction loss and parasitics
Last Time DC and AC characteristics of MOSFETs, Diodes, and IGBTs Switches in pairs One switch does the work Turn on transient Diode reverse recovery Parasitics Gate drive and Miller capacitance
Turn-On and Turn-Off Loss
Turn-On Loss I P I D I L Q RR Q D s V DS t 1 t 2 t 3
Turn-Off Buck with Diode I L I D I 1 Excess current charges drain node. Integrate to get switching energy V DS t r t c! 1 E = V DD t r 6 I L + 1 3 I $ # 1& " %
Turn-Off Buck with Diode I D I L If current ramps faster than voltage nearly ZVS t c E = 1 6 V 1I L t c V DS V 1 t r
Parasitic Losses L P C L M 1 C 1 L 1 D 1 C 2
Gate Drive
Gate Driver drain S H R GH in V GH + - Control & Protection Gate-driver IC S L R GL M 1 source
Effect of Miller Cap on Rise Time C DG M1 i G
Effect of Miller Cap on Rise Time dv D dt = i G C DG C DG M1 Δt = ΔV DC DG i G i G Example: i = 0.5A, C = 100pF, DV = 400V
Bootstrap Supply R B D B V inh C B High-Side Gate Drive G2 M2 V 1 + - X i inl Low-Side Gate Drive G1 M1 GND V GL + -
Dead Time
Too Little Dead Time (11.6kW loss) 110KW ix(1:h:1)*(v(d)-v(m1)) ix(1:l:1)*v(m1) 100KW 90KW 80KW 70KW 60KW 50KW 40KW 30KW 4mJ 3.4mJ 3.7mJ 3.4mJ 20KW 10KW 0KW -10KW 3.0KA 2.5KA 2.0KA 2500A Ix(1:h:1) Ix(1:l:3) 1.5KA 1.0KA 0.5KA 0.0KA -0.5KA -1.0KA -1.5KA -2.0KA -2.5KA -3.0KA 16V V(p1l) v(p1h)-v(m1) V(1:gl) V(1:gh)-v(m1) 14V 12V 10V 8V 6V 4V 2V 0V 50V V(m1) 45V 40V 35V 30V 25V 20V 15V 10V 5V 0V -5V 1.6µs 1.7µs 1.8µs 1.9µs 2.0µs 2.1µs 2.2µs 2.3µs 2.4µs 2.5µs 2.6µs 2.7µs 2.8µs 2.9µs 3.0µs 3.1µs 3.2µs
v G (V) The Real Gate Signal 10 0 0.6 0.8 1 1.2 1.4 1.6 1.8 15 10 5 0 v X (V) 40 20 0 0.6 0.8 1 1.2 1.4 1.6 1.8 3 i M1 (ka) 100 2 1 0 0.6 0.8 1 1.2 1.4 1.6 1.8 P M1 (kw) 50 0 0.6 0.8 1 1.2 1.4 1.6 1.8 t (µ s)
40KW 36KW Too Much Dead-Time (340W loss) ix(2:h:1)*(v(d)-v(m2)) (Still pretty good) ix(2:l:1)*v(m2) 32KW 28KW 24KW 20KW 16KW 12KW 8KW 0.27mJ 4KW 0KW -4KW 800A 700A 600A 500A 400A 300A 200A 100A 0A -100A -200A -300A -400A -500A -600A -700A 16V Ix(2:h:1) Ix(2:l:3) 740A V(p2l) V(p2h)-v(m2) V(2:gl) V(2:gh)-v(m2) 14V 12V 10V 8V 6V 4V 2V 0V -2V 50V V(m2) 45V 40V 35V 30V 25V 20V 15V 10V 5V 0V -5V 1.6µs 1.7µs 1.8µs 1.9µs 2.0µs 2.1µs 2.2µs 2.3µs 2.4µs 2.5µs 2.6µs 2.7µs 2.8µs 2.9µs 3.0µs 3.1µs 3.2µs 700mV diode drop
Just Right (310W loss) 2.7KW IX(4:l:1)*v(m4) ix(4:h:1)*(v(d)-v(m1)) 2.4KW 2.1KW 1.8KW 1.5KW 1.2KW 0.9KW 0.6KW 3uJ 0.19mJ 0.3KW 0.0KW -0.3KW 420A Ix(4:h:1) Ix(4:l:3) 350A 280A 210A 140A 70A 0A -70A -140A -210A -280A -350A 16V V(p4l) v(p4h)-v(m4) v(4:gh)-v(m4) V(4:gl) 14V 12V 10V 8V Slower gate rise 6V 4V 2V 0V -2V 50V V(m4) 45V 40V 35V 30V 25V 20V 15V 10V 5V Short duration diode drop 0V -5V 1.6µs 1.7µs 1.8µs 1.9µs 2.0µs 2.1µs 2.2µs 2.3µs 2.4µs 2.5µs 2.6µs 2.7µs 2.8µs 2.9µs 3.0µs 3.1µs 3.2µs Conduction loss is I 2 R = 50 2 x 1m ~ 25W
Too much dead time is better than too little
Snubbers
Dampen Ringing Nodes 40A C j D L D and C j resonate when M is on Parallel R S dampens tank L D R S Series C S limits dissipation G M C S + - 50V
Inductance on Drain 42uJ turn-off 8uJ turn-on
With Snubber (1nF, 5W) 2uJ in snubber 8uJ turn-on 42uJ turn-off
Design Procedure C j Pick R S ~ 1/wC j 40A D Pick C S so t >= p/w Or E s = C S V 2 /2 L D R S G M C S + - 50V
Example Cycle
IGBT Half Bridge L S CH C X C CGH Q H D H V S + - GD X R X I L C CGL Q L D L GD SL L SL
1 One Switching Cycle 400 i QH (A) 50 200 v CEH (V) 0 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 40 i DL (A) 20 0 2 20 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 400 v x (V) 300 200 100 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 t (µs)
i QH (A) 50 Turn-On Transient400 200 v CEH (V) 0 0 60 80 100 120 140 160 180 i DL (A) 40 20 0 1 2 40 20 0 i QL (A) High-Side Turn On v X (V) v CH (V) v GEH (V) 20 20 60 80 100 120 140 160 180 400 200 410 400 0 0 60 80 100 120 140 160 180 390 60 80 100 120 140 160 180 15 15 10 10 5 5 0 0 5 2 5 10 10 60 80 100 120 140 160 180 t (ns) 20 10 P QH (kw) v GEL (V) 60ns 22kW E~ 2 E = 773µJ L di dt = 660µJ
40 1 400 i QH (A) 20 200 v CEH (V) 0 1.55 1.6 1.65 1.7 1.75 0 40 30 i DL (A) 20 10 High-Side Turn Off v X (V) v CH (V) 0 1.55 1.6 1.65 1.7 1.75 400 200 0 0 1.55 1.6 1.65 1.7 1.75 415 410 405 400 1.55 1.6 1.65 1.7 1.75 t (µs) 2 8 6 4 2 P QH (kw) E = 230μJ L di dt
Lab Half-Bridge Module
The Half-Bridge Module V12 Hin 1 2 Hin IRS21834 U1 V B HO S 13 12 11 V B CSupply D2 15V C2 1 F R3 1 D1 R1 4.7 M1 V D CFilter V D Out GND 4 3 DT Vss V CC LO Com 7 6 5 R2 4.7 C1 4.7 F M2 C3 2.2 F 200V D3 56V 5W COM
Bootstrap Supply V12 Hin 1 2 Hin IRS21834 U1 V B HO S 13 12 11 V B CSupply D2 15V C2 1 F R3 1 D1 R1 4.7 M1 V D CFilter V D Out GND 4 3 DT Vss V CC LO Com 7 6 5 R2 4.7 C1 4.7 F M2 C3 2.2 F 200V D3 56V 5W COM
Bootstrap Supply
Drain Voltage Filter V12 Hin 1 2 Hin IRS21834 U1 V B HO S 13 12 11 V B CSupply D2 15V C2 1 F R3 1 D1 R1 4.7 M1 V D CFilter V D Out GND 4 3 DT Vss V CC LO Com 7 6 5 R2 4.7 C1 4.7 F M2 C3 2.2 F 200V D3 56V 5W COM
Drain Voltage Filter 300nH Input Inductance
SPICE
SPICE Example A Voltage Doubler
A Voltage Doubler * Simple voltage "doubler".include "gel.lib".param td=100n tr=100n tf=100n tw=2.5u tcy=5u ncy=2.param l1=22uh c1=10uf r1=10 * call half-bridge subcircuit xhb vd mid g g 0 v12 gel_hb * circuit l1 vin mid {l1} c1 vd 0 {c1} r1 vd 0 {r1} * supplies v12 v12 0 12 vin vin 0 24 * stimulus VG g 0 PULSE(0 5 {td} {tr} {tf} {tw} {tcy} {ncy}).ic i(l1)=9.2.ic v(vd)=42.8.tran {ncy*tcy}
Turn-On Transient
Steady State
Close up of Drain Current
With PID Control
A Warning SPICE (or any simulator) is a Verification tool, not a Design tool Design your circuit first Use Excel, Matlab, a calculator etc to calculate component values Then simulate your circuit to check operation and fine-tune parameters Don t try to design your circuit using SPICE Simulation is not a substitute for thinking
Real switches have limitations Summary of Power Circuits Conduction losses (R ON for FETs, V CE for IGBTs, Diode drop) Switching losses (finite t on, t off, t rr ) With current source load, current ramps, then voltage falls And voltage rises before current falls May be dominated by reverse recovery time Complicated by inductance Parasitic L and C Power MOSFETs Switch quickly, have linear I-V, integral diode IGBTs Diode-like I-V, slower switching Diodes Have reverse recovery time Switches operate in pairs For one-way converters, one switch may be a diode Synchronous rectification make both switches FETs to reduce loss Need dead time to avoid shoot through current Gate-drive circuits control rise and fall times Supply Miller capacitance Bootstrap supply needed for high-side driver Snubbers dampen voltage and current transients Use SPICE as a verification tool, not a design tool
Course at a Glance No Date Topic HW out HW in Lab out Lab ck Lab HW 1 9/25/17 Intro (basic converters) 1 1 Intro to ST32F3 Periodic Steady State 2 9/27/17 Embedded Prog/Power Elect. 3 10/2/17 Power Electronics - 1 (switches) 2 1 2 1 AC Energy Meter Power Devices 4 10/4/17 Power Electronics - 2 (circuits) 5 10/9/17 Photovoltaics 3 2 3 2 PV MPPT Motor control Matlab 6 10/11/17 Feedback Control 7 10/16/17 Electric Motors 4 3 4 3 Motor control - Lab/ Feedback 8 10/18/17 Isolated Converters 9 10/23/17 Solar Day 5/PP 4 5 4 PS Isolated Converters 10 10/25/17 Magnetics 11 10/30/17 Soft Switching 6 5/PP 6 5 Magnetics Magnetics and Inverters 12 11/1/17 Project Discussions 13 11/6/17 Inverters, Grid, PF, and Batteries 6 P 6 Project 14 11/8/17 Thermal & EMI 15 11/13/17 Quiz Review C1 16 11/15/17 Grounding, and Debugging Q 11/15/17 Quiz - in the evening 11/20/17 Thanksgiving Break C2 11/22/17 Thanksgiving Break 17 11/27/17 Wrapup 18 11/29/17 Guest Lecture C3 19 12/4/17 Guest Lecture 20 12/6/17 No Class TBD Project presentations P 12/15/17 Project webpage due