Physics 310 Lecture 8a Digital Circuits

Transcription

1 Mon. 3/2 Wed. 3/4 Thurs. 3/5 Fri. 3/6 h : Digial ircuis h s & 2: Digial ircuis Lab 8: Digial ircuis More of e same Quiz h s & 2 Physics 30 Mon. 3/29 h 4.,.6-.0; pp (Sampling Frequency); 2.6: AD & DA Projec Proposal HW 8: h Pr.2,8,9*; h2 Pr,5 Lab 8 Noebook Projec Proposals Due Nex Monday Sudy Lis for Quiz #8:. gic gaes: AND, NAND, OR, NOR, XOR, XNOR, and NOT (inverer). 2. Know how o use e ru ables for logic gaes. 3. Daa and JK Flip-Flops gic Gaes Symbols Tru Tables TTL & MOS oolean Algebra can make anying wi NAND or NOR gaes! De Morgan s eorem Numbering sysems & codes decimal, binary, D (Open collecor & ree-sae logic NO TIM!) Flip-Flops RS locked RS also e differen ypes of clocking Daa coun-by-wo cirui JK coun-o-6 circui D-o-decimal Decoder & Seven-segmen Display oun-by-3 circui design (e decade couner is similar!) Synchronous vs. ripple couners. ould you please go over e NOR and NAND gaes? I m no sure I really undersand how ey work and wha eir purpose is. 2. ould you go over e differen logic lines? 3. Why are ere so many differen ypes of flip-flops? 4.. ould you go over or explain e Schmi Trigger inverer as a simple low power oscillaor? Wha are componens in e logic line acually used for? Jus a premade "circui" o supply a cerain volage o an insrumen?

2 Working wi oolean Algebra, like solving eorems 0 o 7. I don' undersand how ey work. 9. an we go over an example of power dissipaion and how you figure ou e power requiremens of a logic device. o appreciae why ere are muliple families ou ere, i s wor appreciaing e power dissipaion issue, bu we won ge ino really calculaing i. 0.. How ese logic lines e only ones ere are or can more be discovered and creaed? These are cerainly e big ones a ge used a lo; perhaps ere are some oer ones, bu ey are no as prevalen (and for e sake of compaibiliy, one doesn wan oo much diversiy.) 2. an we jus go over idenifying and building differen logic lines? 3. ould we ry o work rough some examples of boolean algebra on our own or wi parners? hapers & 2 Inroducion. You ve already me e circuiry a performs e basics of wha I ll call coninuous maemaics adding (or subracing), inegraing, and differeniaing (yes, ere are even mulipliers / dividers). u ere s a whole oer side o maemaics discree logic. You may be mos familiar wi is side in e ougrow of Maemaic in wha became ompuer Science all ose IF Then, or Do Unil, or And, Or, No, Jus as ere are elecronic componens o do e coninuous kind of ma, ere are componens o do e discree kind. For a maer, jus as e coninuous ma componens are buil of mosly ransisors, so are e discree ma componens. The 555 imer provided our firs occasion o ink more in erms of discree logic saes of a signal ( or ) raer an e specific values e signal may assume. There are a handful devices a have been designed o perform e basic logical operaions like you migh employ when wriing code or doing an online search AND, OR, NOT, NOR, and NAND, in addiion o ese, e flip-flop rounds ou e building blocks of a logic, a.k.a., digial circui. These are e subjec of chapers and 2 of our ex. Digial ircuiry is all abou manipulaing wo saes and only wo saes. In eir naive ongue (a of volages), ese saes may be a volage (someing near e posiive rail) and a volage (someing near ground). Depending on conex, ese wo saes are variously referred o as ON HI True volage near posiive rail usually OFF False 0 ground

3 -2 Gaes The devices a handle ose logical connecors, are called logic gaes, or jus plain gaes. Here s a quick survey of e basics. AND: The oupu is rue / volage only if bo of e wo inpus are rue / volage; oerwise, e oupu is false / volage. Of course a s e same way AND works in nglish oo: True or False: I have an apple AND a banana:. efore slide: work ou ru able for Apple AND anana. Tru Table Simplified inner workings Symbol + Inpu A Inpu pu a b Inpu a Inpu b AND pu ou I presen e simplified inner workings no because we re going o focus a much under e hood of ese gaes a is momen, bu so you can appreciae a gaes can be made of ransisors and have a passing familiariy wi how. Thinking rough e inner workings, each ransisor s base volage needs o be above is emier s volage for e ransisor o urn on and conduc curren; so as long as one or e oer base volage is grounded, negligible curren passes rough e resisor, and so ou is essenially ground. OR: The oupu is rue / volage if eier one or e oer (or bo) inpu is rue /. Of course, is is how OR is used in nglish oo: True or False: I have an apple OR a banana:. efore slide, work ou ru able for Apple OR anana Tru Table Simplified Inner Workings Symbol Inpu a Inpu b pu a + b ou Inpu a Inpu b OR OR pu

4 Thinking rough e inner workings, if eier one of e ransisors bases is se o a high volage, en a one will allow curren o pass rough e resisor and us allow ou o be a higher volage an ground. Now, in nglish, ere s some ambiguiy o or : do you have an apple or a banana? wha if you have bo is e answer yes or no? X-OR: (exclusive OR). The oupu is rue / volage if one or e oer inpu is rue / volage, bu no if bo are. In nglish, we usually jus use or for is and judge by e conex; for example, le me know if you ve seleced your frui; eier an apple or a banana. Tru Table Symbol Inpu a Inpu b pu Inpu a 0 OR X-OR pu 0 Inpu b 0 NOT: pu is e opposie of e single inpu. Again, is is e same way we can (juvenilely) use NOT in nglish: I is True a I have an apple.not. Tru Table Simplified Inner Workings Symbol Inpu pu ou When in series wi anoer gae, or in Oerwise, Inpu NOT pu Anoer name for a NOT gae is an Inverer. follower no do Three useful gaes are made by acking a No on e end of an AND, an OR, and an X-OR. NAND: pu is rue / volage as long as a leas one of e inpus is false /. In nglish: i s rue a you don have bo an apple and a banana isn i? Tru Table Simplified Inner Workings Symbol Inpu a Inpu b pu ou 0 Inpu a a 0 NAND Noice a is is e opposie Inpu b pu as for an AND; i.e., i s Wha you d ge if you followed an b AND wi a NOT. pu

5 NOR: pu is rue if neier of e wo inpus is rue. nglish example: Is i rue a I have neier an apple NOR a banana? efore slide, work ou ru able. Tru Table Simplified Inner Workings Symbol Inpu a Inpu b pu a Noice a is is e opposie oupu As for an OR; i.e., i s wha you d Ge if you followed an OR wi a NOT. + b ou Inpu a Inpu b OR NOR pu X-NOR: (exclusive NOR). The oupu is rue / volage as long as e inpus are e same as each oer. Tru Table Symbol Inpu a Inpu b pu Inpu a 0 0 X-NOR 0 0 Inpu b pu 0 0

6 Schmi Trigger & Hyseresis Saying a ese are wo-sae devices is all good and well, bu i s no like ey really deal in s and 0 s; ey really deal in volages which have a coninuum of possible values. Jus as wi e comparaors, ere needs o be a reshold value; any volage higher an i couns as / True, or, and any volage lower an i couns as / False or 0. eer ye, o be a lile insulaed from noise on e inpus, ese devices should be Schmi riggered. Tha is o say, ey should have wo resholds; if e inpu crosses e upper one on e way up, i couns as or crosses e lower one on e way down i couns as. We can see a play ou for a sine-wave inpu o a NOT gae / inverer. Inpu NOT pu in ou Someone asked, so jus go over firs par: As has already been seen, in haper0, inverers wi hyseresis can be used o generae square waves. Here s one more example. + A ou resh- resh T T o / R A( o) ( e ) o Rln Rln

7 ( A o ) ( e ( o )/ R ) o Rln Rln Rln Rln ( )/ R A( ) e Rln T Rln Rln Rln Rln Zoom in / Zoom ou. efore we ge o inking abou really using ese gaes, ere are wo disinc areas of background we should explore. While you re somewha familiar wi coninuous maemaics, you may no have a lo of pracice wi discree / logic maemaics; so we ll pull back and survey oolean Algebra. efore we do a ough, we ll zoom in and consider some of e real deails of ese logic gaes, wha s really under e hood so we can appreciae a) how ey relae o oer circuiry devices and principles we ve already me and b) how differen design choices impac eir exac behavior wha s a cheap gae design, wha s a fas gae design, -3 Survey of I Gaes Now i s ime o look under e hood: no all AND s are creaed equal. When you selec a vehicle, firs you decide if i s going o be a bike, a car, a plane Afer a, you sill have choices of makes and models. Similarly, when you selec a logic device, firs you decide if i s going o be an AND or an X-OR, bu en you sill have wo differen lines (TTL & MOS) and differen families wiin em TTL: 74, 74L, 74LS, 74ALS from which o choose. Here are e key disinguishing feaures. Fanou: How many oer similar chips can be conneced before e signal degrades oo much. To be more specific, ese are all ransisor based devices, and as you re familiar, ere are inheren diode-volage drops on e order of 0.6. If you sring oo many of ese in series, ere s a chance a e oupu of e las one won be a high anymore.

8 Threshold Level: For a maer, wha couns as and wha couns as? Above/below 2.5, above 5, above 0,? Acually, one given device may have four answers o a quesion. On is inpu, a TTL componen powered by a +5 rail (and ground) may recognize < 0.8 > 2.0, while on is oupu i may produce =0.4 = 2.4 jus o give a lile margin for error and for volage drops along e way from one componen o e nex. Propagaion Delay, T d : How long afer e inpu flips values will e oupu flip? Power Dissipaion, P d : When deciding how o power a circui, e dissipaion of each componen needs o be considered so you don undersize e power supply (jus can source as much curren as all e devices wan o suck ou of i.) We won ge ino e deails here, bu e basic quesion is usually how much curren is drawn by a circui (depends on e volages and impedances o ground) and a secondary one is how ho will i ge (depends on how much curren passes rough each resisor.) Table.6 gives you an idea of e differen qualiies of e differen lines and families. To ge a lile bi of an appreciaion why ere should be ese differences and more generally how ese work, we ll peek under e hood of a few logic gaes. You need undersand em only enough so a ey re plausible. You won be modeling em. Transisor-Transisor gic (TTL): Q : This shows a peculiar device, a ransisor wi wo emiers. Taking a lierally, e device is a chunk of semiconducor buil like a Y : e ollecor is a e boom, e ase is in e middle, and en ere are wo differen branches o miers. Here s e acual schemaic followed by e mechanical-swich version for e wo possibiliies. a b Q Q 2 Q 3 Q 4 To draw curren, need emier lower an base volage; in is design, e base is conneced o e + rail, so a s aken care of, now we need o conrol e emier volage o urn onn and off e ransisor.

9 If one Q mier is held Then i can draw curren. I only akes one emier o draw curren rough Q. Q is on, and so pulling is ollecor / Q 2 s ase below i s emier, and so urn off Q 2. Then Q 3 s base floas and so i urns On and Q4 s base floa s low and i s off. a= b Q Q 2 Q 3 Q 4 I do is one If bo Q mier s are Then i can draw curren; Q is off, and i s collecor / Q 2 s base is allowed o floa up rough Q s collecor and base oward cc, so Q 2 urns on. Tha allows i o pull Q 4 s base up o abou 0.6 / urn Q 4 on, and meanwhile pull Q 3 s base down o 0.6 which is roughly where i s emier is if Q 4 is, us Q 3 is off. a= b= Q Q 2 Q 3 Q 4 Thus, is circui has e behavior of a NAND. Inpu a Inpu b pu ig volage swings, long ime o respond. One imporan poin abou TTL circuis like is is a e volage drops across e ransisors erminals vary from nearly 0 vols o nearly e rail. In so doing, like wi a charging up capacior, opposie charges build up across e juncions beween e n-ype and p-ype slabs in e ransisors. As wi a capacior, e more you wan o charge i up, e longer i akes.

10 Open ollecor-pu (from -7). Alernaively, e 74-series TTL gaes don have e equivalen of Q 3. Wha a means is e oupu eier ges pulled down o ground when Q 4 is on or i s like a loose wire. In order o ge e oupu o be high en, e user needs o include a pull-up resisor on e oupu. For example: You migh wonder why someone would ever use such a chip, bu ere s a real virue. ach of ese chips only handle wo inpu signals, bu wha if you wan o handle more; say, you wan o flag when A,,, AND D are all. You can do is by using muliple gaes in parallel, bu en you can have em fighing over e oupu s value + A D A,,, AND D Three-Sae gic (from -7) Anoer approach o leing muliple gaes run in parallel is aking urns acivaing eir oupus. Three-Sae or ri-sae chips have an exra inpu a simply ells i when o connec is oupu. Tha way each of a number of gaes can ake urns conrolling e shared oupu line. mier-coupled gic (L) mier-coupled devices minimize is effec by using ransisors in a way a doesn so dramaically change e volages across em. Thus L devices can responded more quickly. Here s e L version of a NOR. Q 4 A Q Q 2 Q 3 Q 5 While e suble way in which e ransisors are always held near e brink of ransiion may no be obvious, e basic operaion should be clear:

11 Wi no volage applied o A or, e respecive ransisors are off and Q5 s base volage is pulled up, us having i on and pulling e pu, as is appropriae for a NOR. In conras, if eier A or is, en e respecive ransisor is on and Q5 s base is pulled which urns i off and allows e oupu o be pulled. The book noes a is design is very quick o respond, ( sub-nanosecond ), bu such quick swiching can generae high frequency noise in a circui which can cause oer problems. omplemenary meal Oxide Semiconducor (MOS) gic ack when we firs me ransisors we didn spend ime on MOS ransisors, so here s e key: Wheer or no curren can pass beween e Source and e Drain depends on e volage difference beween e Gae and e ase. The greaer is volage difference, e more easily curren passes beween Source and Drain. Think of is as a rubber pipe and increasing G is like sreching i wider. The down side is a ese rely on e fairly slow process of charging up and discharging e gae, so MOS isn paricularly quick. On e upside, e Gae barely draws any curren, so MOS is fairly efficien. Inverer In G G DD S D D S I do is one In= DD ey do is one In= DD When e inpu is, en ere s lile G- volage for e op, bu large G- volage for e boom ransisor, so oupu is pulled. When e inpu is, en ere s lile G- volage for e boom, bu large G- volage for e op ransisor, so oupu is pulled A NOR DD

12 I do is one DD ey do is one DD A= A= = = ey do is one DD ey do is one DD A= A= = = This brief survey should give you a sense of e differences beween differen lines of logic gaes.

13 -8 Family Inerfacing In general, once you choose a family of gaes, you wan o sick wi i since ey have differen inpu and oupu impedances, differen volage resholds, and even differen rail volages. Sill, someimes you ve go o inerface MOS and TTL family chips. Going from open-collecor TTL o MOS is easies. The TTL is more an able o supply e minimal curren a e MOS will draw, and using a pull-up resisor on e oupu allows you o se is value where ever you need o communicae wi e MOS. Going e oer way is a lile rickier; e TTL may draw more curren an e MOS can provide and is reshold can be significanly differen from a for e MOS. For is purpose an inermediae buffer makes e ransiion from one logic level o e nex and can source e required curren. Now closing e hoods again, le s ink abou wha you can do wi em.