LMV321, LMV358, LMV324. Single, Dual, Quad Low-Voltage, Rail-to-Rail Operational Amplifiers

Transcription

1 LMV32, LMV38, LMV324 Single, Dual, Quad Low-Voltage, Rail-to-Rail Operational mplifiers The LMV32, LMV38, and LMV324 are MOS single, dual, and quad low voltage operational amplifiers with rail to rail output swing. These amplifiers are a cost effective solution for applications where low power consumption and space saving packages are critical. Specification tables are provided for operation from power supply voltages at 2.7 V and V. Rail to Rail operation provides improved signal to noise preformance. Ultra low quiescent current makes this series of amplifiers ideal for portable, battery operated equipment. The common mode input range includes ground making the device useful for low side current shunt measurements. The ultra small packages allow for placement on the PB in close proximity to the signal source thereby reducing noise pickup. Features Operation from 2.7 V to. V Single Sided Power Supply LMV32 Single vailable in Ultra Small Pin S7 Package No Output rossover Distortion Industrial temperature Range: 4 to +8 Rail to Rail Output Low Quiescent urrent: LMV38 Dual 22, Max per hannel No Output Phase Reversal from Overdriven Input These are Pb Free Devices Typical pplications Notebook omputers and PD s Portable Battery Operated Instruments ctive Filters S 7 SE 49 8 SOI 8 SE 7 SOI 4 SE 7 Micro8 SE 846 TSOP SE 483 ORDERING ND MRKING INFORMTION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. UDFN8 SE 7J 8 TSSOP 4 SE 948G GIN (db) 6 4 MRR (db) 6 V S = V 2 Over 4 to +8 Same Gain.8 db (Typ) 4 2 k k k M M FREQUENY (Hz) Figure. Open Loop Frequency Response (R L = 2 k, T = 2, V S = V) INPUT OMMON MODE VOLTGE (V) Figure 2. MRR vs. Input ommon Mode Voltage Semiconductor omponents Industries, LL, 2 February, 2 Rev. 2 Publication Order Number: LMV32/D

2 LMV32, LMV38, LMV324 M = Specific Device ode M = Date ode = Pb Free Package (Note: Microdot may be in either location) V38 L Y W 4 8 S 7 SOI 8 V38 LYW = Specific Device ode = ssembly Location = Wafer Lot = Year = Work Week = Pb Free Package SOI 4 LMV324 WLYWWG LMV324 = Specific Device ode = ssembly Location WL = Wafer Lot Y = Year WW = Work Week G = Pb Free Package MRKING DIGRMS TSOP 3YW 3 = Specific Device ode = ssembly Location Y = Year W = Work Week = Pb Free Package (Note: Microdot may be in either location) 8 V38 = Specific Device ode = ssembly Location Y = Year W = Work Week = Pb Free Package (Note: Microdot may be in either location) M 4 Micro8 V38 YW UDFN8 M = Specific Device ode = Date ode = Pb Free Package TSSOP 4 LMV 324 LYW LMV324 = Specific Device ode = ssembly Location L = Wafer Lot Y = Year W = Work Week = Pb Free Package PIN ONNETIONS +IN V IN S7 /TSOP (Top View) 4 UDFN8/Micro8/SOI 8 OUT OUT 8 V+ V + IN IN OUT B IN + V+ IN IN B IN B+ OUTPUT B + IN B V 4 IN B+ OUT B SOI 4 + D B 4 OUT D 3 IN D 2 IN D+ V IN + 9 IN 8 OUT OUT IN IN + V+ IN B+ IN B OUT B TSSOP 4 + D (Top View) (Top View) (Top View) B 4 OUT D 3 IN D 2 IN D+ V IN + 9 IN 8 OUT 2

3 LMV32, LMV38, LMV324 MXIMUM RTINGS Symbol Rating Value Unit V S Supply Voltage (Operating Range V S = 2.7 V to. V). V V IDR Input Differential Voltage Supply Voltage V V IR Input ommon Mode Voltage Range. to (V+) +. V Maximum Input urrent m t So Output Short ircuit (Note ) ontinuous T J Maximum Junction Temperature (Operating Range 4 to 8 ) J Thermal Resistance: /W S 7 28 Micro8 238 TSOP 333 UDFN8 (.2 mm x.8 mm x. mm) 3 SOI 8 22 SOI 4 6 TSSOP 4 9 T stg Storage Temperature 6 to Mounting Temperature (Infrared or onvection 2 sec) 26 V ESD ESD Tolerance LMV32 Machine Model Human Body Model LMV38/324 Machine Model Human Body Mode 2 V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.. ontinuous short circuit operation to ground at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of. Output currents in excess of 4 m over long term may adversely affect reliability. Shorting output to either V+ or V will adversely affect reliability. 3

4 LMV32, LMV38, LMV V D ELETRIL HRTERISTIS (Unless otherwise specified, all limits are guaranteed for T = 2, V + = 2.7 V, R L = M, V = V, V O = V+/2) Parameter Symbol ondition Min Typ Max Unit Input Offset Voltage V IO T = 4 to mv Input Offset Voltage verage Drift IV OS T = 4 to +8 V/ Input Bias urrent I B T = 4 to +8 < n Input Offset urrent I IO T = 4 to +8 < n ommon Mode Rejection Ratio MRR V V M.7 V 63 db Power Supply Rejection Ratio PSRR 2.7 V V+ V, V O = V 6 db Input ommon Mode Voltage Range V M For MRR db to.7.2 to.9 V Output Swing V OH R L = k to.3 V V V mv V OL R L = k to.3 V (Note 2) 6 8 mv Supply urrent LMV32 LMV38 (Both mplifiers) LMV324 (4 mplifiers) I V ELETRIL HRTERISTIS (Unless otherwise specified, all limits are guaranteed for T = 2, V + = 2.7 V, R L = M, V = V, V O = V+/2) Parameter Symbol ondition Min Typ Max Unit Gain Bandwidth Product GBWP L = 2 pf MHz Phase Margin m 6 Gain Margin G m db Input Referred Voltage Noise e n f = khz nv/ Hz Product parametric performance is indicated in the Electrical haracteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical haracteristics if operated under different conditions. 2. Guaranteed by design and/or characterization. 4

5 LMV32, LMV38, LMV324. V D ELETRIL HRTERISTIS (Unless otherwise specified, all limits are guaranteed for T = 2, V + =. V, R L = M, V = V, V O = V+/2) Parameter Symbol ondition Min Typ Max Unit Input Offset Voltage V IO T = 4 to mv Input Offset Voltage verage Drift T V IO T = 4 to +8 V/ Input Bias urrent (Note 3) I B T = 4 to +8 < n Input Offset urrent (Note 3) I IO T = 4 to +8 < n ommon Mode Rejection Ratio MRR V V M 4 V 6 db Power Supply Rejection Ratio PSRR 2.7 V V+ V, V O = V, V M = V 6 db Input ommon Mode Voltage Range V M For MRR db to 4.2 to 4.2 V Large Signal Voltage Gain (Note 3) V R L = 2 k V/mV T = 4 to +8 Output Swing V OH R L = 2 k to 2. V T = 4 to +8 V 3 V 4 V 4 mv V OL R L = 2 k to 2. V (Note 3) T = 4 to mv V OH R L = k to 2. V (Note 3) T = 4 to +8 V V 2 mv V OL R L = k to 2. V T = 4 to mv Output Short ircuit urrent I O Sourcing = V O = V (Note 3) Sinking = V O = V (Note 3) 6 6 m Supply urrent I LMV32 T = 4 to LMV38 Both mplifiers T = 4 to LMV324 ll Four mplifiers T = 4 to V ELETRIL HRTERISTIS (Unless otherwise specified, all limits are guaranteed for T = 2, V + =. V, R L = M, V = V, V O = V+/2) Parameter Symbol ondition Min Typ Max Unit Slew Rate S R V/ s Gain Bandwidth Product GBWP L = 2 pf MHz Phase Margin m 6 Gain Margin G m db Input Referred Voltage Noise e n f = khz nv/ Hz Product parametric performance is indicated in the Electrical haracteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical haracteristics if operated under different conditions. 3. Guaranteed by design and/or characterization.

6 LMV32, LMV38, LMV324 TYPIL HRTERISTIS (T = 2 and V S = V unless otherwise specified) 2 7 GIN (db) Over 4 to +8 Same Gain.8 db (Typ) 2 k k k M M k k k M M FREQUENY (Hz) FREQUENY (Hz) PHSE MRGIN ( ) MRR (db) Figure 3. Open Loop Frequency Response (R L = 2 k, T = 2, V S = V) k k k FREQUENY (Hz) Figure. MRR vs. Frequency (R L = k, V S = V) MRR (db) Figure 4. Open Loop Phase Margin (R L = 2 k, T = 2, V S = V) V S = 2.7 V f = khz INPUT OMMON MODE VOLTGE (V) Figure 6. MRR vs. Input ommon Mode Voltage MRR (db) 6 V S = V f = khz PSRR (db) INPUT OMMON MODE VOLTGE (V) Figure 7. MRR vs. Input ommon Mode Voltage k k k M M FREQUENY (Hz) Figure 8. PSRR vs. Frequency (R L = k, V S = 2.7 V, +PSRR) 6

7 LMV32, LMV38, LMV324 TYPIL HRTERISTIS (T = 2 and V S = V unless otherwise specified) PSRR (db) k k k M M FREQUENY (Hz) Figure 9. PSRR vs. Frequency (R L = k, V S = 2.7 V, PSRR) PSRR (db) k k k M M FREQUENY (Hz) Figure. PSRR vs. Frequency (R L = k, V S = V, +PSRR) PSRR (db) k k k M M FREQUENY (Hz) Figure. PSRR vs. Frequency (R L = k, V S = V, PSRR) V OS (mv) V S = 2.7 V V M (V) Figure 2. V OS vs MR V OS (mv) V S =. V V M (V) Figure 3. V OS vs MR SUPPLY URRENT ( ) SUPPLY VOLTGE (V) Figure 4. Supply urrent vs. Supply Voltage 7

8 LMV32, LMV38, LMV324 TYPIL HRTERISTIS (T = 2 and V S = V unless otherwise specified) (%).. R L = k V out = V PP v = +. k k k (Hz) Figure. THD+N vs Frequency V OUT REFERENED TO V+ (V) Positive Swing SUPPLY VOLTGE (V) Figure 6. Output Voltage Swing vs Supply Voltage (R L = k) V OUT REFERENED TO V (V) Negative Swing SUPPLY VOLTGE (V) Figure 7. Output Voltage Swing vs Supply Voltage (R L = k) SINK URRENT (m) V OUT REFERENED TO V (V) Figure 8. Sink urrent vs. Output Voltage V S = 2.7 V 2 SINK URRENT (m) SOURE URRENT (m) V OUT REFERENED TO V (V) Figure 9. Sink urrent vs. Output Voltage V S =. V V OUT REFERENED TO V+ (V) Figure 2. Source urrent vs. Output Voltage V S = 2.7 V 8

9 LMV32, LMV38, LMV324 TYPIL HRTERISTIS (T = 2 and V S = V unless otherwise specified) SOURE URRENT (m) V OUT REFERENED TO V+ (V) Figure 2. Source urrent vs. Output Voltage V S =. V R L = 2 k V = mv/div 2 s/div Figure 22. Settling Time vs. apacitive Load R L = M V = mv/div 2 s/div mv/div 2 s/div Non Inverting (G = +) Input Output Figure 23. Settling Time vs. apacitive Load Figure 24. Step Response Small Signal mv/div 2 s/div Inverting (G = ) Input V/div 2 s/div Non Inverting (G = +) Input Output Output Figure 2. Step Response Small Signal Figure 26. Step Response Large Signal 9

10 LMV32, LMV38, LMV324 TYPIL HRTERISTIS (T = 2 and V S = V unless otherwise specified) V/div 2 s/div Inverting (G = ) Input Output Figure 27. Step Response Large Signal

11 LMV32, LMV38, LMV324 PPLITIONS k R. k V M43 R2 2. V LMV32 + V V O V O 2. V( R R2 ) V ref V ref 2 V k R V LMV32 + R V O f O 2 R For: f o =. khz R = 6 k =. F Figure 28. Voltage Reference Figure 29. Wien Bridge Oscillator V V ref R R2 + V OH V O Hysteresis V in R R2 R3 V ref LMV32 + O V O O = V in LMV32 V O V OL V inl V inh Given: f o = center frequency (f o ) = gain at center frequency V in L R R R2 V in H R R R2 H R R R2 V ref (V OL V ref) V ref (V OH V ref) V ref (V OH V OL ) Figure 3. omparator with Hysteresis hoose value f o, Then : R3 Q f O R R3 2(f O ) R R3 R2 4Q 2 R R3 For less than % error from operational amplifier, ((Q O f O )/BW) <. where f o and BW are expressed in Hz. If source impedance varies, filter may be preceded with voltage follower buffer to stabilize filter parameters. Figure 3. Multiple Feedback Bandpass Filter

12 LMV32, LMV38, LMV324 ORDERING INFORMTION Order Number Number of hannels Specific Device Marking Package Type Shipping LMV32SQ3T2G Single S 7 (Pb Free) 3 / Tape & Reel LMV32SN3TG Single 3 TSOP (Pb Free) LMV38DMR2G Dual V38 Micro8 (Pb Free) LMV38MUTG Dual UDFN8 (Pb Free) LMV38DR2G Dual V38 SOI 8 (Pb Free) LMV324DR2G Quad LMV324 SOI 4 (Pb Free) 3 / Tape & Reel 4 / Tape & Reel 3 / Tape & Reel 2 / Tape & Reel 2 / Tape & Reel LMV324DTBR2G Quad LMV 324 TSSOP 4 (Pb Free) 2 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D. 2

13 LMV32, LMV38, LMV324 PKGE DIMENSIONS S 88 (S 7 /SOT 33) SE 49 2 ISSUE L S G 4 B 2 3 D PL.2 (.8) M B M N NOTES:. DIMENSIONING ND TOLERNING PER NSI Y4.M, ONTROLLING DIMENSION: INH OBSOLETE. NEW STNDRD DIMENSIONS ND B DO NOT INLUDE MOLD FLSH, PROTRUSIONS, OR GTE BURRS. INHES MILLIMETERS DIM MIN MX MIN MX B D G.26 BS.6 BS H J K N.8 REF.2 REF S J H K SOLDER FOOTPRINT SLE 2: mm inches 3

14 LMV32, LMV38, LMV324 PKGE DIMENSIONS TSOP SE ISSUE K 2X 2X.2 NOTE T. B. T B H G TOP VIEW SIDE VIEW D X.2 B S SETING PLNE M K DETIL Z DETIL Z J END VIEW NOTES:. DIMENSIONING ND TOLERNING PER SME Y4.M, ONTROLLING DIMENSION: MILLIMETERS. 3. MXIMUM LED THIKNESS INLUDES LED FINISH THIKNESS. MINIMUM LED THIKNESS IS THE MINIMUM THIKNESS OF BSE MTERIL. 4. DIMENSIONS ND B DO NOT INLUDE MOLD FLSH, PROTRUSIONS, OR GTE BURRS. MOLD FLSH, PROTRUSIONS, OR GTE BURRS SHLL NOT EXEED. PER SIDE. DIMENSION.. OPTIONL ONSTRUTION: N DDITIONL TRIMMED LED IS LLOWED IN THIS LOTION. TRIMMED LED NOT TO EXTEND MORE THN.2 FROM BODY. MILLIMETERS DIM MIN MX 3. BS B. BS.9. D.2. G.9 BS H.. J..26 K.2.6 M S SOLDERING FOOTPRINT* SLE : mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 4

15 LMV32, LMV38, LMV324 PKGE DIMENSIONS Micro8 SE ISSUE J H E D E NOTES:. DIMENSIONING ND TOLERNING PER NSI Y4.M, ONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION DOES NOT INLUDE MOLD FLSH, PROTRUSIONS OR GTE BURRS. MOLD FLSH, PROTRUSIONS OR GTE BURRS SHLL NOT EXEED. (.6) PER SIDE. 4. DIMENSION B DOES NOT INLUDE INTERLED FLSH OR PROTRUSION. INTERLED FLSH OR PROTRUSION SHLL NOT EXEED.2 (.) PER SIDE OBSOLETE, NEW STNDRD PIN ID T SETING PLNE.38 (.) e b 8 PL.8 (.3) M T B S S c L MILLIMETERS INHES DIM MIN NOM MX MIN NOM MX b c D E e.6 BS.26 BS L H E REOMMENDED SOLDERING FOOTPRINT* 8X.48 8X PITH DIMENSION: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

16 LMV32, LMV38, LMV324 PKGE DIMENSIONS UDFN8.8x.2,.4P SE 7J ISSUE O. PIN ONE REFERENE D ÉÉ. TOP VIEW.. (b2) (L2) e/2 (3) SIDE VIEW 4 8 e BOTTOM VIEW B E DETIL 8X L SETING PLNE 8X b. M. M L B NOTE 3 DETIL NOTE 7X.22 NOTES:. DIMENSIONING ND TOLERNING PER SME Y4.M, ONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b PPLIES TO PLTED TERMINL ND IS MESURED BETWEEN. ND.3 mm FROM TERMINL TIP. 4. MOLD FLSH LLOWED ON TERMINLS LONG EDGE OF PKGE. FLSH MY NOT EXEED.3 ONTO BOTTOM SURFE OF TERMINLS.. DETIL SHOWS OPTIONL ONSTRUTION FOR TERMINLS. MILLIMETERS DIM MIN MX REF b..2 b2.3 REF D.8 BS E.2 BS e.4 BS L.4. L..3 L2.4 REF MOUNTING FOOTPRINT* SOLDERMSK DEFINED 8X PITH DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 6

17 LMV32, LMV38, LMV324 PKGE DIMENSIONS X B Y 8 4 S.2 (.) M Y SOI 8 NB SE 7 7 ISSUE K M K NOTES:. DIMENSIONING ND TOLERNING PER NSI Y4.M, ONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION ND B DO NOT INLUDE MOLD PROTRUSION. 4. MXIMUM MOLD PROTRUSION. (.6) PER SIDE.. DIMENSION D DOES NOT INLUDE DMBR PROTRUSION. LLOWBLE DMBR PROTRUSION SHLL BE.27 (.) TOTL IN EXESS OF THE D DIMENSION T MXIMUM MTERIL ONDITION THRU 7 6 RE OBSOLETE. NEW STNDRD IS 7 7. Z H G D.2 (.) M Z Y S X S SETING PLNE. (.4) N X 4 M SOLDERING FOOTPRINT* J MILLIMETERS INHES DIM MIN MX MIN MX B D G.27 BS. BS H J K M 8 8 N S SLE 6: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 7

18 LMV32, LMV38, LMV324 PKGE DIMENSIONS SOI 4 NB SE 7 3 ISSUE K H M B M e D 7 3X b B E.2 M S B S SETING PLNE L DETIL h X 4 M 3 DETIL NOTES:. DIMENSIONING ND TOLERNING PER SME Y4.M, ONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INLUDE DMBR PROTRUSION. LLOWBLE PROTRUSION SHLL BE.3 TOTL IN EXESS OF T MXIMUM MTERIL ONDITION. 4. DIMENSIONS D ND E DO NOT INLUDE MOLD PROTRUSIONS.. MXIMUM MOLD PROTRUSION. PER SIDE. MILLIMETERS INHES DIM MIN MX MIN MX b D E e.27 BS. BS H h L M 7 7 SOLDERING FOOTPRINT* 6. 4X.8.27 PITH 4X.8 DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 8

19 LMV32, LMV38, LMV324 PKGE DIMENSIONS. (.6) T. (.6) T L. (.4) T SETING PLNE U U S 2X L/2 PIN IDENT. S D 4 G 4X K REF V. (.4) M T U S V S 8 7 B U H N TSSOP 4 SE 948G ISSUE B N J J F DETIL E DETIL E.2 (.) K K M ÇÇÇ ÉÉÉ SETION N N W NOTES:. DIMENSIONING ND TOLERNING PER NSI Y4.M, ONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION DOES NOT INLUDE MOLD FLSH, PROTRUSIONS OR GTE BURRS. MOLD FLSH OR GTE BURRS SHLL NOT EXEED. (.6) PER SIDE. 4. DIMENSION B DOES NOT INLUDE INTERLED FLSH OR PROTRUSION. INTERLED FLSH OR PROTRUSION SHLL NOT EXEED.2 (.) PER SIDE.. DIMENSION K DOES NOT INLUDE DMBR PROTRUSION. LLOWBLE DMBR PROTRUSION SHLL BE.8 (.3) TOTL IN EXESS OF THE K DIMENSION T MXIMUM MTERIL ONDITION. 6. TERMINL NUMBERS RE SHOWN FOR REFERENE ONLY. 7. DIMENSION ND B RE TO BE DETERMINED T DTUM PLNE W. MILLIMETERS INHES DIM MIN MX MIN MX B D F G.6 BS.26 BS H J J K K L 6.4 BS.22 BS M 8 8 SOLDERING FOOTPRINT* PITH 4X.36 4X.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 9

20 LMV32, LMV38, LMV324 Micro8 is a trademark of International Rectifier. ON Semiconductor and the are registered trademarks of Semiconductor omponents Industries, LL (SILL) or its subsidiaries in the United States and/or other countries. SILL owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. listing of SILL s product/patent coverage may be accessed at /site/pdf/patent Marking.pdf. SILL reserves the right to make changes without further notice to any products herein. SILL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SILL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SILL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SILL does not convey any license under its patent rights nor the rights of others. SILL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SILL product could create a situation where personal injury or death may occur. Should Buyer purchase or use SILL products for any such unintended or unauthorized application, Buyer shall indemnify and hold SILL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SILL was negligent regarding the design or manufacture of the part. SILL is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLITION ORDERING INFORMTION LITERTURE FULFILLMENT: Literature Distribution enter for ON Semiconductor P.O. Box 63, Denver, olorado 827 US Phone: or Toll Free US/anada Fax: or Toll Free US/anada orderlit@onsemi.com N. merican Technical Support: Toll Free US/anada Europe, Middle East and frica Technical Support: Phone: Japan ustomer Focus enter Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative LMV32/D