A Framework to Simulate Semiconductor Devices Using Parallel Computer Architecture

Transcription

1 Journal o Physics: Conrnc Sris PAPER OPEN ACCESS A Framwork to Simulat Smiconductor Dvics Using Paralll Computr Architctur To cit this articl: Gaurav Kumar t al 2016 J. Phys.: Con. Sr Viw th articl onlin or updats and nhancmnts. Rlatd contnt - Th Tao o Microlctronics: pn-junction diod Y Zhang - Dvics that mak li modrn Michal Riordan - A quantum computr basd on rcombination procsss in microlctronic dvics K Thodoropoulos, D Ntalapras, I Ptras t al. This contnt was downloadd rom IP addrss on 28/12/2018 at 10:04

2 A Framwork to Simulat Smiconductor Dvics Using Paralll Computr Architctur Gaurav Kumar 1, Mandp Singh 1, Anand Bulusu 2, and Gaurav Trivdi 1 1 Dpt. o EEE, Indian Institut o Tchnology Guwahati, Assam , India 2 Dpt. o ECE, Indian Institut o Tchnology Roork, Uttarakhand , India gkumar2012@iitg.rnt.in Abstract. Dvic simulations hav bcom an intgral part o smiconductor tchnology to addrss many issus (short channl cts, narrow width cts, hot-lctron ct) as it gos into nano rgim, hlping us to continu urthr with th Moor s Law. TCAD provids a simulation nvironmnt to dsign and dvlop novl dvics, thus a lap orward to study thir lctrical bhaviour in advanc. In this papr, a paralll 2D simulator or smiconductor dvics using Discontinuous Galrkin Finit Elmnt Mthod (DG-FEM) is prsntd. Discontinuous Galrkin (DG) mthod is usd to discrtiz ssntial dvic quations and latr ths quations ar analyzd by using a suitabl mthodology to ind th solution. DG mthod is charactrizd to provid mor accurat solution as it icintly consrv th lux and asily handls complx gomtris. OpnMP is usd to parallliz solution o dvic quations on manycor procssors and a spd o 1.4x is achivd during assmbly procss o discrtization. This study is important or mor accurat analysis o novl dvics (such as FinFET, GAAFET tc.) on a paralll computing platorm and will hlp us to dvlop a paralll dvic simulator which will b abl to addrss this issu icintly. A cas study o PN junction diod is prsntd to show th ctivnss o proposd approach. 1. Introduction Th rcnt dvlopmnts o smiconductor tchnology is backd-up by Tchnology Comput Aidd Dsigns (TCAD), which plays a vital rol by providing an icint simulation nvironmnt to crat dsird utur dvics o dirnt gomtris and matrials. To approximatly prdict th lctrical bhaviour o a smiconductor dvic, TCAD implmnts various dvic physics, mathmatical modls such as Drit-Diusion, Hydrodynamics, Quantum Corrctd Boltzmann and Non-quilibrium Grns Function [1]. Ths modls consist o a numbr o partial dirntial quations (PDEs). Approximat solution o ths PDEs is computd using numrical tchniqus as it is impractical to gt analytical solution. Various discrtization mthods such as init dirnc (FDM), init volum (FVM) and init lmnt (FEM) ar availabl to obtain numrical solution o a PDE. Th advantags and disadvantags o ths mthods ar shown in Tabl 1. DG outprorms both FEM and FVM whil handling complx gomtris with highordr accuracy and local mass consrvation [2, 3]. In 1973, Rd and Hill [4] irst introducd DG mthod or hyprbolic quations. Latr, DG mthod has bn xtndd to dvlop dirnt mthods [2, 5, 6] or hyprbolic and narly hyprbolic problms. As pr our knowldg, DG-FEM is xplaind in litratur but has not bn implmntd as o now in any o th availabl dvic Contnt rom this work may b usd undr th trms o th Crativ Commons Attribution 3.0 licnc. Any urthr distribution o this work must maintain attribution to th author(s) and th titl o th work, journal citation and DOI. Publishd undr licnc by Ltd 1

3 simulators. In this papr, w prsnt a smi-paralll dvic simulator to analyz smiconductor dvics using DG-FEM as th discrtization schm. DG divids th whol gomtry into smallr init domains calld lmnt to ind numrical solution o PDEs. DG rquirs substantially lss inormation about th nighbouring lmnts making paralllization asir [7]. Th proposd dvic simulator is capabl o gnrating uniorm and non-uniorm msh throughout gomtry. Mor accurat solution is obtaind using non-uniorm mshing, with lss computation complxity as compard to dnsr msh throughout th gomtry. OpnMP [8] dirctivs ar usd to parallliz th solution o numrous algbraic quations on manycor procssors. Paralllization in th ramwork is implmntd during assmbly procss o DG-FEM. Tabl 1. Comparison o dirnt discrtization schms [2, 3]. Complx Gomtris High-Ordr Accuracy Local Mass Consrvation FDM FVM FEM DG-FEM Rst o th papr is organizd as ollows. In Sction 2, undamntal dvic quations or Drit-Diusion modl ar discussd. Sction 3 dscribs discontinuous Galrkin discrtization schm. Implmntation dtails and simulation rsults ar discussd in Sction 4. Sction 5 concluds th papr. 2. Formulation o Basic Dvic Equations: Drit-Diusion Modl Th lowchart to build ramwork or a dvic simulator is shown in Figur 1, which xplains th simulation procss [9] by incorporating svral dvic modls. Simulation procss is startd by procuring all th data rlatd to dvic gomtry, matrial paramtrs, doping proil and ncssary boundary conditions. Dvic gomtry (whol domain) is urthr dividd into smallr domains in ordr to solv PDEs locally to complt th procss o discrtization. Discrtization gnrats a msh throughout th whol gomtry to gt th solution ovr all nods. Thn charg is computd using an initial guss o solution. Calculatd charg is thn usd to itrativly solv Poisson s and Continuity quations until th solution convrgs to a pr-dind thrshold. Gumml s and Nwton-Raphson algorithm [9] is usd to implmntation both Poisson s and continuity quation. Currnt is calculatd at th nd o simulation procss or spciid input paramtrs. Th iv undamntal physics quations or Drit-Diusion modl to simulat smiconductor dvics ar as ollows: 2.1. Poisson s quation 2.2. Currnt quations ( ɛ φ) = ρ (1) whr ρ = q[p n + N d N a ] J n = qnµ n φ + qd n n (2) J p = qpµ p φ qd p p (3) 2

4 Start Stup Gomtry Initializ Data Discrtization Schm Msh Gnration Proprty Data Initial & Boundary Conditions Charg Computation Solv Poisson's Equation NO Chck or Convrgnc YES Currnt Calculation Collct Data Stop Figur 1. Procss low o a typical dvic simulator Continuity quations n t = 1 q J n + R n (4) p t = 1 q J p + R p (5) whr φ is potntial, µ is mobility, ρ is spac charg dnsity, D is diusion coicint, R is nt gnration and rcombination rat, n & p spciis lctron and hol dnsity in conduction and valanc band rspctivly, q is lctrostatic charg, N a is accptor concntration, N d is donor concntration, J is currnt dnsity, ɛ is dilctric prmittivity and t dnots tim. 3. Discontinuous-Galrkin Discrtization Schm DG mthod is a spcial cas o FEM, in which th basis unctions (usd or discrtization) ar discontinuous picwis polynomials. Discontinuous basis unctions ctivly handl intractions btwn lmnt boundaris, to achiv accurat and stabl rsults or nonlinar hyprbolic systms. Faturs lik, high paralllizability, as o handling complx gomtris, non-linar stability and highr ordr accuracy maks this discrtization schm mor considrabl. Th discontinuous basis unction with dgr o rdom (DOF) 1 and 2 ar as shown in Figur 2 and Figur 3 rspctivly. Th dirnc in basis unctions or FEM and DG-FEM is as shown in Figur 4 and Figur 5 rspctivly. DG-FEM basis unctions shows discontinuity at th nod point, whras FEM basis unctions ar continuous in natur. To showcas th implmntation o DG mthod, a gnric consrvation quation is considrd as ollows [2]: ũ t + g = 0 (6) 3

5 p = 0 basis (1 DOF/lmnt) p = 1 basis (2 DOF/lmnt) Figur 2. DG basis unction with on dgr o rdom pr lmnt. Figur 3. DG basis unction with two dgr o rdom pr lmnt. ^u 1 1 ^u 1 3 ϕ 0 1 (x) ϕ 1 1 (x) ϕ 0 3 (x) ϕ 1 3 (x) ^u 0 1 ^u 0 2 ^u 1 2 ^u 0 3 x 0 =0 x 1 x 2 x n =1 Figur 4. Basis unction as usd in init lmnt mthod. x 0 =0 x 1 x 2 x n =1 Figur 5. Basis unction as usd in DG init lmnt mthod. Multiplying (6) by a basis unction and intgrating ovr th whol domain (Ω), Ω t dv + v gdv = 0, v Φ (7) Ω = t dv + ( ) v gdv + v g nds (8) For th icint consrvation o lux on th boundary, two dirnt oprators (Jump and Avrag) ar dind w.r.t. normal n + = n = n (+ and dnots outlow and inlow rspctivly), Jump oprator : [v] xk = v Ik (x k ) v Ik+1 (x k ) Avrag oprator : {v} xk = 1 2 (v I k (x k ) + v Ik+1 (x k )) (9) Applying (9) in (8), = t dv v gdv + [v]{ g} + [ g]{v}ds (10) DG discrtization is thn dind as, t v gdv + γ(ũ +, ũ, v +, v, n)ds = 0, v Φ (11) Th unction paramtr, γ is rquird to hav ollowing proprtis: i) stability, ii) consistnt as u + = u = ũ, and iii) consrvativ as wight, W = 1 x, W = 0 x /. 4

6 Th global ormulation using DG-FEM or quation (6) is, t v gdv + γ(ũ +, ũ, v +, v, n)ds = 0, v Φ (12) Global solution o (6) can b writtn as th summation o local solution o ach individual lmnt: u = u (13) Th ormulation thus rducs to lmnt-wis FEM problm, coupld by intrnal boundary conditions. Nxt sction prsnts implmntation dtails o ramwork and simulation rsults. 4. Implmntation Dtails and Simulation Rsults A ramwork to simulat smiconductor dvics basd on DG-FEM is prsntd in this papr, which is capabl o simulating 2D dvic gomtris incorporating iv undamntal dvic quations rom Drit-Diusion modl. Discrtization procss divids whol gomtry into various small lmnts, which lads to th ormation o a msh lik structur through out gomtry in such a way that no two lmnts ovrlap ach othr. Proposd simulator has th lxibility to slct lmnts o dirnt siz and shap, capabl o gnrating both uniorm and non-uniorm msh. Triangular lmnts hav bn chosn in our simulator to discrtiz 2D gomtry, although th modul usd in our proposd dvic simulator supports linar, triangular and quadrilatral basis unctions as wll. Th choic o triangular lmnts hlpd us to prov th ctivnss o th mthods chosn to analyz smiconductor dvics corrctly. Fastr and mor accurat rsults hav bn obtaind by using non-uniorm msh with rspct to dnsr uniorm msh. Paralllization in simulator has also bn achivd during th assmbly procss o DG-FEM whil constructing a global matrix rom discrt lmnt quations. OpnMP dirctivs hav bn usd or paralllization and a spdup o 1.4x has bn obtaind by using Dll Prcision T7610 having QuadCor procssor and 16GB RAM. Futur work on th paralllizing o solution o global matrix would improv th prormanc o our proposd dvic simulator. To showcas th ctivnss o proposd simulator, rsults or a PN junction diod ar validatd with TCAD dvic simulator Sntaurus [10] and prsntd as ollows PN Junction Diod Dirnt paramtrs usd to simulat a silicon basd PN junction diod ar shown in Tabl 2. Tabl 2. Various dvic paramtrs usd or a PN diod. Paramtrs Valu Lngth o P-rgion 30 µm Lngth o N-rgion 70 µm Doping Proil: N a, N d cm 3 Hol Mobility: µ p 480 cm 2 /V s Elctron Mobility: µ n 1350 cm 2 /V s Tmpratur: T 300 K Figur 6 and Figur 7 shows th ormation o uniorm and non-uniorm msh or a PN junction diod rspctivly. Dnsr msh nar th junction is cratd in ordr to achiv highr accuracy. Potntial proil insid a diod at thrmal quilibrium is shown in Figur 8. Built-in potntial o a PN junction diod is ound to b approximatly 0.67V. Total currnt dnsity or a orward bias voltag is as shown in Figur 9. Our simulator also supports complx gomtris (FinFET, GAAFET) and th analysis o ths dvics with a dtaild study o physical phnomnon will b prsntd in our utur manuscripts. 5

7 P-Sid N-Sid Figur 6. Uniorm msh ovr PN junction diod. 0 P-Sid N-Sid Figur 7. Non-uniorm msh ovr PN junction diod I-V charactristics o a PN Diod Currnt (A) Potntial Proil Voltag (V) Figur 8. Potntial proil o a 2D PN junction diod at quilibrium. Figur 9. Forward biasd currnt-voltag charactristics o a PN junction diod. 5. Conclusion A paralllizd and accurat DG basd two-dimnsional dvic simulator is prsntd in this papr to simulat smiconductor dvics. Procss low o a typical dvic simulator and various discrtization schms to obtaind th numrical solution o a dvic physics modls has bn discussd. Th proposd ramwork uss discontinuous Galrkin init lmnt mthod to discrtiz PDEs o Drit-Diusion modl. DG mthod provids high paralllizability, asy handl o complx gomtris, non-linar stability and highr ordr accuracy as compard to othr discrtization schms. To achiv astr and accurat rsults, it is imprativ to tak advantag o currnt manycor computing architctur. Paralllization in th ramwork is achivd using OpnMP to produc 1.4x astr rsults as compard to srial computation. Simulation rsults or a PN diod has bn prsntd to showcas th ctivnss o proposd ramwork. Rrncs [1] M. Pourath, V. Svrdlov, and S. Slbrhrr. Transport modling or nanoscal smiconductor dvics. In Solid-Stat and Intgratd Circuit Tchnology (ICSICT), th IEEE Intrnational Conrnc on, pags , Nov [2] Shu CW. Cockburn B, Karniadakis GE. Discontinuous Galrkin Mthods: Thory, Computation and Applications. Springr-Vrlag:Brlin, [3] W. Fichnr R.E. Bank, D.J. Ros. Numrical mthods or smiconductor dvic simulation. ZEEE Trans. Elctron. Dv., 7th dition, [4] W.H. Rd and T.R. Hill. Triangular msh mthods or th nutron transport quation. Oct [5] B. Rivir. Discontinuous Galrkin Mthods or Solving Elliptic and Parabolic Equations. Socity or Industrial and Applid Mathmatics, [6] Z. Liu and H. Chn. Discontinuous galrkin immrs init volum lmnt mthod or lliptic intrac problms. In Inormation Scinc and Tchnology (ICIST), th IEEE Intrnational Conrnc on, pags , April [7] Y. Chng, M. G. Irn, A. Majorana, and C. W. Shu. Prormanc o a discontinuous galrkin solvr or smiconductor boltzmann quations. In Computational Elctronics (IWCE), th Intrnational Workshop on, pags 1 4, Oct [8] [9] S. Slbrhrr. Analysis and Simulation o Smiconductor Dvics. Springr-Vrlag Win, [10] Synopsys. Tchnology computr aidd dsign