Overview. Real-World Pipelines: Car Washes. Computational Example. 3-Way Pipelined Version. Pipeline Diagrams

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Ovrviw omputr rchitctur: Piplind Implmntation I Sci 2021: achin rchitctur and Oranization Lctur #20, arch 7th-9th, 2016 Your instructor: Stphn camant Gnral Principls of Piplinin Goal ifficultis ratin

omputational xampl Squntial Paralll 300 ps 20 ps ombinational loic lay = 320 ps Throuhput = 3.

picosconds to sav rsult in ristr ust hav clock cycl of at last 320 ps 4 S:PP3 3-ay Piplind Vrsion 100 ps 20 ps 100 ps 20 ps 100 ps 20 ps Piplin iarams Unpiplind loic loic loic lay = 360 ps Throuhput

1 Ovrviw omputr rchitctur: Piplind Implmntation I Sci 2021: achin rchitctur and Oranization Lctur #20, arch 7th-9th, 2016 Your instructor: Stphn camant Gnral Principls of Piplinin Goal ifficultis ratin a Piplind Y86-64 Procssor arranin SQ Insrtin piplin ristrs Problms with data and control hazards asd on slids oriinally by: andy ryant and av O Hallaron 1 S:PP3 2 S:PP3 al-orld Piplins: ar ashs omputational xampl Squntial Paralll 300 ps 20 ps ombinational loic lay = 320 ps Throuhput = 3.12 GIPS Piplind Ida ivid procss into indpndnt stas ov objcts throuh stas in squnc t any ivn tims, multipl objcts bin procssd 3 S:PP3 Systm omputation rquirs total of 300 picosconds dditional 20 picosconds to sav rsult in ristr ust hav clock cycl of at last 320 ps 4 S:PP3 3-ay Piplind Vrsion 100 ps 20 ps 100 ps 20 ps 100 ps 20 ps Piplin iarams Unpiplind loic loic loic lay = 360 ps Throuhput = 8.33 GIPS OP1 Tim Systm ivid combinational loic into 3 blocks of 100 ps ach an bin nw opration as soon as prvious on passs throuh sta. in nw opration vry 120 ps Ovrall latncy incrass 360 ps from start to finish annot start nw opration until prvious on complts 3-ay Piplind OP1 Tim Up to 3 oprations in procss simultanously 5 S:PP3 6 S:PP3

2 Opratin a Piplin OP Tim 100 ps 20 ps 100 ps 20 ps 100 ps 20 ps loic loic loic 7 S:PP3 Limitations: Nonuniform lays ps 20 ps loic OP1 loic Tim Throuhput limitd by slowst sta Othr stas sit idl for much of th tim hallnin to partition systm into balancd stas loic 8 S:PP3 lay = 510 ps Throuhput = 5.88 GIPS Limitations: istr Ovrhad ata pndncis loic loic loic loic loic loic ombinational loic lay = 420 ps, Throuhput = GIPS s try to dpn piplin, ovrhad of loadin ristrs bcoms mor sinificant Prcnta of clock cycl spnt loadin ristr: 1-sta piplin: 6.25% 3-sta piplin: 16.67% 6-sta piplin: 28.57% Hih spds of modrn procssor dsins obtaind throuh vry dp piplinin 9 S:PP3 Systm OP1 Tim ach opration dpnds on rsult from prcdin on 10 S:PP3 ata Hazards ata pndncis in Procssors 1 irmovq $50, %rax loic loic loic 2 addq %rax, %rbx 3 mrmovq 100( %rbx ), %rdx OP1 OP4 Tim sult dos not fd back around in tim for nxt opration Piplinin has chand bhavior of systm sult from on instruction usd as oprand for anothr ad-aftr-writ () dpndncy Vry common in actual prorams ust mak sur our piplin handls ths proprly Gt corrct rsults inimiz prformanc impact 11 S:PP3 12 S:PP3

SQ Hardwar Stas occur in squnc On opration in procss at a tim 13 S:PP3 SQ+ Hardwar Still squntial implmntation ordr P sta

P is no lonr stord in ristr ut, can dtrmin P basd on othr stord information 14 S:PP3 ddin Piplin istrs P rit back mory xcut

P incrmnt LU val, val istr fil 15 S:PP3 Piplin Stas Ftch Slct currnt P ad instruction omput incrmntd P cod ad proram ristrs

from instruction xcution Forward (Upward) Paths Valus passd from on sta to nxt annot jump past stas.

3 SQ Hardwar Stas occur in squnc On opration in procss at a tim 13 S:PP3 SQ+ Hardwar Still squntial implmntation ordr P sta to put at binnin P Sta Task is to slct P for currnt instruction asd on rsults computd by prvious instruction Procssor Stat P is no lonr stord in ristr ut, can dtrmin P basd on othr stord information 14 S:PP3 ddin Piplin istrs P rit back mory xcut cod Ftch icod, ifun r, r val Instruction mmory P nwp val, val ddr, ata nd alu, alu src, src dst, dst val ata mmory valp val P incrmnt LU val, val istr fil 15 S:PP3 Piplin Stas Ftch Slct currnt P ad instruction omput incrmntd P cod ad proram ristrs xcut Oprat LU mory ad or writ data mmory rit ack Updat ristr fil 16 S:PP3 PIP- Hardwar Piplin ristrs hold intrmdiat valus from instruction xcution Forward (Upward) Paths Valus passd from on sta to nxt annot jump past stas.., val passs throuh dcod Sinal Namin onvntions S_Fild Valu of Fild hld in sta S piplin ristr s_fild Valu of Fild computd in sta S 17 S:PP3 18 S:PP3

Fdback Paths Prdictd P Guss valu of nxt P ranch information Jump takn/not-takn Fall-throuh or tart addrss turn point ad from mmory istr updats To ristr fil writ ports 19 S:PP3 Prdictin th P Start

4 Fdback Paths Prdictd P Guss valu of nxt P ranch information Jump takn/not-takn Fall-throuh or tart addrss turn point ad from mmory istr updats To ristr fil writ ports 19 S:PP3 Prdictin th P Start ftch of nw instruction aftr currnt on has compltd ftch sta Not nouh tim to rliably dtrmin nxt instruction Guss which instruction will follow covr if prdiction was incorrct 20 S:PP3 Our Prdiction Straty Instructions that on t Transfr ontrol Prdict nxt P to b valp lways rliabl all and Unconditional Jumps Prdict nxt P to b val (dstination) lways rliabl onditional Jumps Prdict nxt P to b val (dstination) Only corrct if branch is takn Typically riht 60% of tim turn Instruction on t try to prdict 21 S:PP3 covrin from P isprdiction isprdictd Jump ill s branch condition fla onc instruction rachs mmory sta an t fall-throuh P from val (valu _val) turn Instruction ill t rturn P whn rt rachs writ-back sta (_val) 22 S:PP3 Piplin monstration irmovq $1,%rax #I1 Fil: dmo-basic.ys F irmovq $2,%rcx #I2 F irmovq $3,%rdx #I3 F irmovq $4,%rbx #I4 F halt #I5 F F I5 23 S:PP3 ycl 5 I1 I2 I3 I4 ata pndncis: 3 Nop s # dmo-h3.ys F 0x00a: irmovq $3,%rax F 0x014: nop F 0x015: nop F 0x016: nop F 0x017: addq %rdx,%rax F 0x019: halt F ycl 6 val f[%rdx] = val f[%rax] S:PP3 = 3 [%rax] f3 ycl

5 ata pndncis: 2 Nop s # dmo-h2.ys F 0x00a: irmovq $3,%rax F 0x014: nop F 0x015: nop F 0x016: addq %rdx,%rax F 0x018: halt F ycl 6 25 S:PP3 [%rax] f3 val f[%rdx] = 10 val f[%rax] = 0 rror 10 ata pndncis: 1 Nop # dmo-h1.ys F 0x00a: irmovq $3,%rax F 0x014: nop F 0x015: addq %rdx,%rax F 0x017: halt F rror val f[%rdx] = 0 26 val f[%rax] = 0 S:PP3 ycl 5 [%rdx] f10 _val = 3 _dst = %rax ata pndncis: No Nop # dmo-h0.ys F 0x00a: irmovq $3,%rax F 0x014: addq %rdx,%rax 0x016: halt F F ycl 4 _val = 10 _dst = %rdx _val f0 + 3 = 3 _dst = %rax val f[%rdx] = 0 val f[%rax] = 0 rror ranch isprdiction xampl dmo-j.ys 0x000: xorq %rax,%rax 0x002: jn t # Not takn 0x00b: irmovq $1, %rax # Fall throuh 0x015: nop 0x016: nop 0x017: nop 0x018: halt 0x019: t: irmovq $3, %rdx # Tart (Should not xcut) 0x023: irmovq $4, %rcx # Should not xcut 0x02d: irmovq $5, %rdx # Should not xcut Should only xcut first 8 instructions 27 S:PP3 28 S:PP3 ranch isprdiction Trac turn xampl dmo-rt.ys # dmo-j x000: irmovq Stack,%rsp # Intializ stack pointr 0x000: xorq %rax,%rax F 0x00a: nop # void hazard on %rsp 0x002: jn t # Not takn F 0x00b: nop 0x019: t: irmovq $3, %rdx # Tart F 0x00c: nop 0x023: irmovq $4, %rcx # Tart+1 F 0x00d: call p # Procdur call 0x00b: irmovq $1, %rax # Fall Throuh F 0x016: irmovq $5,%rsi # turn point 0x020: halt ycl 5 0x020:.pos 0x20 0x020: p: nop # procdur Incorrctly xcut two _nd = 0 0x021: nop instructions at branch tart _val = 0x007 0x022: nop 0x023: rt 0x024: irmovq $1,%rax # Should not b xcutd val f 3 0x02: irmovq $2,%rcx # Should not b xcutd dst = %rdx 0x038: irmovq $3,%rdx # Should not b xcutd 0x042: irmovq $4,%rbx # Should not b xcutd val = 4 0x100:.pos 0x100 dst = %cx %rcx 0x100: Stack: # Initial stack pointr F quir lots of nops to avoid data hazards val f 1 29 r f %rax S:PP3 30 S:PP3

6 Incorrct turn xampl # dmo-rt 0x023: rt F 0x024: irmovl $1,%rax # Oops! F 0x02a: irmovl $2,%rcx # Oops! F 0x030: irmovl $3,%rdx # Oops! F 0x00: irmovl $5,%rsi # turn F Incorrctly xcut 3 instructions followin rt val f 5 31 S:PP3 r f %si %rsi val = 0x0 val = 1 dst = %ax %rax val f 2 dst = %cx %rcx val = 3 dst = %dx %rdx F Piplin Summary oncpt rak instruction xcution into 5 stas un instructions throuh in piplind mod Limitations an t handl dpndncis btwn instructions whn instructions follow too closly ata dpndncis On instruction writs ristr, latr on rads it ontrol dpndncy Instruction sts P in way that piplin did not prdict corrctly isprdictd branch and rturn Fixin th Piplin ll do that nxt tim 32 S:PP3

Idea Divide process into independent stages Move objects through stages in sequence At any given Fmes, mulfple objects being processed

Idea Divide process into independent stages Move objects through stages in sequence At any given Fmes, mulfple objects being processed Ovrviw omputr rchitctur Piplin Implmntation Part I SI 2021: achin rchitctur and OranizaFon Pn- hun Yw partmnt omputr Scinc and ninrin Gnral Principls of Piplinin Goal ifficulfs rafn a Piplind Y86-64 Procssor