On the Design and Application of Thermal Isolation Servers

Transcription

1 On the Design and Application of Thermal Isolation Servers Rehan Ahmed, Pengcheng Huang, Max Millen, Lothar Thiele EMSOFT 2017 October 16, /25

2 2/25 The Temperature Problem 1 1 Extremetech: 2 CPU DB: Recording Microprocessor History : 3 TECHPOWERUP:

3 2/25 The Temperature Problem Extremetech: 2 CPU DB: Recording Microprocessor History : 3 TECHPOWERUP:

4 2/25 The Temperature Problem Extremetech: 2 CPU DB: Recording Microprocessor History : 3 TECHPOWERUP:

5 2/25 The Temperature Problem Deadline miss 1 Extremetech: 2 CPU DB: Recording Microprocessor History : 3 TECHPOWERUP:

6 2/25 The Temperature Problem Deadline miss τ τ 1 s deadline 1 Extremetech: 2 CPU DB: Recording Microprocessor History : 3 TECHPOWERUP:

7 2/25 The Temperature Problem Deadline miss τ 2 τ τ 1 s deadline 1 Extremetech: 2 CPU DB: Recording Microprocessor History : 3 TECHPOWERUP:

8 2/25 The Temperature Problem Deadline miss DTM τ 2 τ 1 τ τ 1 s deadline 1 Extremetech: 2 CPU DB: Recording Microprocessor History : 3 TECHPOWERUP:

9 3/25 Multicore Makes Things Harder 1. Inter core thermal interactions. Core 0 Core 1 τ 2 DTM Core 2 Core 3 τ

10 3/25 Multicore Makes Things Harder 1. Inter core thermal interactions. Core 0 Core 1 τ 2 DTM Core 2 Core 3 τ Rise/fall in temperature may be non-monotonic. Core 0 25 Core 2 25 Core 1 25 Core 3 25 time C0 Temperature

11 3/25 Multicore Makes Things Harder 1. Inter core thermal interactions. Core 0 Core 1 τ 2 DTM Core 2 Core 3 τ Rise/fall in temperature may be non-monotonic. Core 0 25 Core 2 25 Core 1 25 Core 3 25 Core 0 50 Core 2 0 Core 1 0 Core 3 0 time C0 Temperature

12 4/25 Mixed-Criticality Complicates Problem Further LO DTM HI Task that heats up the processor may be low criticality. Task that suffers due to deadline violation may be high criticality. Certification demands isolation.

13 5/25 Related Research Unicore: Wang and Bettati (2006), Chen, Wang, and Thiele (2009), Kumar and Thiele (2011), M. Ahmed et al. (2011). Multicore: Chantem, Dick, and Hu (2011), Fisher et al. (2009), R. Ahmed, Ramanathan, and Saluja (2016). Temperature bounding: Schor, Bacivarov, et al. (2012) and Schor, Yang, et al. (2011)

14 5/25 Related Research Unicore: Wang and Bettati (2006), Chen, Wang, and Thiele (2009), Kumar and Thiele (2011), M. Ahmed et al. (2011). Multicore: Chantem, Dick, and Hu (2011), Fisher et al. (2009), R. Ahmed, Ramanathan, and Saluja (2016). Temperature bounding: Schor, Bacivarov, et al. (2012) and Schor, Yang, et al. (2011) Common limitations: 1. No schemes proposed for mixed-critical applications. 2. Current schemes solve the temperature minimization problem, NOT the temperature isolation problem.

15 6/25 Contributions 1. Propose Thermal Isolation Servers Provide thermal isolation by construction. Can bound the temperature increase caused by a set of tasks. Time and space composable. Can schedule tasks based on both dynamic and fixed priority. 2. Validated on a hardware platform. Mixed-critical flight management system.

16 7/25 Thermal Model Fundamentals to upper layer to upper layer R 12 =R 21 R 23 =R 32 T 1 T 2 T 3 1/K 11 1/K 22 1/K 33 T A C 11 P 1 T A C T A 22 P 2 C 33 P 3 Model T (t) = A T (t) + B(t) Where A = C 1 (G + φ K) and B(t) = C 1 (K T A + ψ(t)) Steady state T (B(0)) = A 1 B(0) Thermal model solution T (t) = e A t (T (0) T (B(0)) + T (B(0))

17 8/25 Thermal Component Based Analysis Thermal component Θ(t, z): Temperature increase caused by a given execution. z st z e z cr z

18 8/25 Thermal Component Based Analysis Thermal component Θ(t, z): Temperature increase caused by a given execution. z st z e z cr z Temperature ( C) Cooling component Θ(t, z 1) τ Θ(t, z 2) Time (sec) = τ 2 = Overall temperature Core Core

19 9/25 Thermal Isolation Servers A given Thermal Isolation Server (TIS) S i is a statically scheduled periodic resource characterized by the following attributes: P i = 3 U i P i = 2 φ i = P i : Period 2. U i : Utilization 3. φ i : Phase 4. cr i : Core where S i is executed. Also called self core 5. Π i : Taskset assigned to S i 6. Λ i : Thermal budget. Function of Pi, U i and cr i

20 10/25 TIS Temperature Guarantees Thermal budget increases with Utilization. Thermal budget increases with Period. Fluid server is optimal. Server period is infinitesimally small. Not practical. Λ i 1 ( C) Ui Pi (s)

21 Temperature 10/25 TIS Temperature Guarantees Thermal budget increases with Utilization. Thermal budget increases with Period. Fluid server is optimal. Server period is infinitesimally small. Not practical. Schedule 1 Schedule 2 Fluid Λ i 1 ( C) Ui Pi (s) Time Schedule 2 Schedule 1 Time

22 11/25 TIS Temperature Guarantees Augmented Utilization: U i (ɛ) = max(p i U i ɛ, 0) P i

23 11/25 TIS Temperature Guarantees Augmented Utilization: U i (ɛ) = max(p i U i ɛ, 0) P i Augmented Utilization Λ i i = 5 C ɛ = 0 ɛ = 10µs ɛ = 50µs ɛ = 100µs Period (s) Maximum utilization point is non-zero. Favor high period servers when ɛ is large and vice-versa.

24 12/25 TIS Timing Guarantees Supply Bound Function of TIS: sbf(s i, l, ɛ) = l/p i P i U i (ɛ) + max {l P i (1 U i (ɛ)) l/p i P i, 0} Demand Bound Function dbf EDF (Π, l) = τ j Π max {( (l D j )/W j + 1) E j, 0} 4 3 sbf(s i, l, ɛ) dbf EDF ({τ j }, l) U i(ɛ)p i = P i = 2 1 E j = 0.8 D j = W j = 2.0 l

25 13/25 Composability of Servers Theorem 5.8: Given n TISs, the maximum temperature increase due to their execution is upper bounded by: 1 i n Λ i Temporal composability Spacial composability S 2 S 1 S 2 S Restrictive due to same period. Possibly better to have one larger server. S 1 S 1 S 2 S No same period restriction. Servers can be designed independently.

26 14/25 Design heuristic taskset partition tasks Partitioned tasks Search TISs TIS configurations MILP formulation: Minimize maximum temperature for period = 0. Utilization of each core is 1. For each core, search TIS such that: Conditions for timing feasibility are satisfied. Termal budget is minimized. Schedule

27 15/25 Setup: Evaluation Tasks: Synthetically generated, harmonic, implicit deadline periodic tasks. Platform: 8 mm Core0 Core1 Core2 Core3 8 mm Scheduling schemes: Parameter ψ active ψ idle φ T A Value 70 W 20 W zero matrix 25 C WF_EDF_x: Tasks partitioned using worst-fit bin packing. EDF scheduling used. x specifies the preemption overhead in µs. Opt_TIS_x: Tasks are scheduled using TISs. x is the server overhead (ɛ) in µs. EDF used within server active time.

28 16/25 Evaluation 1.00 Schedulability Opt TIS 0 Opt TIS 20 Opt TIS 50 WF EDF Utilization Thermal isolation has low cost. May even improve schedulability!!

29 17/25 Emulation Platform: Lenovo Thinkpad T440p (Core i7-4700mq quad-core processor). Operating frequency of all cores set to max (3.2 GHz). Fan speed set to max. OS: Ubuntu with preempt-rt. Augmented SF3P[Sigrist et al. (2015)] scheduling framework. Thermal constraint = 70 C 4 4

30 18/25 Emulation Application: Flight management system: Purpose CL # P(ms)E (ms) Sensor data acquisition HI HI Localization HI HI Flight-plan HI management LO HI HI Flight-plan HI computation HI HI HI Guidance HI Nearest AirportLO How to design TISs So that there is no thermal violation? How to guarantee this? 5

31 18/25 Emulation Application: Flight management system: Purpose CL # P(ms)E (ms) Sensor data acquisition HI HI Localization HI HI Flight-plan HI management LO HI HI Flight-plan HI computation HI HI HI Guidance HI Nearest AirportLO C0 SF3P C1 LO EDF C2 HI TIS C3 HI TIS How to design TISs So that there is no thermal violation? How to guarantee this? 5

32 19/25 Emulation Step 1: Determine the available thermal budget for TISs Perform thermal callibration tests to determine the peak temperature caused by execution of LO tasks on core 1 (T LO ). Available thermal budget: T T LO = [16, 28.88, 27.4]

33 19/25 Emulation Step 1: Determine the available thermal budget for TISs Perform thermal callibration tests to determine the peak temperature caused by execution of LO tasks on core 1 (T LO ). Available thermal budget: T T LO = [16, 28.88, 27.4] Step 2: Determine the thermal model Steady state: Directly from calibration tests. Transient: Estimating the temperature transfer function.

34 19/25 Emulation Step 1: Determine the available thermal budget for TISs Perform thermal callibration tests to determine the peak temperature caused by execution of LO tasks on core 1 (T LO ). Available thermal budget: T T LO = [16, 28.88, 27.4] Step 2: Determine the thermal model Steady state: Directly from calibration tests. Transient: Estimating the temperature transfer function. Step 3: Design TISs Partition HI tasks to cores 2 and 3 Search for servers Verify that total budget is less than T T LO.

35 20/25 Emulation Worst-Fit with EDF Temperature ( C) Core Core Time (sec) Core Thermal constraint is violated!

36 21/25 Emulation Temperature ( C) Core 1 70 bound= Our Aproach Core 2 bound= Time (sec) Core 3 bound= S 1 : P 1 = 10ms, U 1 = 0.693, cr 1 = 2, Λ 1 = [6.42, 14.62, 5.69] S 2 : P 1 = 10ms, U 1 = 0.546, cr 2 = 3 Λ 2 = [3.75, 5.90, 14.24] Bound = T LO + Λ 1 + Λ 2

37 22/25 Takeaways... Proposed a TISs which provide thermal isolation on a multicore by construction. Temporal and spacial composability. Static or dynamic priority scheduling. Proposed a heuristic to approach to design TISs. Schedulability cost of providing thermal isolation is small. Emulated the TIS on a hardware platform to validate theory.

38 Questions?? 23/25

39 24/25 Backup 1 Following three calibration tests are performed: 1. Test1: Core 1 executing LO using EDF. Cores 2 and 3 idle. 2. Test2: Core 1 executing LO using EDF. Cores 2, 3 active. 3. Test3: Core 1 always idle. Cores 2 and 3 active. T [ P 99.9(T (t, Test1)) 1 P 99.9(T (t, Test2)) 2 P 99.9(T (t, Test3)) 2 + [T (B idle )] 2 P 99.9(T (t, Test2)) 3 P 99.9(T (t, Test3)) 3 + [T (B idle )] 3 ] = [ ]

40 25/25 Backup core-i7-2600k-i5-2500k-core-i tested