The Design and Realization of a Hyper-Chaotic Circuit Based on a Flux-Controlled Memristor with Linear Memductance

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1 See discussions, stats, and author profiles for this publication at: The Design and Realiation of a Hper-Chaotic Circuit Based on a Flu-Controlled Memristor with Linear Memductance Article in Journal of Circuits, Sstems and Computers March 218 DOI: /S X CITATIONS 2 READS 38 3 authors, including: Chunhua Wang Hunan Universit 167 PUBLICATIONS 792 CITATIONS SEE PROFILE Some of the authors of this publication are also working on these related projects: chaos generation and circuit realiation View project time-dela chaotic sstem View project All content following this page was uploaded b Chunhua Wang on 13 September 218. The user has requested enhancement of the downloaded file.

2 Journal of Circuits, Sstems, and Computers Vol. 27, No. 3 (218) (17 pages) #.c World Scienti c Publishing Compan DOI: /S X The Design and Realiation of a Hper-Chaotic Circuit Based on a Flu-Controlled Memristor with Linear Memductance Chunhua Wang, Ling Zhou and Renping Wu College of Information Science and Engineering, Hunan Universit, Changsha 4182, P. R. China wch @hnu.edu.cn @qq.com @qq.com Received 3 December 215 Accepted 6 June 217 Published 7 Jul 217 In this paper, a u-controlled memristor with linear memductance is proposed. Compared with the memristor with piecewise linear memductance and the memristor with smooth continuous nonlinearit memductance which are widel used in the stud of memristive chaotic sstem, the proposed memristor has simple mathematical model and is eas to implement. Multisim circuit simulation and breadboard eperiment are realied, and the memristor can ehibit a pinched hsteresis loop in the voltage current plane when driven b a periodic voltage. In addition, a new hper-chaotic sstem is presented in this paper b adding the proposed memristor into the Loren sstem. The transient chaos and multiple attractors are observed in this memristive sstem. The dnamical behaviors of the proposed sstem are analed b equilibria, Lapunov eponents, bifurcation diagram and phase portrait. Finall, an electronic circuit is designed to implement the hper-chaotic memristive sstem. Kewords: Memristor; emulator; hper-chaotic; electronic circuit. 1. Introduction From the circuit-theoretic point of view, there are four fundamental circuit variables, namel, current i, the voltage v, charge q and u-linkage. Three relationships are given, respectivel, b the aiomatic de nition of the three classical circuit elements, namel, the resistor (de ned b a relationship between v and iþ, the inductor (de ned b a relationship between and iþ, and the capacitor (de ned b a relationship between q and vþ. In 1971, Chua 1 postulated the eistence of a fourth basic two-terminal circuit element called the memristor, which de ned b a *This paper was recommended b Regional Editor Emre Salman. Corresponding author

3 C. Wang, L. Zhou & R. Wu relationship between charge q and u-linkage. In 28, Strukov and others in HP lab 2,3 using nanoscale technolog rstl fabricated a phsical memristor, which is a two-terminal electrical device based on TiO2 material. Thus, the memristor's place as the fourth fundamental circuit element was cemented. Memristor, as the fourth fundamental circuit element, with memor and nonlinear characteristics, has potential application in those elds: arti cial intelligence, nonvolatile impedance memor, eld programmable gate arra, neural network and spin electronic devices. 4 1 In addition, memristor, which is a nonlinear element with small sie and low power consumption, is a good choice for the stud of chaotic circuit. More and more chaotic circuits based on memristor have been proposed since the rst memristor-based chaotic circuit was proposed b Itoh and Chua 11 in 28. After reading these literatures, we nd that almost all memristive chaotic sstems are based on the memristor with piecewise linear memductance or based on the memristor with smooth continuous nonlinearit memductance Is there an other simple choice to stud memristive chaotic circuit? In this paper, a u-controlled memristor with linear memductance is proposedandthenanemulatorispresented. The memristor with linear memductance,which makes the memristor's mathematical model more simple and eas to implement,is di erent from those above mentioned We use onl one Multiplier and two Op-amps in the emulatorwhichhaslesserelementsthanthe emulators B using the memristor proposed in this paper, we proposed a new 4D hperchaotic circuit. Hper-chaotic sstem has more comple dnamics, which can be widel applied in man realms such as crptosstem, neural network, and secure communication. However, the memristive sstems are all chaotic Although the hper-chaotic sstems are proposed in Refs. 24 and 25, the memductance function of these memristive sstems is two-order function. It is interesting to generate hperchaotic attractor b using simple linear memductance. Multiple attractors are an interesting topic, which are reported b man researchers. 29,3 The various coeisting attractors can have quite di erent properties such as Lapunov eponents, and the occurrences in all combinations: ed points, limit ccles, torus, chaotic attractors, and hperchaotic attractors. 29 In this paper, we found the coeisting transient chaotic attractors and chaotic attractors. This paper is organied as follows. In Sec. 2, a memristor with linear memductance is proposed, and an emulator built from o -the-shelf solid state components which imitates the behavior of the proposed memristor presented. In Sec. 3, the hper-chaotic circuit is described and the hper-chaotic dnamics are con rmed b numerical computation. In Sec. 4, multiple chaotic attractors and transient chaotic attractors are discussed. In Sec. 5, an electronic circuit is designed to implement the hper-chaotic circuit. Finall, the conclusions are given in Sec

4 The Design and Realiation of a Hper-Chaotic Circuit 2. The Flu-Controlled Memristor with Linear Memductance and Emulator Memristor is the fourth basic two-terminal circuit element besides resistor, inductor, and capacitor, which describes the relationship between the charge q and the ulinkage. According to Chua, 1 a u-controlled memristor is de ned b the relation of the tpe gð ; qþ ¼ and this relation can be epressed as a single-valued function of the u-linkage. The current of a u-controlled memristor is given b i ¼ Wð Þv ; ð1þ where W ð Þ ¼ dqð Þ=d. The function W ð Þ is called the memductance. Now, we de ne a u-controlled memristor as qð Þ ¼a 2 ; where a >. According to Eq. (2), we get the memductance Wð Þ ¼ dqð Þ ¼ ; ð3þ d where ¼ 2a >. The current of this memristor is given b i ¼ Wð Þv ¼ v : ð4þ The instantaneous power dissipated b the memristor is given b p ¼ vi ¼ Wð Þv 2 : If the memductance Wð Þ, then p, the memristor is obviousl passive. In comparison with the memristors presented in the papers, 11 23,25,26 our proposed memductance W ð Þ ¼ onl contains a linear term and no constant term. The intention is to make the mathematical model more simple and make the emulator easier to be implemented. The emulator schematic is depicted in Fig. 1. With the properties of Op-amp TL82, Multiplier AD633 and Current Feedback Operational Ampli er AD844 (refer to the datasheet for further information), we can ð2þ ð5þ Fig. 1. Schematic of the emulator

5 C. Wang, L. Zhou & R. Wu see that U4 is the current-inverter that implements Multiplier U3 implements Op-amp U2 implements Op-amp U1 implements i M ¼ i Z ¼ i 2 ¼ v 3 R 2 : v 3 ¼ v 2 v 1 : Z v 2 ¼ v 1 ¼ v M : v 1 R 1 C dt : ð6þ ð7þ ð8þ ð9þ f 1kH f 5kH (a) (b) (c) (d) Fig. 2. The i v characteristics of the proposed memristor. The ecited signal is a sinusoid voltage with 1.5 V amplitude. (a) and (b) are the Multisim circuit simulations with a frequenc of 1 kh and 5 kh. (c) and (d) are the corresponding circuit eperiment results. Note that from Eq. (6), we known i M ¼ v 3 /R 2. In order to convenientl measure the current i M, we use the voltage v 3 substitute the current i M, which just take a transformation of 1/R 2 scale

6 The Design and Realiation of a Hper-Chaotic Circuit From Eqs. (6) (8), we can get i M ¼ v Z 1 v R 1 R 2 C 1 dt : ð1þ From Eqs. (9) and(1), It is eas to obtain i M ¼ v Z M v R 1 R 2 C M dt : ð11þ Now, consider the above proposed memristor in Eq. (4). We have i ¼ i M, v ¼ v M, ¼ R v M dt (the internal state of the memristor), ¼ 1/R 1 R 2 C. It can be seen that the circuit indeed realies the above proposed memristor. And we use the Current Feedback Operational Ampli er AD844 to realie the current-inverter, which makes the design more eas and more direct. Moreover, in the design of emulator, we onl use one Multiplier, which makes the design method simpler than others proposed b papers When R 1 ¼ 1 k, R 2 ¼ 1k, C ¼ 4 nf, the circuit eperiment results of i M v M relationship as shown in Figs. 2(c) and 2(d) are well consistent with the results of the Multisim simulation shown in Figs. 2(a) and 2(b). From the simulations and eperiment results, we found that our proposed memristor emulator has a higher frequenc range than the reported are The Hper-Chaotic Circuit Based on Flu-Controlled Memristor with Linear Memductance Loren sstem is the rst chaotic sstem, which was proposed b Edward Loren in The Loren sstem is a sstem with three ordinar di erential equations 8 >< : ¼ að Þ ; : ¼ c ; ð12þ >: : ¼ b þ : When the sstem parameters are taken as a ¼ 1, b ¼ 8=3, and c ¼ 3, the sstem ehibits chaotic behavior. The phase portraits of Loren sstem are shown in Fig. 3 (the initial condition ðþ ¼:1, ðþ ¼:1, ðþ ¼:1). B adding the proposed memristor to Loren sstem, a four-dimensional hperchaotic sstem is designed. The schematic is shown in Fig. 4. The dnamic equations of the circuit in Fig. 4 are 8 C : ¼ =R 1 =R 2 ; >< C : ¼ =R 3 =R 5 =R 4 Wð Þ ; C : ð13þ ¼ =R 11 þ =R 1 ; >: : ¼ :

7 C. Wang, L. Zhou & R. Wu (a) (b) (c) t/(s) (d) Fig. 3. Phase portraits of Loren sstem. (a) Projection on plane. (b) Projection on plane. (c) Projection on plane. (d) Time-domain waveform of variable. - R1 C R2 R8 - R6 R1 C - A R3 R4 R5 W B C R7 R9 R11 - Fig. 4. Schematic of a hper-chaotic circuit based on the proposed memristor

8 The Design and Realiation of a Hper-Chaotic Circuit We have a ¼ 1=ðR 1 C Þ¼1ðR 2 C Þ; b ¼ 1=ðR 11 C Þ; c ¼ 1=ðR 3 C Þ; R 5 C ¼ R 4 C ¼ R 1 C ¼ 1 Equation (13) can be described as the following dimensionless equations: 8 : ¼ að Þ ; >< : ¼ c Wð Þ ; : ¼ b þ ; >: : ¼ ; where the memductance function Wð Þ ¼. We have a ¼ 1, b ¼ 8=3, c ¼ 3, ¼ :5. The divergence of sstem (14) is given b : ¼ a 1 b Since a ¼ 1, b ¼ 8=3, a 1 b ¼ 13:67 <, the sstem (14) is dissipative. ð14þ 3.1. Equilibria and stabilit The equilibria of sstem (14) can be derived b solving the following equations: 8 að Þ ¼ ; >< c Wð Þ ¼ ; ð15þ b þ ¼ ; >: ¼ : As can be seen, the equilibrium states of sstem (14) onl rel on, and, and are independent from. The hper-chaotic sstem has the unusual feature of having a line of equilibrium. The equilibria of sstem (14) can be described as O ¼fð; ; ; Þj ¼ ¼ ¼ ; ¼ dg : The Jacobian matri of sstem (14) on this line equilibrium is 2 3 a a c d 1 J O ¼ b 5 : ð16þ 1 The four eigenvalues of matri J are p ; b; ð ða þ 1Þ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi ða 1Þ 2 4aðd cþþ=2 :

9 C. Wang, L. Zhou & R. Wu If a ¼ 1, b ¼ 8=3, c ¼ 3, ¼ :5, the four eigenvalues are p 1 ¼ ; 2 ¼ 8=3; 3 ¼ð 11 þ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi dÞ=2; p 4 ¼ð 11 ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi dÞ=2 : When d > 58, 3 >, 4 <, there are one positive eigenvalue, one ero eigenvalue and two negative eigenvalues, and the line equilibrium of sstem (14) is unstable saddle points. When d < 58, 3 <, 4 <, there are one ero eigenvalue and three negative eigenvalues, and the line equilibrium of sstem (14) is stable. Since there is no imaginar eigenvalue in J, a Hopf bifurcation does not eist near the line equilibrium of sstem (14) Lapunov spectrum and bifurcation diagram To eplore the nonlinear dnamics of this hper-chaotic circuit, the Lapunov spectrum and bifurcation diagram of the sstem (14) are calculated in this section. When a ¼ 1, b ¼ 8=3, c ¼ 3, and increases from to.8 with a step sie.1, the corresponding Lapunov eponents of the sstem (14) can be computed b the QR decomposition-based method, 28 as shown in Fig. 5. Note that when ¼ :5, Fig. 5. Lapunov eponents versus parameter of sstem (14) calculated b QR decompositionbased method

10 The Design and Realiation of a Hper-Chaotic Circuit (a) (b) (c) -5 (d) Fig. 6. Hper-chaotic phase portraits of sstem (14) with parameter ¼ :5. (a) Projection on plane. (b) Projection on plane. (c) Projection on plane. (d) Projection on plane. Fig. 7. Bifurcation diagram for increasing parameter

11 C. Wang, L. Zhou & R. Wu the corresponding Lapunov eponents are: LE 1 ¼ 1:51, LE 2 ¼ :318, LE 3 ¼ :14, LE 4 ¼ 14:7. There are two positives, one ero and one negative Lapunov eponents, which means the sstem is a hper-chaotic sstem. The phase portrait for ¼ :5 with initial condition (.1,.1,.1,.1) is depicted in Fig. 6. In order to be sure that the sstem is trul hper-chaotic when ¼ :5, we compute the Lapunov eponents with the Wolf method 29 which coincide well with the results of QR decomposition-based method. The bifurcation diagram of state variable with increase of with a step sie.1 is given in Fig. 7, which matches the Lapunov eponents in Fig. 5 ver well. The above analsis suggests that the adding of memristor makes the sstem demonstrate abundant interesting nonlinear phenomena. The memristive hper-chaotic sstem with a line of equilibrium could be a novel tpe of dnamical sstem. 4. Multiple Attractors In the following, we take account of the in uence of parameter a. The parameters are taken as b ¼ 8=3, c ¼ 3, and ¼ :5, and the parameter a is variable. The comple dnamics (chaotic attractors, transient chaotic attractors, hperchaotic attractors, multiple attractors) are found in this case, and the LEs versus parameter a of sstem (14) are depicted in Fig. 9. The coeistence of multiple attractors is one of the most striking phenomena encountered in nonlinear dnamical sstems. If the parameters are taken as a ¼ 13:9, b ¼ 8=3, c ¼ 3, and ¼.5, the multiple attractors can be observed as shown Fig. 8. In order to verif the coeistence of multiple attractors, the time sequences (Fig. 1) and LEs (Fig. 11) are calculated. lapunov eponents a Fig. 8. LEs versus parameter a of sstem (14)

12 The Design and Realiation of a Hper-Chaotic Circuit φ Fig. 9. The phase portraits of sstem (14) when the parameters are taken as a ¼ 13:9, b ¼ 8=3, c ¼ 3, and ¼ :5 under di erent initial condition: the initial condition is [ ] (blue), the initial condition is [ ] (red) (color online). From Figs. 1 and 11, it can observe that the transient chaos appears when the initial condition is [ ], while chaotic attractor is found in the initial condition [ ]. When a is changing, we can nd di erent attractors when the parameter a is 4. The LEs are.1227, :17539, 2:494561, and 5: The phase portraits of sstem (14) are depicted in Fig t (a) t (b) Fig. 1. The time sequences of sstem (14) when the parameters are taken as a ¼ 13:9, b ¼ 8=3, c ¼ 3, and ¼ :5 under di erent initial condition: (a) the initial condition is [ ], (b) the initial condition is [ ]

13 C. Wang, L. Zhou & R. Wu 5 5 Lapunov eponents Lapunov eponents t (a) t (b) Fig. 11. The LEs of sstem (14) versus time t when the parameters are taken as a ¼ 13:9, b ¼ 8=3, c ¼ 3, and ¼ :5 under di erent initial condition: (a) the initial condition is [ ], (b) the initial condition is [ ] φ Fig. 12. The phase portraits of sstem (14) when the parameters are taken as a ¼ 4, b ¼ 8=3, c ¼ 3, and ¼ :5. 5. Circuit Implementation It is important to realie the hper-chaotic sstems b the phsical circuit before the hper-chaotic sstems are applied in engineering applications. In this section, the memristive hper-chaotic sstem (14) is realied b an electronic circuit shown in Fig. 13. The voltages of C ; C ; C ; and C are used as, and, and, respectivel. The operational ampli ers TL82 and the associated circuits perform the basic

14 The Design and Realiation of a Hper-Chaotic Circuit - R1 R2 C - R6 R11 R1 C R8 - W( ϕ) - R12 R3 R4 R5 C ϕ C R13 R7 R9 - Fig. 13. Circuit diagram for sstem (14). operations of addition, subtraction and integration. Multiplication operation is performed b the analog multiplier AD633. Since AD633 provides an overall scale factor of 1/1 V, a factor.1/v needs to be put on each multiplication. At the same time, AD633JN has laser-trimmed accurac between 1 V and 1 V. However, the values of, and, and in Fig. 6 ma eceed this range. We must have a (a) (b) Fig. 14. Phase portraits of sstem (14) observed from Multisimsimulation. (a) Projection on plane. (b) Projection on plane. (c) Projection on plane. (d) Projection on plane

15 C. Wang, L. Zhou & R. Wu (c) (d) Fig. 14. (Continued) (a) (b) (c) (d) Fig. 15. Phase portraits of sstem (14) observed from oscilloscope. (a) Projection on plane. (b) Projection on plane. (c) Projection on plane. (d) Projection on plane

16 The Design and Realiation of a Hper-Chaotic Circuit scale transform. The corresponding circuit equation can be described as 8 v : ¼ 1 v v ; C R 1 R 2 v : ¼ 1 v v v v v Wð Þ >< ; C R 3 R 5 R 4 R 13 v : ¼ 1 v þ v v ; C R 11 R 1 >: v : ¼ 1 v R 12 C : ð17þ When C ¼ C ¼ C ¼ C ¼ 1 nf, R 1 ¼ R 2 ¼ 1 k, R 6 ¼ R 7 ¼ R 8 ¼ R 9 ¼ 1 k, R 11 ¼ R 12 ¼ 125 k, R 3 ¼ 33:333 k, R 5 ¼ 5 k, R 4 ¼ R 1 ¼ R 13 ¼ 2 k, the results of the circuit eperiment are shown in Fig. 1, which are well consistent with the results of the numerical simulations shown in Fig. 6 and the Multisim simulations shown in Fig. 14. The eperimental results in Fig. 15 have veri ed that the main idea about the memristive hper-chaotic circuit of this paper is e ective. 6. Conclusion In this paper, a new simple memristor model was proposed. Then a hper-chaotic sstem was proposed b adding a u-controlled memristor with liner memductance. The 4D memristive sstem can generate a hper-chaotic attractor, transient chaotic attractor, multiple attractors. Some basic properties of the new sstem have been investigated in terms of equilibria, hper-chaotic attractors, Lapunov eponent spectrum and bifurcation diagram. The results of eperiment are well consistent with the numerical simulation results. The hper-chaotic circuit based on memristor with linear memductance has simple circuit structure and eas implement, which can widel be used in chaotic secure communication, image encrption and other elds. Acknowledgments This work is supported b the National Natural Science Foundation of China (No ), The Natural Science Foundation of Hunan Province, China (No. 216JJ23) and the Open Fund Project of Ke Laborator in Hunan Universities (No. 15K27). The authors would like to thank the editors and anonmous reviewers for providing valuable comments which helped in improving the paper. References 1. L. O. Chua, Memristor The missing circuit element, IEEE Trans. Circuit Theor 18 (1971) D. B. Strukov et al., The missing memristor found, Nature 453 (28)

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