Ultra Fast Calculation of Temperature Profiles of VLSI ICs in Thermal Packages Considering Parameter Variations

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1 Ultra Fast Calculation o Temperature Proiles o VLSI ICs in Thermal Packages Considering Parameter Variations Je-Hyoung Park, Virginia Martín Hériz, Ali Shakouri, and Sung-Mo Kang Dept. o Electrical Engineering, University o Caliornia at Santa Cruz 56 High Street, Santa Cruz, CA 9564 School o Engineering, University o Caliornia at Merced 5 N. Lake Rd, Merced, CA , jhpark@soe.ucsc.edu Abstract Due to the aggressive scaling down o the CMOS technology, VLSI ICs become more and more vulnerable to the eect o non-uniorm high temperatures which can signiicantly degrade chip perormance and reliability. Thereore, we are interested in surace temperature proiles o VLSI ICs. In IC thermal analysis, heat conduction equation is conventionally solved by grid-based methods which are computationally expensive. To reduce the computation time, we developed a matrix convolution technique, (PB). It calculates the steady-state temperature proile with maximum temperature errors less than % or various types o power distributions. It requires a spatial impulse response, called the thermal mask, which can be obtained by using Finite Element Analysis (FEA) tools such as. The thermal mask is a unction to be convoluted with power distribution or temperature proile. Thus, the PB method uses FEA repeatedly or the changes in parameters o thermal packages such as thermal conductivity, convection heat transer coeicient, and silicon substrate thickness to obtain new thermal mask. Our test structure is divided into 49, elements o which 6 correspond to the surace o the silicon substrate. Perorming FEA repeatedly is time consuming. In this paper, we will describe the PB method and propose a method or parameterization o the thermal mask to avoid many FEA simulations under parameter variations. The PB method using parameterized mask yields maximum error less than.% or various case studies and reduces computation time rom 7 seconds to. second or our test structure. Key words: (PB), thermal package, temperature proile, thermal mask parameterization, and inite element analysis (FEA). Introduction and Background As MOSFET eature sizes decrease and onchip power density increases, non-uniorm temperature rise in VLSI chips has drawn our attention because chip perormance and reliability are strong unctions o chip temperature distribution. For accurate estimations o perormance, reliability, and power consumption, precise thermal proile is indispensable. To obtain a steady-state thermal proile or a region o interest, the heat conduction equation shown in Equation () needs to be solved with given boundary conditions []. T( x, y, z) T( x, y, z) T( x, y, z) k + k + k + q* = () x y z where k is the thermal conductivity, ρ is the density, and c p is the speciic heat, q* is the heat generation per volume, and T(x, y, z) is the temperature o the position (x, y, z). In IC thermal analysis, heat conduction equations have been conventionally solved by gridbased methods, such as Finite Dierence Method (FDM) or Finite Element Method (FEM), which involve a huge amount o data and are computationally expensive. In an eort to accelerate computation o temperature distribution, a matrix convolution technique, called (PB), has been developed [].

2 This PB method has its theoretical basis on the Green s unction method and the methodological basis rom image blurring used or image processing. The Green s Function method irst inds a solution to the partial dierential equation with a point source as the driving unction. This solution is called the Green s unction, which is equivalent to the impulse response o the system. Subsequently, a solution to an actual source is represented as a superposition o the impulse responses to the point sources at dierent locations []. In image processing, an image can be blurred using a ilter mask. The ilter mask is a matrix whose coeicients represent a rule about how to modiy the image. As the ilter mask is moved rom one position to another in the image, convolution operation is perormed. For a given IC chip, power map can be obtained by monitoring chip activities. I we think o the power map as an image, the thermal proile o the IC chip corresponding to the power map can be regarded as a blurred image o the power map while the ilter mask is treated as the impulse response (i.e. Green s unction) o the system. Hence, the new method is named. In our case, a spatial impulse response is used as a ilter mask and is called the thermal mask, which can be obtained with ull D inite element analysis (FEA) using [4]. Previously, the PB method required several FEA simulations since the shape o the impulse response depends on the position where the point heat source is applied, which is a shortcoming. For example, a point heat source at the center and that at the edge o the IC surace produce dierent peak temperatures and dierent temperature proiles as shown in Figure. This is due to the inite size o an IC chip; hence a point heat source experiences dierent boundary conditions depending on its locations Fig. Temperature proiles on the surace o an IC chip with a point heat source at the center and edge. The PB method was urther improved by applying the Method o Image which takes into account the symmetry o the heat dissipation at the boundary or a inite sized chip [5]. In this paper, the PB method will be reviewed and case studies or various stead-state power maps will be presented. Finally, a method or parameterization o the thermal mask will be proposed and justiied. The remainder o the paper is organized as ollows. In Section, the PB method and case study results or various steady-state power maps are presented. The thermal mask parameterization and simulation results are presented in Section, ollowed by conclusions in Section 4.. Method. Package Model (Test Structure) Figure shows our package model or case studies. Material properties were adopted rom []. The coniguration consisted o a Si IC with a surace area o cm cm and a Cu heat sink with a heat spreading layer. The Si IC was orthogonally meshed with element size o.5.5cm or FEA.!"!" Fig. Packaged IC chip where the heat spreader, the heat sink and the thermal interace material (TIM) are included. Mask Coeicient (degree C/W) 5 The Thermal Mask Fig. The thermal mask.

3 . The Thermal Mask First, spatial impulse response o the package is obtained by simulation using a point heat source as an approximate delta unction; 6,5 W/cm heat lux is applied to a single element in the center o the Si IC. Assuming a lip chip package,.5 W/cm -K is used or convective heat transer coeicient at the bottom surace o the heat sink, and other minor heat transer paths are neglected in this analysis. The ambient temperature is set to 5 C. To generate the thermal mask, the resulting surace temperature proile is normalized by the amount o power applied to produce the temperature distribution. Figure shows the thermal mask with unit o C/W (thermal resistance). The thermal mask generates a temperature proile when it is convoluted with the power map.. Method o Image and Error Reduction Power Map(D) Length X Extended Power Map Length X Fig. 4 A coarse power map and corresponding extended power map using the Method o Image. Boundary conditions on the suraces o Si IC chip are adiabatic. Thermal problems can be oten translated into electrical problems to take advantage o well developed analysis methods. Electromagnetic problems involving a planar perect electric conductor can be solved through the Method o Image in which the surace is replaced by image sources that are mirror images o the sources with appropriate signs [6, 7]. A similar principle can be applied to the thermal problems involving adiabatic.5..5 boundary conditions. No heat transer occurs at the adiabatic boundary. Thus mirror images can replace the adiabatic boundaries as shown in Figure 4. Introducing the Method o Image into the PB method causes another source o error because o the incomplete symmetry. The heat spreader and the sink are bigger than the Si IC chip and there is three-dimensional heat spreading. For uniorm power distribution such as one shown in Figure 5, the PB method predicts the temperature proile in Figure 5, whereas generates a dierent temperature proile in Figure 5 (c). Thus, the temperature deviation between the real temperature and one by the PB method is intrinsic to PB method with the Method o Image applied and shown in Figure 6. Power(W) Temperature(degree C) Uniorm Power Map Temperature by Temperature by (c) Fig. 5 Uniorm power map and corresponding thermal proiles by the PB method and (c) 75 7

4 Temperature rise is linearly proportional to the input power. Thus the intrinsic error in Figure 6 is linearly dependent on the input power level. On the other hand, the relative deviation given in Equation () below is constant regardless o input power level because both temperatures (T PB & T real ) are linearly dependent on input power. Thus, Equation () can be used or error compensation. Temperature(degree C) 4 Intrinsic Error Fig. 6 Intrinsic error in the PB method.4 Case Studies Power(W) E r =(T PB -T real )/T real () Power Map (D) A coarse power map vs. ; path along x=cm Width Y path along x=cm.5..5 vs. (c) Fig. 7 A coarse power map or an IC chip, corresponding temperature proile, and (c) relative temperature error between and. A coarse power map and the corresponding temperature proiles along the speciied paths are given in Figure 7 and, respectively. As can be seen in Figure 7 (c), the maximum temperature error is less than % in this case. Power(W) Power Map (D) A ine power map vs. ; path along x=cm Width Y path along x=cm

5 vs. (c) Fig. 8 A typical ine power map or an IC chip, corresponding temperature proile, and (c) relative temperature error between and. A typical ine power map and the corresponding temperature proile along the speciied path are given in Figure 8 and, respectively. As can be seen in Figure 8 (c), the maximum temperature error is less than % in this case.. Thermal Mask Parameterization In the PB Method, the thermal mask needs to be obtained irst. Thus this method is dependent on FEA by (or it could be measured experimentally). The thermal mask needs to be recalculated when some parameters are changed. To avoid this inconvenience, the thermal mask is parameterized or several parameters such as thermal conductivity o the substrate, convection coeicient, and chip thickness. The thermal mask is almost symmetrical about the center. Hence the thermal mask can be represented as one dimensional analytical unction by curve itting. The unction is in the orm o y = m + m exp( m x), where m, m, and m are itting parameters.. Thermal Conductivity Variation Mask Coeicients (degree C/W) Thermal Conductivity Variation Distance rom the center kxx=. W/cm.K kxx=. W/cm.K kxx=. W/cm.K kxx=.4 W/cm.K kxx=.5 W/cm.K kxx=.6 W/cm.K Fig. 9 Thermal Mask coeicients with dierent substrate thermal conductivities Consecutive simulations were perormed with dierent thermal conductivity values ranging rom. W/cm-K to.6w/cm-k with.w/cm-k step, and results are shown in Figure 9. With higher thermal conductivity, overall temperature o the Si IC chip is lower because heat can be removed by heat sink more easily. Thus the thermal mask has lower values when the thermal conductivity value is higher. Table Curve itting parameters. Thermal Conductivity m m m (W/cm-K) m m m m Y = M + M*x +... M8*x 8 + M9*x 9 M M M Y = M + M*x +... M8*x 8 + M9*x 9 m m M M M Y = M + M*x +... M8*x 8 + M9*x 9 M M M Fig. Three curve itting parameters (m, m, and m) represented as a unction o thermal conductivity.

6 Table summarizes curve itting parameter values or dierent thermal conductivities. When curve itting parameters (m, m, and m) are plotted with respect to thermal conductivity (kxx), we can notice that those parameters can be represented as a unction o thermal conductivity as shown in Figure. Analytical expressions or curve itting parameters (m, m, and m) are given by Equations () (5). m = m = m = () (4) (5) When thermal conductivity is.5w/cm-k, m=.649, m=8.545, and m=-.68, respectively. Figure shows comparisons between temperature proiles by and the PB method using the parameterized mask. As can be seen, parameterized mask shows a good perormance resulting in a maximum error o. C (.9%) vs. Calculated Mask; path along x=cm vs. Calculated mask Fig. Comparisons between and the PB method using the parameterized mask: thermal proile along x=cm and relative errors Convective Heat transer Coeicient Variation To investigate the eect o convection coeicient variation on the mask, multiple simulations were perormed with dierent convection coeicient values ranging rom. W/cm -K to W/cm -K with.w/cm -K step. Figure shows mask values obtained through simulation runs. Convection occurs only at the bottom surace o the heat sink. Thus the convection coeicient has eect on lowering the temperature oset (i.e. the tail o the thermal mask). Mask Coeicients (K/W) Convection Coeicient Variation Conv=. W/cm.K Conv=. W/cm.K Conv=. W/cm.K Conv=.4 W/cm.K Conv= W/cm.K Conv=.6 W/cm.K Conv=.7 W/cm.K Conv=.8 W/cm.K Conv=.9 W/cm.K Conv=. W/cm.K Distance rom the center Fig. Thermal mask coeicients with dierent convection coeicients. Table Curve itting parameters. Convection Coeicient m m m (W/cm -K) Mask parameterization or convection coeicient variation can be done in a similar way as the thermal conductivity case. Fitting parameters are summarized in Table. Fitting parameter m can be represented as a unction o convection coeicient (h ). Analytical expressions or curve itting parameters (m, m, and m) are given by Equations (6) (8).

7 6 h 4 7 h m = h h h +.67 h.6 h (6) m = 8.59 (7) m = 9 (8) When convection coeicient is.5 (w/cm -K), the thermal mask can be approximated as y = exp( 9 x). Figure shows comparisons between temperature proiles by and the PB method using the parameterized mask. As can be seen, the parameterized mask shows a good perormance resulting in a maximum error o. C (.9%) vs. Calculated Mask; path along y=cm Length X.5.5 vs. Calculated Mask Fig. Comparisons between and the PB method using the parameterized mask: thermal proile along y=cm and relative errors.. Chip Thickness Variation To investigate the eect o chip thickness variation on the mask, multiple simulations were perormed with dierent chip thickness ranging rom um to um. Figure 4 shows thermal mask coeicients obtained through simulation runs. Mask Coeicients (K/W) Chip Thickness Variation Thickness=um Thickness=um Thickness=um Thickness=4um Thickness=5um Thickness=6um Thickness=7um Thickness=8um Thickness=9um Thickness=um Distance rom the center Fig. 4 Thermal mask coeicients with dierent chip thicknesses. Table Curve itting parameters. Chip Thickness m m m (um) Mask parameterization or chip thickness variation can be done in a similar way as the previous two cases. Fitting parameters are summarized in Table. Fitting parameter (m, m, and m) can be represented as a unction o chip thickness (T). Analytical expressions or curve itting parameters (m, m, and m) are given by Equations (9) (). m = T 4.649e 7 T +.998e T m = T.957 T e 7 T e T.66e T m = T.9566 T e 7 T 4.64e T 4.78e T e 6 T.7e 9 T (9) () () When chip thickness is 775um, m=.66, m=8.4, and m=-8, respectively. Thus the thermal mask can be approximated as

8 y = exp( 8 x). Figure 5 shows comparisons between temperature proiles by and the PB method using the parameterized mask. As can be seen, the parameterized mask yields a maximum error o. C (.9%). vs. Calculated Mask; path along the diagonal line Diagonal Distance.5.5 vs. Calculated mask Fig. 5 Comparisons between and the PB method using the parameterized mask: thermal proile along diagonal path and relative errors. 4. Conclusion In this paper, an accelerated temperature calculation method called and the error reduction method were discussed. Throughout various case studies, the PB method shows very reliable results with maximum error less than % or steady-state power maps. To mitigate the dependence on or the thermal mask generation, a method o mask parameterization was proposed and used. The PB method using parameterized masks perorms well with maximum error around or less than.%. Our method reduced the calculation time by a actor o 7 compared to simulation. 5. Reerences [] Frank P. Incropera and David P. De Witt, Introduction to Heat Transer, John Wiley & Sons, nd Edition, New York, Chapter, pp. 5-57, 99. [] Travis Kemper, Yan Zhang, Zhixi Bian and Ali Shakouri, Ultraast Temperature Proile Calculation in IC Chips, Proceedings o th International Workshop on Thermal investigations o ICs (THERMINIC), Nice, France, September 7-9, 6. [] Constantine A. Balanis, Advanced Engineering Electromagnetics, John Wiley & Sons, New York, Chapter 4, 989. [4] R., Swanson Inc., 7 [5] Virginia Martin Heriz, Je-Hyoung Park, Ali Shakouri, and Sung-Mo Kang, Method o Images or the Fast Calculation o Temperature Distributions in Packaged VLSI Chips," Proceedings o th International Workshop on Thermal investigations o ICs (THERMINIC), Budapest, Hungary, September 7-9, 7. [6] Ismo V. Lindell, Image Theory or Electromagnetic Sources in Chiral Medium Above the Sot and Hard Boundary, IEEE Transactions on Antennas and Propagation, Vol. 49, No. 7, pp , July. [7] J. A. Kong, Electromagnetic Wave Theory, Wiley, nd Edition, New York, pp. 64-7, 99.