Introduction. Instrumentation at the Glenlea Astronomical Observatory

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1 JLW 1 Introduction In 1970 (1), Bell Telephone Laboratory researchers Willard S. Boyle and George E. Smith demonstrated a new memory circuit. This was the first charge-coupled device or CCD. Astronomers recognized that it had the potential to be an excellent imaging device as it offered several advantages over film and vidicon tubes. A few of these advantages include linearity and high sensitivity over a broad spectral range. In 1974, a 100 x 100 pixel chip was used with a Celestron 8-inch telescope to image the moon and planets. These were likely the first astronomical CCD images ever taken (2). As an imaging device, the primary objective of the CCD is to detect photons. It then converts them to an electrical signal which one can interpret. The CCD chip itself is a small wafer of semiconductor material which is electrically divided into an array of picture elements or pixels. The photons are detected and electrons generated by a process known as the photoelectric effect. These electrons are stored in each pixel during the exposure. Finally, the electrons are read out and a computer is able to represent the image by assigning a brightness value according to the amount of charge in each pixel. The number of pixels and the size of the array is important as this determines the resolution of the device. As the chip gets larger, the likelihood of the occurrence of a flaw goes up, as does the price. The Hubble Space Telescope uses eight Texas Instruments 800 x 800 pixel chips. Instrumentation at the Glenlea Astronomical Observatory At the Glenlea Astronomical Observatory, an SBIG ST-6 CCD camera is being used. The ST-6 utilises a Texas Instruments TC241 CCD chip. The active image sensing area has 244 lines with 780 elements in each line (7). Twenty-seven elements in each line are shielded for purposes of dark reference and transition elements. The pixels measure 27µm x 11.5µm (V x H). The computer combines two 27µm x 11.5µm pixels to form one 27µm x 23µm pixel that has an aspect ratio which is more square shaped. The result is an image with 242 x 375 pixels. Measured across the diagonal, the chip is 11mm. The TC241 is constructed using virtual-phase technology. Figure 1 shows a magnified 16 x 16 pixel section from a CCD image. The square blocks are the pixels, each containing only one shade of grey. The image was taken with the instruments at the GAO and this region shows

2 JLW 2 some detail in an arm of the spiral galaxy M61. Figure 1: Enlarged 16 x 16 pixels section from a CCD image The computer displays the pixels as square, but as mentioned above, the pixels of the chip are not square. This causes a slight distortion of the displayed image which may be corrected by image processing.

3 JLW 3 Composition of the CCD chip Background -- Semiconductors The CCD, being a semiconductor device, is constructed mainly of silicon. Germanium is sometimes used in place of the silicon, but my discussion will focus on silicon since it is the element which is predominantly used. Semiconductors are unique materials which have conductive abilities lying between those of insulators and conductors. A single semiconductor crystal is used as the basis of a CCD chip. A crystal has the atoms arranged in a very particular and regular way. A typical solid is composed of many small crystals combined together in a random fashion with each of the individual crystals having a regular structure. A CCD chip uses a single crystal which has a regular structure throughout. Both silicon and germanium atoms arrange themselves with a face centred cubic lattice structure. This structure has an atom at each of the corners of a cube as well as one atom in the centre of each face. Figure 2 shows a unit cell of this structure. In silicon the length of one side of the cube is 5.43 Å. A silicon crystal is composed by stacking the unit cells. The resulting crystal has the property that each atom has four nearest neighbours. This property results in the fact that silicon forms four covalent bonds which hold the crystal together. Figure 2: Unit cell of the face centred cubic lattice structure. Each dot represents an atom of Si (or Ge). The colour differences are for illustrative purposes only. An atom of silicon has 14 protons and 14 electrons. The electrons exist in discrete energy levels. Quantum mechanics restricts the energy that the electrons may possess such that some energy states are forbidden. Some electrons are very tightly bound by the protons. Enormous amounts of energy would be required to free theses tightly bound electrons.

4 JLW 4 Others exist in higher energy levels, and much less energy is required to free these from the parent atom. In a crystal, the atoms are close together and the allowed electron energies in each atom are very similar. These energies blend together to form energy bands. E energy levels potential energy curve for the atom atom r Figure 3a: Energy levels for one atom E energy bands energy gap conduction band valence band } r Figure 3b: Energy levels for three atoms. In a crystal with many more than three atoms, the band gap is very well defined. Figures 3a and 3b are based on on diagrams in Introductory Electronics for Scientists and Engineers by Robert E. Simpson. There is very well defined energy gap in a crystal between valence and

5 JLW 5 conduction bands. The electrons in the valence band bind the crystal together whereas the electrons in the conduction band are free to move within the crystal. The gap defines the amount of energy that must be given to an electron in order for it to move from the valence band into the conduction band. The chemical composition of a crystal is very much related to the occupation by electrons of particular energy levels. A function called the Fermi function gives the probability an energy level is occupied by an electron. This function is temperature dependent since at higher temperatures the available thermal energy increases the probability that an electron will be found in a higher energy state. The Fermi function also depends on the chemical composition of the crystal. At absolute zero the crystal will be in the lowest energy state possible. The Pauli Exclusion Principle states that no two electrons can have the same quantum numbers and thus some electrons are forced to occupy higher energy states. The highest energy state occupied depends on the number of electrons in the atom and thus on the chemical composition of the crystal. The highest energy level occupied at absolute zero is termed the Fermi energy. The value of the Fermi energy indicates whether the material is an insulator, conductor, or semiconductor. For conduction to occur, electrons must be present in the conduction band. A conductor has a Fermi energy greater than the energy at the bottom of the conduction band. This means that even at absolute zero electrons must be present in the conduction band. Both insulators and semiconductors have a Fermi energy which lies between the energies of the bottom of the valence band and the top of the conduction band. This means that electrons must gain energy by some process in order to exist in the conduction band. The difference between semiconductors and insulators is the size of the energy gap between the valence and conduction bands. Thus less energy is required to move electrons into the conduction band for a semiconductor. Diamond, an insulator has an energy difference of 5 ev between the valence and conduction bands. A temperature of approximately C is required to give an electron enough energy to move from valence to conduction band in diamond. Pure silicon has an energy band gap of 1.14 ev. This means that 1.14 ev is enough energy to free an electron from the lattice of the silicon crystal, forming an electron-hole (e - -h) pair. The conductivity of a semiconductor can be dramatically increased through a process known as doping. This involves adding a small amount of

6 JLW 6 impurity to the silicon. In silicon doped with a pentavalent atom such as phosphorus (P), atoms of phosphorus replace atoms of silicon in the lattice structure. The silicon still only forms four bonds at the site of the phosphorus atom. The fifth phosphorus electron is very loosely bound and is easily freed to become a carrier in the crystal. This type of doping creates a semiconductor with negative carriers -- known as n-type. A p- type semiconductor is formed with the addition of a trivalent impurity such as boron (B). In this case, three bonds form at the site of the boron atom but the boron atom has four neighbouring silicon atoms which all want to bond. Neighbouring bound electrons move to fill the void but in turn create another hole which is filled by another electron. In this way the hole moves through the lattice. In both p and n-type materials, the crystal is still electrically neutral; the majority carrier (electron or hole) is neutralized by the bound charges at the site of the impurity atom. A diode is formed when n-type and p-type materials contact each other. The n-type material has mobile electrons. These electrons are in constant motion due to thermal energy. Some of them will diffuse across the junction into the p-type material where they may recombine with some of the free holes. Conversely, the mobile holes of the p-type material diffuse into the n-type material and recombine with the free electrons. The recombination of holes and electrons causes some of the bound charge to become uncovered. Thus in the vicinity of the pn-junction, the p-type material becomes depleted of free holes and acquires a negative charge; the n-type material is depleted of free electrons and acquires a positive charge. This region near the pn-junction is a depletion region (a region depleted of carriers). The uncovered charge on either side of the junction sets up an electric field, E d.

7 JLW 7 free electron E d - P Si Si Si B - Si B Si - - Si Si P P + Si Si Si B P Si Si Si Si Si Si Si + + free hole phosphorus atom Si Si Si P + B - Si B + Si - Si Si P Si Si Si Si + B n-type material depletion region p-type material boron atom Figure 4: p-n junction diode. A real silicon crystal is of course 3-dimentional (see Figure 2) and thus this diagram is not a true representation of the bonding in the crystal. Rather it illustrates the idea of free electrons and free holes. The Chip The basis of the CCD chip is the metal insulator semiconductor (MIS) capacitor. A neutral silicon crystal forms the base of the chip. This crystal acts as a seed for which p-type silicon may be grown. This layer has the identical atomic orientation of its base and is called epitaxial silicon (epitaxy means arranged upon in Greek). An insulator layer of silicon dioxide or silicon dioxide and silicon nitride about 1000 Å thick is grown on top of the base. A polysilicon electrode forms the top layer. Voltages applied to the electrode sets up a depletion region where the charge may be stored. In this configuration, the charge is stored at the interface between the silicon base and the SiO 2 insulator layer. This is known as a surface channel device. A buried channel device introduces a region of n-type silicon in between the insulator material and the p-type silicon. The addition of the n-type material changes the shape of the potential well, and the charge no longer collects near the insulator material, but rather within the n-type material (2). The amounts of doping in the p and n-type materials largely

8 JLW 8 determines the depth of the well. A deep well is desirable because it can hold more charge and the dynamic range of the device is increased. However, excessive doping can increase the dark current due to the electric fields created at the p-n interface. silicon dioxide 0.1 µm polysilicon electrode 0.5 µm epitaxial layer p-type silicon 10 µm neutral substrate 500 µm Figure 5a: Cross section of a surface channel CCD chip silicon dioxide 0.1 µm n-type silicon 0.5 µm p-type silicon 3-4 µm polysilicon electrode 0.5 µm epitaxial silicon neutral substrate 500 µm Figure 5b: Cross section of a buried channel CCD chip The electrodes are long, narrow strips which are placed side by side to form much of the chip. The width of the electrode strip determines the width of a pixel (in the case of a three-phase device, a pixel is the width of three electrodes; in a virtual-phase device, the pixel is the width of about two electrodes). The vertical height of the pixels is determined by the spacing of channel stops: narrow regions of heavily p-type doped silicon (in depletion) which run perpendicular to the electrode strips. The

9 JLW 9 negative charge repels electrons and prevents them from diffusing along the length of the electrode. The simplest type of CCD chip is a three-phase device (2). This chip uses three electrodes per pixel. Every third electrode connected to the same voltage driver. Two of the electrodes are biased more negatively than the third. Thus, the electrons collect under the third electrode. The voltages are shifted one electrode at a time. This clocking of voltage causes the electrons to be shifted as well; being continuously attracted to the positively biased electrode. In this type of devise, three such transfers are required to shift the electrons by one pixel. The camera at the GAO uses a virtual-phase CCD chip. In this type there is only one electrode per pixel. The other electrodes are replaced by different levels of doping which create potential steps or a virtual electrode. The sole gate covers half of each pixel and the voltage is clocked above and below the value of the virtual electrode to transfer the charge. Virtual-phase CCDs are difficult to manufacture. They are made using Texas Instruments proprietary technology. The production of virtualphase CCDs requires great precision. If the doped regions are not exactly aligned, the potential well may have an improper shape which may trap charge and affect how efficiently the charge is read out (2).

10 JLW 10 Light collection The collection of light is one of the most crucial jobs of the CCD. A CCD collects light by the process of the photoelectric effect. Incident photons strike the surface of the chip and the energy of the photon allows some electrons to break the bonds which tie them to the crystal lattice structure. Silicon has an energy band gap of 1.1 ev, so the photon must have an energy of at least 1.1 ev in order for it to produce an e - -h pair. This photon would have a wavelength of: e=hc/λ λ=(4.14e-15 evs)(3e8 m/s)/1.1 ev λ= Å, near infrared A single e - -h pair is created with photon energies between 1.1 ev and 5 ev (2480 Å, ultraviolet). Photons with energies above 5 ev generate multiple e - -h pairs. This holds to about 10 kev (1.24 Å, soft X-rays) at which point photons become transparent to the silicon and no longer generate any e - -h pairs. On the average, one e - -h pair is created for every 3.65 ev of energy. Thus it is possible to calculate the number of e - -h pairs produced by a photon by dividing its energy by 3.65 ev. However, the transfer of energy is not ideal and a small amount of the photon s energy is absorbed in the silicon. The result is a statistical error in the calculation of the number of e - -h pairs. This error is called Fano noise and is given by (in e - rms): (FxS(e - )) Here the Fano-factor, F=0.1 and S(e-) is the number of electrons generated by a particular photon. For example, a 5 kev photon will generate 5 kev/3.65 ev = 1370 e -. The Fano noise would be, ((0.1)(1370)) = 12 e - rms. Quantum Efficiency Quantum efficiency is the sensitivity of the CCD to the incoming photons. Basically, it is a measure of the number of photons that strike the chip s surface but do not create an e - -h pair. This can be the result of many things: the photon may have been reflected or it may have been absorbed in the electrodes or other insensitive areas. Absorption is especially a problem at shorter wavelengths. At l=2500 Å, absorption

11 JLW 11 length (the distance at which 63% of incoming photons would be absorbed) is only 25 Å; the electrodes are typically thicker than 4000 Å (2). A number of things can be done to improve quantum efficiency. Some chips are thinned and illuminated from the back. This way, the photons do not have to pass through the electrodes and thus electrode absorption is minimized. The virtual-phase chips combat this problem in another way: they are frontside illuminated, but since half the pixel is not covered by the gate, absorption in the electrodes is reduced. The frontside of the chip may also be coated with a phosphor coating. This increases short wavelength response because the coating absorbs short wavelength photons and emits them as longer wavelength photons. A coronene coating can absorb photons shorter that 3900 Å and emit them at 5200 Å. This does not completely solve the problem however as the photons are emitted in all directions. Also, coronene has a gap in its sensitivity between 3900 Å and 4200 Å. For this reason, another coating, lumigen may be used. Coatings have other problems: they can evaporate and they cannot emit photons which would produce multiple e - -h pairs (the photon which the chip sees has a reduced energy). Figure 2 shows a graph showing the quantum efficiency for our TC241 chip. This graph was taken from the TI data sheets for this chip (7). Note that the peak efficiency is for wavelengths between 550 nm and 700 nm.

12 JLW 12 Figure 2

13 JLW 13 Charge Storage After the photons create the e - -h pairs, the charge must be stored for the duration of the exposure. The charge is stored in the depletion region of the metal insulator semiconductor capacitor. As mentioned above, the depletion region is created and shaped by the voltages applied to the electrodes and by the various levels of doping in the silicon. The region is depleted of free electrons over some distance. This creates a potential well which attracts negatively charged electrons freed by the photons and sweeps away positive holes. The chip is constructed such that the depletion region only extends a short distance into the silicon, with a region of neutral bulk material below it. The extent of the depletion region can affect how well the chip collects and stores charge. This is defined by the characteristic known as charge collection efficiency (CCE). If a carrier is created within the depletion region, the likelihood is that it will remain trapped there. If the carrier is created outside the depletion region, it has the opportunity to diffuse some distance before it gets swept into a neighbouring pixel or recombines with the substrate material. Electron diffusion will decrease the resolution of the device. If absorption occurs, the electron is effectively lost reducing the overall efficiency. Long wavelength photons (infrared and red) tend to be absorbed deeper in the chip than shorter wavelength photons. Thus, there is a good chance that the electrons released by these photons may recombine in the lattice, reducing CCE. These electrons also have an increased chance of lateral diffusion, reducing the resolution of the device for those wavelengths (4). Saturation Saturation occurs when a potential wells fills up. Essentially, it is the limit on the number of electrons a pixel can hold which is set by how positively biased the electrode is or the depth of the potential well. In a buried channel device, the shape of the potential well changes as it fills with charge. The potential maximum becomes lower, flatter, and broader. Eventually, the potential difference between the collecting region and barrier region becomes small or zero.

14 JLW 14 Saturation is undesirable for a few reasons. Once a pixel is saturated, it becomes insensitive to additional incoming photons. Thus the pixels of a saturated region on an image would appear to have the same value even though the number of photons which struck the surface may be different. Also, CCD sensors tend to lose their linearity as saturation is approached. Linearity is a very desirable feature and an advantage of the CCD over other forms of imaging. Blooming Blooming is another problem which occurs at saturation. When the potential of the well equals the potential of the barrier, the charge is free to cross the barrier region into neighbouring pixels. When blooming occurs, the charge may be spread up and down the column. An antiblooming gate is used on the TC241 chip to prevent this problem from occurring. However the use of this gate effectively compresses the dynamic range of the device and so is not desirable to use unless bright objects (such as planets) are being imaged. The software allows three settings for antiblooming: low, medium, and high. At the GAO, the low setting is primarily used.

15 JLW 15 Charge Transfer -- Readout The charge collected during an exposure must be read out and converted to digital units before useful information may be obtained. The process of readout, as with every other step, has its own set of problems and associated errors. The voltage on each electrode is manipulated to transfer the electrons stored in that pixel to the neighbouring one. In one transfer, the pixels in the parallel register are shifted one pixel towards the serial register, with the nearest row being transferred into the serial register. Then the pixels in the serial register are read out one at a time into the output amplifier. The process is repeated until each pixel is read out. The voltage readout across each pixel is then converted to a digital unit. One Pixel Serial Registers Parallel Registers Output Amplifier Figure 3 - Simplified chip showing 12 pixels The output electrons are deposited onto the output field effect transistor. The capacitance associated with this gate converts the charge into a voltage according to the relationship: V=Q/C

16 JLW 16 The capacitance of the output gate determines the gain of the device (in electrons/volt). The output voltage is then converted to a digital unit which can be processed by the computer. Therefore a final value for the gain can be expressed in electrons/adu (analog to digital unit). The capacitor is recharged to a specific potential after each charge packet is read-out to minimize variations in the transistor. The associated error in determining the voltage across the capacitor is given by the factor (4): (ktc) Here, k is the Boltzman constant, C is capacitance, and T is the temperature. This error is temperature dependent and it is reduced with decreasing temperature. Problems Affecting Readout Several problems can affect how accurately and how completely the charge is read out. One major problem is defects in the chip itself. If there are any breaks or defects in the electrodes, charge may become trapped and the image may appear to have bad columns. Defects in the substrate may also manifest themselves as charge traps reducing the overall CTE. The clock potentials may be affected by nearly saturated pixels and the result is a poorer CTE (4). Faulty or inefficient connections between parallel and serial registers can also result in inefficiency. The deferred charge problem is a degraded CTE at low signal levels. A chip with this problem will show very little charge being read out until a certain signal level is obtained. This non-linearity at low signal levels may be reduced by exposing the chip briefly to a light source before the exposure. This precharging has the disadvantage of increasing the noise level of the exposure.

17 JLW 17 Interpretation and Reduction Techniques There are several noise sources which must be considered when interpreting the data obtained from a CCD camera. A few of the more important of these include readout noise, dark current and gain variations. Readout Noise The readout noise is a result of the charge -> voltage conversion which takes place in the node capacitor of the system. It is irreducible and is always present. Thus, it often represents the minimum amount of noise present in an image and is sometimes referred to as the noise floor. The readout noise is representable as a Gaussian distribution and is independent of position on the CCD chip. The gain is usually adjusted such that the readout noise is resolved. That is, the number of electrons per ADU should be less than the readout noise (measured in electrons rms). The read noise is determined by several factors. The sensitivity of the sense node, the thermal white noise, and the flicker noise. The flicker noise is due to the MIS field effect transistor amplifier. It and the thermal white noise are dependent on the size of the chip; decreasing noise with increasing chip size. The sensitivity in inversely proportional to the read noise. Sensitivity decreases with increasing chip size, thus increasing noise. These conflicting factors lead to the need for a compromise concerning chip size and the reduction of readout noise. Dark Current There is also noise in the chip due to the electrons generated by thermal effects. This is known as the dark current. It is present across the chip and may also be localized in individual hot pixels. There are several classifications for dark current dependent on where in the chip the thermal currents are generated. These areas of the chip include within the neutral bulk, in the depletion region, and at the surface (Si-SiO 2 interface). The surface dark current may be greatly reduced or eliminated in buried channel devices. The dark current in the bulk is governed by the diode law: I=Ae (-B/kT) A, B, and k are constants and T is the temperature. Thus, dark current

18 JLW 18 may be reduced by lowering the operating temperature of the chip. The dark current is dealt with by subtracting a calibration frame from the image frame. The calibration frame is obtained by integrating while no incident light is falling on the chip (ie by the shutter remaining closed). Dark current is proportional to the exposure time thus, the calibration frame must be of the same exposure time as the image frame (or scaled appropriately). Flat Fielding Variations is gain across the chip are dealt with by using calibration frames known as flat fields. The image frame is divided by the flat field to correct the image. This type of noise may be caused by pixel to pixel variations in quantum efficiency and also by vignetting caused by the optical system. It is a difficult kind of noise to deal with but it is also one of the more important reductions of the image frame. Good flats are difficult to achieve because of the challenge in obtaining uniform illumination, among other things. Often the inside of the dome or a twilight sky are used for obtaining the calibration frame. However, these do not provide a truly uniformly illuminated surface. The wavelength dependence of quantum efficiency is an additional wrinkle in this reduction. Given an image of a star, a perfect flat for the frame should be taken under light of the same wavelength as that star -- a very difficult condition to meet. Other noise sources Virtual-phase chips, as well as some other chip configurations, may experience spurious charge noise. When an electrode is biased negatively, it attracts holes from the p-type silicon of the channel stops. Some of these holes may become trapped at the Si-SiO 2 interface. When the voltage is switched and biased positively, these trapped holes are repelled and may possess sufficient energy to free a bound electron. Noise may also be produced by interference from other electrical devices such as TV and radio, motors and power lines. Cosmic rays and electrical storms are further disturbances which may contribute to the noise on an image.

19 JLW 19 These are only a few of the various sources of noise which affect CCD images. A more detailed survey of noise sources will be covered in a future paper.

20 JLW 20 References 1. Janesick, James and Blouke, Morley, Sky on a Chip: The Fabulous CCD, Sky and Telescope, September, 1987, pp Janesick, James and Elliott, Tom, History and Advancements of Large Area Array Scientific CCD Imagers, Astronomical CCD Observing and Reduction Techniques, Astronomical Society of the Pacific Conference Series, Volume 23, pp. 1-67, Kotz, John C. and Treichel, Paul, Jr., Chemistry and Chemical Reactivity, Saunders College Publishing, Third ed., pp , Mackay, Craig, Charge-Coupled Devices in Astronomy, Annual Review of Astronomy and Astrophysics, Volume 24, pp , Sedra and Smith, Microelectronic Circuits, Oxford University Press, New York, Oxford, Third ed., pp , Shive, John N., Physics of Solid State Electronics, Bell Telephone Laboratories, Charles E. Merrill Publishing Co., Columbus, Ohio, pp , pp , TC x488-Pixel CCD Image Sensor, Texas Instruments Incorporated, August, revised December, 1991.