A crash course in Digital Logic

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Transcription:

crash course in Digital Logic Computer rchitecture 1DT016 distance Fall 2017 http://xyx.se/1dt016/index.php Per Foyer Mail: per.foyer@it.uu.se Per.Foyer@it.uu.se 2017 1

We start from here Gates Flip-flops Multiplexers (MUX) Demultiplexers (DEMUX) Registers Latches Shift registers RM ROM Per.Foyer@it.uu.se 2017 2

and get here! The MIPS CPU Per.Foyer@it.uu.se 2017 3

Where in the machine now? Translation (compiler) Level 5 Level 4 Translation (assembler) Level 3 Partial interpretation (OS) Interpretation (microprogram) Executed by hardware Level 2 Level 1 Level 0 Problem-oriented language level ssembly language level Operating system machine level Conventional machine level Microprogramming level Digital Logic Level int addmul( int t ) { return (t + 2) * 2; } addmul: addi $r1, $zero, 2 mul $r1, $r1, 2 jr $ra li $v0, 4 syscall 0x24020004 0x0000000c 0x03E00008 110110101111010000010110 000100010011111010100001 Per.Foyer@it.uu.se 2017 4

Binary representation rbitrary numbers can be represented in binary format. x = 2 n - 1 where n is the number of bits and x the maximum (positive) decimal number that can be represented. So: Byte (8 bits): 2 8-1 = 0 to 255 Half word (16 bits): 2 16-1 = 0 to 65.535 Word (32 bits): 2 32-1 = 0 to 4.294.967.295 Bits are numbered from right to left. 31 30 29 28 27 26 25 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 MSB LSB Per.Foyer@it.uu.se 2017 5

Negative binary numbers (1) One s complement: The most significant bit used as sign bit (negative number when set): S 31 30 29 28 27 26 25 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 This gives two representations of zero: -0 and +0 which is a problem in arithmetic calculations. Example: 00000000 = 10000000 = 0 so 0 + 0 = 127 0 = 127 which is seriously wrong. Per.Foyer@it.uu.se 2017 6

Negative binary numbers (2) Two s complement: -m 2 = inv( n 2 ) + 1 2 where n is the (negative) number and inv() is bitwise invert for a specific number of bits. Example: Convert 3 2 to negative in 8 bit representation: inv(00000011) + 1 11111100 + 1 = 11111101 symmetric representation! Examples: For 8 bits: -128 to 127 For 16 bits: -32.768 to 32.767 We can still see that a number is positive or negative by inspecting the most significant bit. Per.Foyer@it.uu.se 2017 7

Binary arithmetic Example: 69 10 and 12 10 are to be added binary: 1 1 Carry Row 0000 0000 0000 0000 0000 0000 0100 0101 (69) + 0000 0000 0000 0000 0000 0000 0000 1100 (12) 0000 0000 0000 0000 0000 0000 0101 0001 (81) Example: 12 10 is to be substracted from 69 10 using add 69+(-12) Use two s complement: Convert to binary: 0000 0000 0000 0000 0000 0000 0000 1100 (12) Invert: 1111 1111 1111 1111 1111 1111 1111 0011 dd one: 1111 1111 1111 1111 1111 1111 1111 0100 (-12) 1111 1111 1111 1111 1111 1111 1 1 Carry Row So: 0000 0000 0000 0000 0000 0000 0100 0101 (69) + 1111 1111 1111 1111 1111 1111 1111 0100 (-12) 0000 0000 0000 0000 0000 0000 0011 1001 (57) Per.Foyer@it.uu.se 2017 8

Boolean algebra (1) The algebraic logic behind gate logic. Three operators: OR logical sum, written + ND logical product, written * NOT logical negation (inversion) Let and B be two inputs and R output. Then: R is true only if is true ND B is true ( R = * B ) R is true if is true OR B is true ( R = + B ) R is true only if is NOT true ( R = ) Per.Foyer@it.uu.se 2017 9

Boolean algebra (2) There are several laws of Boolean algebra that are helpful in manipulating logic equations. Identity law: + 0 = and * 1 = Zero and One laws: + 1 = 1 and * 0 = 0 Inverse laws: + =1 and * = 0 Commutative laws: + B = B + and * B = B * ssociative laws: + (B + C) = ( + B) + C and * (B * C) = ( * B) * C Distributive laws: * (B + C) = ( * B) + ( * C) and + (B * C) = ( + B) * ( + C) Remember: ND is *, OR is + Per.Foyer@it.uu.se 2017 10

Numbers in different bases Decimal Binary Octal Hexadecimal 0 0000 0 0 1 0001 1 1 2 0010 2 2 3 0011 3 3 4 0100 4 4 5 0101 5 5 6 0110 6 6 7 0111 7 7 8 1000 10 8 9 1001 11 9 10 1010 12 11 1011 13 B 12 1100 14 C 13 1101 15 D 14 1110 16 E 15 1111 17 F Per.Foyer@it.uu.se 2017 11

Buffers and inverters In = Out with more current In = Out with more current if E is true. Else Hi-Z E = NOT = NOT if E is true. Else Hi-Z E Hi stands for High (voltage) Lo stands for Low voltage (often) zero volts Hi-Z means High Impedance (Z) Per.Foyer@it.uu.se 2017 12

OR and ND B R ( R = + B ) B R 0 0 0 0 1 1 1 0 1 OR 1 1 1 B ND R ( R = * B ) B R 0 0 0 0 1 0 1 0 0 1 1 1 Per.Foyer@it.uu.se 2017 13

NOR and NND B NOR R ( R = + B ) B R 0 0 1 0 1 0 1 0 0 1 1 0 B NND R ( R = * B ) B R 0 0 1 0 1 1 1 0 1 1 1 0 Per.Foyer@it.uu.se 2017 14

XOR and XNOR R B XOR exclusive OR True if only one of and B is true but not both B R 0 0 0 0 1 1 1 0 1 1 1 0 B XNOR exclusive NOR The opposite of the above. R B R 0 0 1 0 1 0 1 0 0 1 1 1 (XNOR is very seldom used) Per.Foyer@it.uu.se 2017 15

_ Negative logic It s sometimes easier and more convenient to invert inputs than rewriting logic using boolean algebra. B R = B R B R 0 0 0 0 1 1 1 0 0 1 1 0 Per.Foyer@it.uu.se 2017 16

1-bit full adder C IN B R C OUT B C IN R C OUT 0 0 0 0 0 0 0 1 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 1 1 1 0 0 1 1 1 1 1 1 C1 IN 2-bit adder? Right or Wrong? B C1 OUT C2 IN R1 C R2 C2 OUT Per.Foyer@it.uu.se 2017 17

Square waves Rising edge Falling edge Logic 1 Logic 0 Duty cycle Period (t) f = 1 / t Per.Foyer@it.uu.se 2017 18

Demo: How to use LogSim Our first digital playground: Testing simple gates Toying with a four bit counter Per.Foyer@it.uu.se 2017 19

Buses Bus is a number of parallel lines (bus width), often binary, that has something in common. Examples: Data bus (1, 2, 4, 8, 16, 32, 64, 2 n bits wide) ddress bus (1, 2, 4,, 2 n bits wide) Control bus (1, 2, 4,, 2 n bits wide) 8-bit bus dress bus (32) Data bus (16) M e m o r y Control bus (2) ( CE, R/W ) Per.Foyer@it.uu.se 2017 20

The rithmetic Logic Unit (LU) rithmetic Logic + B B * B / B < B == B ND B OR B XOR B LU Per.Foyer@it.uu.se 2017 21

The MIPS LU in Verilog Look at the picture. What s wrong with the Verilog code? Per.Foyer@it.uu.se 2017 22

LogSim 4-bit LU Exterior design view Status flags (out) Operand 1 (in) Operand 2 (in) Result (out) LU function (in) Per.Foyer@it.uu.se 2017 23

Demo: LogSim: 4-bit LU Testing the LU Per.Foyer@it.uu.se 2017 24

Finito la musica! Per.Foyer@it.uu.se 2017 25