EEL6246 Pwer Electrnics II Chapter 6 Lecture 6 Dr. Sam Abdel-Rahman ZVS Bst Cnverter The quasi-resnant bst cnverter by using the M-type switch as shwn in Fig. 6.29(a) with its simplified circuit shwn in Fig. 6.29(b). (a) (b) Fig 6.29 (a) Quasi-resnant bst cnverter with M-type switch. (b) Equivalent circuit.
EEL6246 Pwer Electrnics II Chapter 6 Lecture 6 Dr. Sam Abdel-Rahman ZVS Bst Cnverter Equivalent Circuit Mdes The fur circuit mdes f peratin are shwn in Fig. 6.30. (a) (b) (c) (d) Fig 6.30 equivalent circuit ndes. (a) Mde I. (b) Mde II. (c) Mde III. (d) Mde IV. 2
EEL6246 Pwer Electrnics II Chapter 6 Lecture 6 Dr. Sam Abdel-Rahman Mde I [ 0 t < t ]: Assume fr t < 0, the switch is clsed while D is pen. At t0, the switch is turned OFF, allwing the capacitr t charge by the cnstant current I in, I in il ic dv C dt With the initial capacitr vltage equals zer c Iin v t C t c ( ) The capacitr vltage reaches the utput vltage at t t v ( t ) V, t CV I in At t t v V,the dide starts cnducting since, and the cnverter enters Mde II. c Steady-State Analysis c (6.76) (6.77) (6.78) 3
EEL6246 Pwer Electrnics II Chapter 6 Lecture 6 Dr. Sam Abdel-Rahman Mde II [t t < t 2 ]: Steady-State Analysis (cnt d) At t t, the resnant stage begins since D is ON and S is OFF, The initial cnditins are v ( t ) V and i ( t ) I. c L in The expressin fr v c (t) is given by v ( t ) V I Z sin ( t t c + in O ω ) (6.79) Inductr current, il( t) Iin csω ( t t) Bk Crrectin (6.80) Evaluating Eq. (6.79) at t t 2 with v c (t 2 )0, the time interval between t t t 2 can be fund t be, ( t 2 t) sin ω V ( I Z in ) (6.8) 4
EEL6246 Pwer Electrnics II Chapter 6 Lecture 6 Dr. Sam Abdel-Rahman Mde III [t 2 t < t 3 ]: Mde III starts at t 2 when v c reaches zer, and the switch dide (anti-parallel dide) turns ON, clamping the vltage acrss C t zer At t t 2 ', S turns ON at ZVS. The switch picks up the current, and the inductr current linearly increases t I in. The initial cnditins at t t are, vc ( t ) 2 0 2 il ( t2) Iin csω ( t2 t) Bk Crrectin (6.82b) Because the capacitr vltage is zer, the inductr vltage is equal t the utput vltage. di L L dt V The inductr current becmes, V il ( t) ( t t 2 ) + il ( t2 ) (6.84) L T achieve ZVS, the switch can be turned ON anytime after t 2 and befre t 2. At t t, i reaches I in (Bk Crrectin), resulting in the time interval given in Eq. (6.85) 3 L L ( t3 t2) in L t2 V [ I i ( )] Steady-State Analysis (cnt d) (6.82a) (6.83) (6.85) 5
EEL6246 Pwer Electrnics II Chapter 6 Lecture 6 Dr. Sam Abdel-Rahman Substituting the initial cnditin int the equatin, L (6.86) ( t3 t2) Iin [ csωt ( t2 t) ] Bk Crrectin V At t t 3,the utput dide turns OFF and the entire I in current flws in the transistr and the inductr. Mde IV [t 3 t < t 4 ]: Steady-State Analysis (cnt d) At time t 3, the inductr current reaches I in (Bk Crrectin), and the utput dide turns OFF, but the switch remains clsed. The cycle f the mde will repeat again at t T s. Fig 6.3 Steady-state wavefrms fr ZVS bst cnverter. 6
EEL6246 Pwer Electrnics II Chapter 6 Lecture 6 Dr. Sam Abdel-Rahman Vltage Gain: The vltage gain in terms f the nrmalized parameter: M f ns Q [ 2π 2M + α + M Q ( csα )] (6.87) A plt f the cntrl characteristic curve f M vs. f ns is shwn in Fig. 6.32. Fig 6.32 Cntrl characteristic curve f M vs. ƒ ns fr ZVT bst cnverter. 7
EEL6246 Pwer Electrnics II Chapter 6 Lecture 6 Dr. Sam Abdel-Rahman ZVS Bst Cnverter Example 6.5 Design a ZVS-QRC bst cnverter fr the fllwing design parameters: V in 30V, P 0 30W at V 0 38V, f ns 0.4, and T s 4 µs. Assume the utput vltage ripple is limited t 2% at D 0.4. Slutin: V M.3 The vltage gain is V and with f ns 0.4, we btain Q 0.2. Using the in switching frequency, f and, the resnant s 250 khz f s 250 f khz 625kHz Ts 4µ s frequency is btained frm, 0.4 0.4 ω0 (2 π )(625) 0 L C 3 The secnd equatin in terms f L and C is btained frm, R R Q 0.2 Z LC The lad resistance is, 38 2 R 48. 3Ω 30 Substituting in the abve relatin fr Q, we btain L 48.3 240.65 C 0.2 Slving the abve tw equatins fr C and L, we btain, C. 06nF 3 (2π )(625)(0 )(240.65) 9 2 L.06 0 (240.65) 6.3µF 8
EEL6246 Pwer Electrnics II Chapter 6 Lecture 6 Dr. Sam Abdel-Rahman T calculate L and C, using the vltage ripple t be 2%, we use the fllwing relatin, where, D 0.02 f R C s D C f f n s 0.4 f R s 0.4 00 0.2 40 0.2 250 0 48.3 3 6.6µF The critical inductr value is given by, R L ( ) 2 crit D D 2 f s 48.3 2 ( 0.4) (0.4) 3 2 250 0 3.9µH T achieve a limited ripple current, it is recmmended that L be set t be abut a 00 times the critical inductr value. S we select L.4 mh. 9
EEL6246 Pwer Electrnics II Chapter 6 Lecture 6 Dr. Sam Abdel-Rahman The Buck-Bst Cnverter (a) (b) Fig 6.34 (a) ZVS buck-bst cnverter with M-type switch. (b) Simplified equivalent circuit. 0
EEL6246 Pwer Electrnics II Chapter 6 Lecture 6 Dr. Sam Abdel-Rahman Equivalent Mdes (a) (b) (c) (d) Fig 6.35 Equivalent circuits fr (a) mde I, (b) mde II, (c) mde III, and (d) mde IV. (e) Steady-state wavefrms fr υ c and i L.
EEL6246 Pwer Electrnics II Chapter 6 Lecture 6 Dr. Sam Abdel-Rahman The vltage gain in terms f M, Q, and is given in Eq. (6.88), M fns Q [ 2π 2M M + α + Q ( csα)] Vltage Gain Figure 6.36 shws the cntrl characteristic curve fr M vs. fns. f ns Bk Crrectin (6.88) Fig 6.36 Cntrl characteristic curve f M vs. ƒ ns fr ZVS buck-bst cnverter. 2