Introducing the RoVaCBE Flagship project: Roll-to-roll Vacuum-processed Carbon Based Electronics Dr Hazel Assender, University of Oxford DALMATIAN TECHNOLOGY 21 st Sept 2010 1
Organic electronics Opportunity for large-area roll-to-roll processing Mechanical flexibility Low density Low environmental impact Low cost, simple devices 21 st Sept 2010 2
Roll-to-roll processing Camvac Oxford vacuum web coating 21 st Sept 2010 3
Roll-to-roll processing: easy? All materials need to be cheap and available No high temperature processes Rough surfaces Polymers often stretch during winding Polymers outgas Brittle layers may crack or be abraded during winding Effect of deposition on underlying layers 21 st Sept 2010 4
Solvent vs. Vacuum Solvent No pumping Patterning relatively easy Less water-loss from substrate Most UK development recently Vacuum No solvent/low energy Metallisation/ceramic layers PVD rapid Multilayers easier 21 st Sept 2010 5
Example application Tagging devices on packaging Anti-counterfeiting Brand protection Product tracking Sensors Displays 21 st Sept 2010 6
Manufacturing capability Source and Drain (Metal) SEMICONDUCTOR EVAPORATION L Org. Semiconductor Gate Substrate (e.g. PET) W Possible interlayer Insulator (e.g. acrylic dielectric) Possible surface modification 21 st Sept 2010 7
Materials Organic semiconductor Molecular materials can have higher mobility than polymers (e.g. 5 cm 2 /(Vs)) Without requirement for solubility, can design for high stability product Donor R1 R1 Si R1 Acceptor R2 R2 R1 R1 Si R1 Organic dielectric Flash evaporation High speed process Already used for capacitor technology Free of pin-holes over large area Explore modification to curing process and monomers R1, R2, R3 alkyl 21 st Sept 2010 8
Circuit design Model circuits based on measured device performances Design circuits around transistor performance and patterning capability Minimise number of transistors Circuit design defines manufacturing priorities 21 st Sept 2010 9
Patterning Circuit lay-out based on MD stripes with ±100 m registration 2D patterning Decrease feature size Select and apply existing technologies Flexoprinting/oil patterning Ink jet printing Evaporation jets Contact masks Laser ablation 21 st Sept 2010 10
Technology hurdles Optimisation of process conditions for deposition of organic and inorganic thin film multilayer structures Patterning and registration of the organic layers Reproducibility and reliability in manufacture of arrays of transistors 21 st Sept 2010 11
Getting the manufacture right: pentacene deposition Self-assembling molecules -orbital overlap gives good carrier mobility. C C p z orbital overlap: bond plane of sp 2 bonding (rings) Mobility Mobility Mobility ~10-8 cm 2 V -1 s -1 ~10-6 cm 2 V -1 s -1 ~10 0 cm 2 V -1 s -1 Ordered organic material has higher charge transport mobility IBM J. RES. & DEV. VOL. 45 NO. 1 2001 21 st Sept 2010 12
Intensity (counts/s) Intensity Intensity (arb. unit) Effect of Background Gases 1154 cm -1 1178 cm -1 1158 cm -1 4 5 6 7 8 2 (deg.) N 2 Vacuum Ar 5 10 15 20 25 30 2 (deg.) N 2 Vacuum Ar 1150 1200 Raman shift (cm -1 ) Pentacene grown in N 2 ambience has the best quality of crystalline material as compared to those grown at Ar or higher vacuum. 21 st Sept 2010 13
Absorbance Absorbance Absorbance Getting the manufacture right: dielectric layer Smooth, pin-hole free layer High degree of cure Optical Profilometry 0.56 0.49 acrylate_run1 Well-cured acrylate_run3 Well-cured acrylate_run4 Incompletely cured 0.42 0.14 acrylate_run1 acrylate_run3 acrylate_run4 0.35 0.28 0.07 High quality PEN 0.21 0.00 1300 1400 1500 1600 Wavenumber (cm -1 ) 0.14 0.07 0.00 1000 1500 3000 3500 4000 0.04 Wavenumber (cm -1 ) 0.00 acrylate_run1 acrylate_run3 acrylate_run4 750 800 850 900 Wavenumber (cm -1 ) FTIR can determine the degree of cure Acrylic smoothing layer 21 st Sept 2010 14
I D (A) I D (A) I D (A) I D (A) -2.0x10-9 Improving device performance V s-d (V) -50 0.0-40 -30-20 -10 0 0.0 V S-D (V) -40-30 -20-10 0-4.0x10-9 -5.0x10-9 -6.0x10-9 -8.0x10-9 -1.0x10-8 10-5 10-6 10-7 10-8 10-9 V s-d =-40V I on /I off =1.3x10 3 3.0x10-3 2.0x10-3 1.0x10-3 0.0 (I D ) 1/2 (A) 1/2-10 -14-20 -24-30 -40-44 Increase cure current -1.0x10-8 0.0-2.0x10-6 -4.0x10-6 -6.0x10-6 Thermal anneal 0V -10V -20V -30V -40V -10V -20V -30V -40V -40-20 0 20 V G (V) -40-30 -20-10 0 V s-d (V) 21 st Sept 2010 15
Summary Can make transistors in a R2R environment High yield (>90%) Using solventless, high-speed processes Close interface between circuit design, choice of materials and manufacture Additionally need to develop tailored patterning methods and assess circuit mechanical/thermal properties. 21 st Sept 2010 16