vel slated uck-st Cnverter S-Sek Kim *,WOO-J JG,JOOG-HO SOG, Ok-K Kang, and Hee-Jn Kim ept. f Electrical Eng., Seul atinal University f Technlgy, Krea Schl f Electrical and Cmputer Eng., Hanyang University, Krea E-mail: sdl@snut.ac.kr bstract This paper prpsed a nvel slated uck- st PW C-C cnverter circuit. The tplgy which merged buck-bst mde with flyback mde can share the transfrmer and switch. t nly islated buck-bst mde current but als flyback mde current added n the ne utput current f the cnverter because the tplgy merged buck-bst mde with flyback mde. new cnverter has utstanding advantages ver the cnventinal dc-dc cnverters with respect t high efficiency, high pwer density, and cmpnent utilizatin. The peratin principle f the prpsed cnverter is described and verified by simulatin and experiment results. ls this paper presents nvel circuit and simulatin result f new active islated buck-bst cnverter.. TOUCTO ecently, a Switched-de Pwer Supply is widely used as a pwer equipment t supply a stable C pwer t an electrnic circuit part f all f electrnics and cmmunicatin equipments such as prtable telecm devices, telecmmunicatin pwer system, pwer cnditining system fr renewable energy etc. There are tw types f the islated cnverter f which main switch uses nly a single ne: ne is a frward type which transfers pwer when a switch is turned n, and the ther is a flyback type which transfers pwer when a switch is turned ff. The islated C-C cnverter is mre efficient than nn-islated cnverter because f mst applicatins require the islatin between the input and the utput. Therefre, if pssible, it is desirable t make the C- C cnverter in the frm f an islated type. Hwever, the efficiency f islated C-C cnverters is limited because islated C-C cnverters can transfer energy f a primary circuit t a secndary circuit nly when a switch is turned n r ff. ccrdingly, this paper present a new type f islated buck-bst cnverter which can increase the efficiency f the cnverter.. SOTE UCK-OOST COETE Fig. shws new islated buck-bst cnverter (hereafter called cnverter). cnverter accrding t a Fig. in which an input circuit is islated frm an utput circuit by a transfrmer T, wherein the input circuit cmprises a C surce, a primary cil f the transfrmer T cnnected in series t the C surce, and a switch Q which is cnnected in series t the primary cil f the transfrmer T and which perfrms n/ff switching; and wherein the utput circuit cmprises a secndary cil f the transfrmer T crrespnding t the primary cil f the transfrmer T, an inductr cnnected in parallel t the secndary cil f the transfrmer T, a dide f which cathde is cnnected t ne nde between the secndary cil f the transfrmer T and the inductr, a capacitr C cnnected t the ther nde between the secndary cil f the transfrmer T and an ande f the dide, and a lad resistr cnnected in parallel t the capacitr C. Prpsed cnverter perfrms as a buck-bst cnverter. t can either increase r decrease the magnitude f the dc vltage f the cnverter. erging buck-bst cnverter with flyback tplgy can share the transfrmer and pwer OSFET. t nly islated buck-bst mde current but als flyback mde current added n the ne utput current f the cnverter. new cnverter has utstanding advantages ver the cnventinal dc-dc cnverters with respect t high efficiency, high pwer density, and cmpnent utilizatin. Fig.. vel Cnverter.. ehavir f nvel cnverter The prpsed cnverter is analyzed. There are tw tplgical states in ne switching cycle. The equivalent circuits fr these states are shwn in Fig.. w we explain the peratin f the circuit shwn in Fig.. Fr this descriptin f circuit peratin, the fllwing assumptins are made.
deal switching cmpnents. Steady-state CC peratin. Stage ۱: f the switch (Q) is turned n (t -t ), the input vltage ( in ) is supplied t the primary prtin f the transfrmer and the input energy is then stred in the inductr (). w, the dide () is reverse-biased and thus is turned ff. Therefre, the buck-bst cnverter circuit is perated as shwn in Fig.. Stage ۲: ls, when the switch (Q) is turned ff (t -t ), the dide () is frward-biased and then is turned n. Therefre, the islated buck-bst circuit is perated as shwn in Fig. ٣. n such a circuit, the energy stred in the inductr () is discharged t a lad resistr, and als the energy stred in the magnetizing inductr ( ) is discharged via the secndary cil f the transfrmer. nd, the inductr current ( ) and the current ( S ) n the secndary cil f the transfrmer are added t a dide current. Cnsequently, the fllwing equatin is established: Fig.. Stage ( at t -t ). n this case, let a vltage f C surce (S) be in, a switch turn-n resistr be n, a transfrmer magnetizing inductance be, a magnetizing current be, the inductance f an inductr be, an inductr current be, the utput vltage be, and a rati f turns f the primary cil t the secndary cil be (= / ), the circuit equatin are as fllws: k X X U ( Y C X U( ( t t ) t Where X( [ i ( i ( ( ] K n C z n () k X Y X C X ( t t ) t U( U( Fig. ٣. Stage ( at t -t ). Where X( [ i ( i ( ( ] K C ()
n the steady state, a C analysis by the duty rati is as fllws: X Y ( C ( U n ) ) U ( ( ) ( ) n ) ( ) ( ) (٣) in S the cnversin rati f the prpsed cnverter is similar t the buck-bst cnverter, but cntains an added factr f. Where nd als, the utput current cnsists f the inductance current and the transfrmer magnetizing current. t can be understd that when =, the utput f the islated buck-bst cnverter increases in pwer and the current f the buck-bst mde and the current f the flyback mde are cmbined int ne utput current f the cnverter. Fig. ۴ shws the time sequence f gate drive vltages fr switch Q, the main switch vltage S, the main switch current s, the current thrugh transfrmer cil f secndary side s, the dide current, and the inductr current. (٩) C f n, ( ) in (۴) ( )( ) (۵) Frm equatin (۴),(۵) in (۶) (٧) (٨) Fig. ۴. Key Wavefrm f the cnverter.. vel ctive Clamp Cnverter Fig. ۵ shws new active clamp cnverter. nd Fig. ۶ shws the key wavefrm f the active clamp cnverter. The auxiliary switch Q is used t prvide a path fr recycling the magnetizing energy. The new cnverter s features are as the fllwing advantages. th the main and auxiliary switches perate with zer vltage switching. Sft switching can be maintained fr full line range and lad range. Where
thrugh transfrmer cil f secndary side s, the dide current, and the inductr current. Fig. ۵. vel ctive Clamp Cnverter. Fig. ٨. Experiment Wavefrms f the Cnverter. Fig. ۶. Key Wavefrms f the ctive Clamp Cnverter.. SUTO EXPEET ESUT We did the simulatins using the Fig. circuit and Fig. ۵ circuit fr prpsed cnverter. The simulatin was dne with ۵ duty rati. The simulatin and experiment results f the cnverter are presented in Fig. ٧, Fig. ٨ and Fig. ٩. Fig. ٩. Experiment Wavefrms f the Cnverter. Fig. ٨, Fig. ٩ shws the main switch vltage S, the dide current, and the inductr current. The simulatin and experiment results agree well with the theretical wavefrms. nd als we culd identify that the cnverter s utput current cnsists f the inductance current and the transfrmer magnetizing current thrugh the experiment wavefrm f the dide current, and the inductr current. Frm the simulatin and experiment results, the prpsed cnverter culd transfer energy f a primary circuit t a secndary circuit when a switch is n and ff because islated C-C cnverters which main switch uses nly a single ne can transfer energy f a primary circuit t a secndary circuit nly when a switch is turned n r ff. Fig. ٧. Simulatin Wavefrms f the Cnverter. nd we als d the simulatin fr a new active clamp cnverter. The simulatin and experiment results f the active clamp cnverter are presented in Fig.. Fig. ٧ shws the gate drive vltages fr switch Q, the main switch vltage S, the main switch current s, the current
Fig.. Simulatin Wavefrms f ctive Clamp Cnverter. Fig. shws the gate drive vltages fr the switch Q and clamp switch Q, the main switch vltage S, the main switch current S, the clamp capacitr current Cc, the current thrugh the cil f transfrmer s secndary side T, the dide current, and the inductr current. The simulatin results agree well with the theretical wavefrms.. COCUSO new cnverter tplgy has been presented. The tplgy which merged buck-bst mde with flyback mde can share the transfrmer and switch. t nly buck-bst mde current but als flyback mde current added n the ne utput current f the cnverter because the tplgy merged buck-bst mde with flyback mde. new cnverter has utstanding advantages ver the cnventinal dc-dc cnverters with respect t high efficiency, high pwer density, and cmpnent utilizatin. The peratin principle f the prpsed cnverter is described and verified by simulatin and experiment results. ls this paper presents nvel circuit and simulatin result f new active islated buck-bst cnverter. The incrpratin f the active clamp circuit int the prpsed cnverter tplgy prvides a mechanism fr achieving ZS fr bth the main and auxiliary switches. EFEECES [] bert W. Ericksn, ragan aksimvic, Fundamental f Pwer Electrnics, nternatinal Thmsn publishing. []. Watsn, G. C. Hua, F. C. ee, Characterizatin f an active clamp flyback tplgy fr pwer factr crrectin applicatins, Prceedings f the inth nnual pplied Pwer Electrnics Cnference, PP ۴-۴٨ ٩٩۴. [٣]. Watsn, G. C. Hua, F. C. ee, Characterizatin f an active clamp flyback tplgy fr pwer factr crrectin applicatins, Prceedings f the inth nnual pplied Pwer Electrnics Cnference, PP ۴-۴٨ ٩٩۴. [۴]. Watsn, G. C. Hua, F. C. ee, Characterizatin f an active clamp flyback tplgy fr pwer factr crrectin applicatins, Prceedings f the inth nnual pplied Pwer Electrnics Cnference, PP ۴-۴٨ ٩٩۴.