Analog to Digital Converters (ADCs) Note: Figures are copyrighted Proakis & Manolakis, Digital Signal Processing, 4 th Edition, Pearson Publishers. Embedded System Design A Unified HW Approach, Vahid/Givargis, 2000. Version 1 1
Digital Signal Processing 2
DSP - Advantages Digital Processing of Analog Signals Advantages: Accuracy Storage Noise Tolerance Flexibility (Reconfiguration) 3
Analog to Digital Conversion 4
A-to-D Conversion Three steps 1. Sampling 2. Quantization 3. Coding 5
A/D Sampling Conversion of a continuous-time signal into a discrete-time signal by taking samples at regular intervals x a (nt) = x(n) where T is the sampling interval 6
A/D Quantization Conversion of discrete-time continuous-valued signal into a discrete time, discrete values (digital) signal Value is chosen from a finite set of possible values Difference between unquantized sample x(n) and x q (n) is known as quantization error 7
A/D Coding Each discrete value x q (n) is represented by a b- bit binary sequence 8
Sampling of Analog Signals Many ways to sample Periodic or uniform sampling common x(n) = x a (nt) - < n < 9
Sampling of Analog Signals x(n) = x a (nt) - < n < 10
Sampling of Analog Signals F s = 1/T t = nt = n/f s Therefore, a relation exists between Analog and digital signal frequencies 11
Example Continuous Time Consider the continuous time analog signal x a (t) = A cos(2πft + θ) - < t < 12
Discrete time signal x(n) = A cos(2πfn + θ) - < n < = A cos(ωn + θ) where ω = 2πf 13
Sampling Thus, when the following analog signal is sampled, x a (t) = A cos(2πft + θ) the rate Fs = 1/T samples per sec x a (nt) = x(n) = A cos(2πfnt + θ) = A cos(2πnf/f s + θ) Comparing the above with A cos(2πfn + θ) We get f = F/Fs 14
Sampling Consequence - < F < F = frequency of analog signal Discrete-time signal -(1/2) < f < (1/2) Consequence: Periodic sampling of a continuous-time signal implies mapping of the infinite frequency range of the variable F into a finite frequency range for the variable f 15
Sampling introduces aliasing Example: F2 = 1/8 Hz F1 = -7/8 Hz Fs = 1Hz 16
The Sampling Theorem (Nyquist s Theorem) If the highest frequency contained in an analog signal x a (t) is Fmax = B and the signal is sampled at a rate Fs > 2 Fmax then x a (t) can be exactly recovered from the its sample values using interpolation function Simply put: You need to sample twice as fast the maximum frequency component, otherwise you will lose signal information 17
Example x a (t) = 3cos50 πt + 10 sin 300 π t cos100 πt Solution: Frequencies F1 = 25 Hz, F2 = 150 Hz, and F3 = 50 Hz Thus Fmax = 150 Hz Fs > Fmax = 300 Hz Nyquist Rate, F N = 300 Hz 18
Quantization Conversion of discrete-time continuous-amplitude signal to digital signal with each sample value as a finite number of digits Q[x(n)] is a quantizer on samples of continuous signal x(n) i.e., x q (n) = Q[x(n)] Error introduced due to quantization process e q( n) = x q (n) x(n) 19
Quantization An Example Consider discrete-time signal x(n) = 0.9 n, n 0 0, n < 0 x(n) is sampled at F s = 1Hz to get x a (t) 20
Quantization contd., n x(n) Discrete-time signal x q (n) (Truncation) x q (n) (Rounding) 0 1 1.0 1.0 0.0 1 0.9 0.9 0.9 0.0 2 0.81 0.8 0.8-0.01 3 0.729 0.7 0.7-0.029 4 0.6561 0.6 0.7 0.0439 5 0.59049 0.5 0.6 0.00951 6 0.531441 0.5 0.5-0.031441 E q (n) = x q (n) x(n) (Rounding) 7 0.4782969 0.4 0.5 0.0217031 8 0.43046721 0.4 0.4-0.03046721 9 0.387420489 0.3 0.4 0.012579511 21
Illustration of Quantization 22
Quantization error Limits to the range [- /2, /2] where is quantization step If x min and x max are minimum and maximum values of x(n) and L is the number of quantization levels, then = x x L 1 max min For our example, x min = 0, x max = 1, L =11, then = (1-0)/(11-1) = 0.1 (x max x min ) is known as the dynamic range 23
Quantization some observations If dynamic range is fixed, then L Accuracy e q In practice, we can reduce e q by choosing sufficient number of quantization levels Theoretically Quantization leads to loss of information It is irreversible process (many to one mapping) 24
Coding Assigning unique binary number to each quantization level L levels require 2 b bits i.e., b > log 2 L 25
Sampling & Quantization Sampling Does not result in loss of signal information Does not introduce distortion in the signal, if the signal bandwidth is finite. Quantization Noninvertible or irreversible process Results in signal distortion 26
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Successive Approximation ADC DAC = digital-to-analog converter EOC = end of conversion SAR = successive approximation register S/H = sample and hold circuit V in = input voltage V ref = reference voltage Source: Wikipedia 28
Succ. Approx. DAC Binary search through codes Compared with actual signal Needs: 1) Successive Approx. Register (SAR) 2) Internal DAC 3) Comparator 4) Sample and Hold 29
Succ Approx ADC - Algorithm for i from n-1 to 0 // n-bit SAR register do SAR[i] <- 1 // set ith bit to 1 if(vdac > Vin) then // check SAR[i] <- 0 //reset end if end for 30
Analog-to-digital converters V max = 7.5V 7.0V 6.5V 6.0V 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2.0V 1.5V 1.0V 0.5V 0V 1111 1110 1101 1100 1011 1010 1001 1000 0111 0110 0101 0100 0011 0010 0001 0000 analog input (V) 4 3 2 1 time t1 t2 t3 t4 0100 1000 0110 0101 Digital output analog output (V) 4 3 2 1 t1 t2 t3 t4 time 0100 1000 0110 0101 Digital input proportionality analog to digital digital to analog Source: Embedded System Design: A Unified HW Approach, Vahid/Givargis 31
Example: Analog-to-Digital conversion using successive approximation Given an analog input signal whose voltage should range from 0 to 15 volts, and an 8-bit digital encoding, calculate the correct encoding for 5 volts. Then trace the successive-approximation approach to find the correct encoding. Vin = 5; Vmax = 15; then the following must be true: 5/15 = d/(2 8-1) where d is the dec equiv of the code Therefore, d= 85 i.e., encoding is 01010101 32 32
Binary Search Vref = 15 V ; Vin = 5V i=7 SAR[7] = 1; d=128; V = 15 * 128/255 = 7.5 > 5 reset 0 0 0 0 0 0 0 0 i=6 SAR[6] = 1; d=64; V = 15 * 64/255 = 3.76 < 5 0 1 0 0 0 0 0 0 i=5 SAR[5] = 1; d=96; V = 15 * 96/255 = 5.64 > 5 reset 0 1 0 0 0 0 0 0 i=4 SAR[4] = 1; d=80; V = 15 * 80/255 = 4.70 < 5 0 1 0 1 0 0 0 0 33
Binary Search contd. i=3 SAR[3] = 1; d=88; V = 15 * 88/255 = 5.17 > 5 reset 0 1 0 1 0 0 0 0 i=2 SAR[2] = 1; d=84; V = 15 * 84/255 = 4.94 < 5 0 1 0 1 0 1 0 0 i=1 SAR[1] = 1; d=86; V = 15 * 86/255 = 5.05 > 5 reset 0 1 0 1 0 1 0 0 i=0 SAR[0] = 1; d=85; V = 15 * 85/255 = 5!! 0 1 0 1 0 1 0 1 34
Flash ADC Also known as direct conversion ADC 35
Flash ADC - Illustration V max = 4 V min = 0 L = 2 2-1 = (4 0 ) /(4-1) = 1.33V Vin 4V B1 B0 11 4V 3.5V 2.5V 2V 0 0 1 1 1 0 2.67V 1.33V 0V 10 01 00 1.5V 0.5V 1 0 1 36
4.5V 111 7V 0 v 110 6V 0 101 100 101 010 5V 4V 3V 2V 0 1 1 1 7 6 5 4 3 2 1 0 1 0 0 001 1V 1 000 Source: allaboutcircuits.com 37
Inverse process D/A conversion Convert Digital signal to Analog signal Connect the dots in the digital signal by interpolation Interpolation Linear Non-linear 38