Ocal 3-Sae Noninvering Transparen Lach High Performance Silicon Gae CMOS The MC74HC573 is idenical in pinou o he LS573. The devices are compaible wih sandard CMOS oupus; wih pullup resisors, hey are compaible wih LSTTL oupus. These laches appear ransparen o daa (i.e., he oupus change asynchronously) when Lach Enable is high. When Lach Enable goes low, daa meeing he seup and hold ime becomes lached. The HC573 is idenical in funcion o he HC373 bu has he daa inpus on he opposie side of he package from he oupus o faciliae PC board layou. PDIP N SUFFIX CSE 738 MRKING DIGRMS MC74HC573N WLYYWWG Feaures Oupu Drive Capabiliy: 5 LSTTL Loads Oupus Direcly Inerface o CMOS, NMOS and TTL Operaing olage Range: 2.0 o 6.0 Low Inpu Curren:.0 In Compliance wih he JEDEC Sandard No. 7.0 Requiremens Chip Complexiy: 28 FETs or 54.5 Equivalen Gaes These Devices are Pb Free and are RoHS Complian SOIC DW SUFFIX CSE 75D TSSOP DT SUFFIX CSE 948E 74HC573 WLYYWWG HC 573 LYW SOEIJ F SUFFIX CSE 967 74HC573 WLYWWG WL, L YY, Y WW, W G or = ssembly Locaion = Wafer Lo = Year = Work Week = Pb Free Package (Noe: Microdo may be in eiher locaion) ORDERING INFORMTION See deailed ordering and shipping informaion in he package dimensions secion on page 2 of his daa shee. Semiconducor Componens Indusries, LLC, May, Rev. 3 Publicaion Order Number: MC74HC573/D
PIN SSIGNMENT OUTPUT ENBLE D0 2 D 3 D2 4 D3 5 D4 6 D5 7 D6 8 9 8 7 6 5 4 3 CC Q0 Q Q2 Q3 Q4 Q5 Q6 Design Crieria alue Unis Inernal Gae Coun* 54.5 ea. Inernal Gae Progaion Delay.5 ns Inernal Gae Power Dissipaion W Speed Power Produc 0.0075 pj *Equivalen o a wo inpu NND gae. D7 9 0 2 Q7 LTCH ENBLE LOGIC DIGRM FUNCTION TBLE Inpus Oupu Oupu Lach Enable Enable D Q L H H H L H L L L L X No Change H X X Z X = Don Care Z = High Impedance DT INPUTS D0 D D2 D3 D4 D5 D6 D7 LTCH ENBLE OUTPUT ENBLE 2 9 Q0 3 8 Q 4 7 Q2 5 6 Q3 6 5 Q4 7 4 Q5 8 3 Q6 9 2 Q7 PIN = CC PIN 0 = NONINERTING OUTPUTS ORDERING INFORMTION MC74HC573NG Device Package Shipping SOIC (Pb Free) 8 Unis / Rail MC74HC573DWG MC74HC573DWR2G SOIC WIDE (Pb Free) SOIC WIDE (Pb Free) 38 Unis / Rail 000 Tape & Reel MC74HC573DTG TSSOP * 75 Unis / Rail MC74HC573DTR2G TSSOP * 2500 Tape & Reel MC74HC573FELG SOEIJ (Pb Free) 00 Tape & Reel For informaion on ape and reel specificaions, including par orienaion and ape sizes, please refer o our Tape and Reel Packaging Specificaions Brochure, BRD80/D. *This package is inherenly Pb Free. 2
MXIMUM RTINGS SymbolÎÎ Parameer Î alue Uni CC ÎÎ DC Supply olage (Referenced o ) Î 0.5 o + 7.0 in DC Inpu olage (Referenced o ) 0.5 o CC + 0.5 Î ou DC Oupu olage (Referenced o ) 0.5 o CC + 0.5 I in DC Inpu Curren, per Pin ± m I ou ÎÎ DC Oupu Curren, per Pin Î ± 35 m I CC ÎÎ DC Supply Curren, CC and Pins Î ± 75 m P D ÎÎ Power Dissipaion in Sill ir, Plasic DIP Î 750 mw SOIC Package 500 Î TSSOP Package Î 450 T sg ÎÎ Sorage Temperaure Î 65 o + 50 C T L ÎÎ Lead Temperaure, mm from Case for 0 Seconds C Î (Plasic DIP, TSSOP or SOIC Package) 260 Sresses exceeding Maximum Raings may damage he device. Maximum Raings are sress raings only. Funcional operaion above he Recommended Operaing Condiions is no implied. Exended exposure o sresses above he Recommended Operaing Condiions may affec device reliabiliy. Deraing Plasic DIP: 0 mw/ C from 65 o 25 C SOIC Package: 7 mw/ C from 65 o 25 C TSSOP Package: 6. mw/ C from 65 o 25 C RECOMMENDED ÎÎ OPERTING CONDITIONS Symbol Parameer Min Max Uni CC DC Supply olage (Referenced o ) 2.0 6.0 in, ou DC Inpu olage, Oupu olage (Referenced o ) 0 CC T ÎÎ Operaing Temperaure, ll Package Types 55 + 25 C r, f ÎÎ Inpu Rise and Fall Time CC = 2.0 (Figure ) Î CC = 4.5 0 0 000 500 ns CC = 6.0 0 400 This device conains proecion circuiry o guard agains damage due o high saic volages or elecric fields. However, precauions mus be aken o avoid applicaions of any volage higher han maximum raed volages o his high impedance circui. For proper operaion, in and ou should be consrained o he range ( in or ou ) CC. Unused inpus mus always be ied o an appropriae logic volage level (e.g., eiher or CC ). Unused oupus mus be lef open. DC ELECTRICL CHRCTERISTICS (olages Referenced o ) Guaraneed Limi ÎÎ CC 55 o Î Symbol Parameer Tes Condiions 25 C 85 C 25 C Uni Î Î Î IH Minimum High Level Inpu olage ÎÎ ou = 0. or CC 0. 2.0.5.5.5 I ou 3.0 2. 2. 2. ÎÎ 4.5 3.5 3.5 3.5 6.0 4.2 4.2 4.2 ÎÎ IL ÎÎ Maximum Low Level Inpu olage Î ou = 0. or CC 0. I Î ou 2.0 0.5 0.5 0.5 ÎÎ 3.0 0.9 0.9 0.9 4.5.35.35.35 ÎÎ 6.0.8 8.8 ÎÎ OH Minimum High Level Oupu ÎÎ olage Î in = IH or IL I ou 2.0.9.9.9 4.5 4.4 4.4 4.4 ÎÎ 6.0 5.9 5.9 5.9 Î Î in = IH or IL I ou 2.4m I ou 6.0 m 3.0 2.48 2.34 2.2 4.5 3.98 3.84 3.7 ÎÎ I ou 7.8 m 6.0 5.48 5.34 5.2 Î OL Maximum Low Level Oupu ÎÎ olage Î ou = 0. or CC 0. I ou 2.0 0. 0. 0. 4.5 0. 0. 0. ÎÎ 6.0 0. 0. 0. Î Î in = IH or IL I ou 2.4m I ou 6.0 m 3.0 0.26 0.33 0.4 4.5 0.26 0.33 0.4 ÎÎ I ou 7.8 m 6.0 0.26 0.33 0.4 Î I in Maximum Inpu Leakage Curren in = CC or ± 0. ±.0 ±.0 I OZ Maximum Three Sae Leakage Oupu in High Impedance Sae Î Curren Î in = IL or IH 6.0 Î 0.5 0 Î ou = CC or I CC ÎÎ Maximum Quiescen Supply in = CC or Î Curren (per Package) Î II ou I = 0 6.0 Î 4.0 40 60 Î 3
C ELECTRICL CHRCTERISTICS (C L = 50 pf, Inpu r = f = 6.0 ns) ÎÎ CC Guaraneed Limi ÎÎ Symbol Parameer 55 o 25 C 85 C 25 C Uni Î PLH, Maximum Propagaion Delay, Inpu D o Q 2.0 50 90 225 ns PHL Î (Figures and 5) 3.0Î 00 40 80 ÎÎ 4.5 30 38 45 Î 6.0 26 33 38 PLH ÎÎ, Maximum Propagaion Delay, Lach Enable o Q 2.0 60 0 240 ns PHL Î (Figures 2 and 5) 3.0Î 05 45 90 ÎÎ 4.5 32 40 48 ÎÎ 6.0Î 27 34 4 ÎÎ PLZ, Î Maximum Propagaion Delay, Oupu Enable o Q 2.0Î 50 90 225 ÎÎ ns PHZ (Figures 3 and 6) 3.0 00 25 50 ÎÎ 4.5 30 38 45 ÎÎ 6.0Î 26 33 38 ÎÎ PZL, Î Maximum Propagaion Delay, Oupu Enable o Q 2.0Î 50 90 225 ÎÎ ns PZH (Figures 3 and 6) 3.0 00 25 50 4.5Î 30 38 45 ÎÎ ÎÎ 6.0Î 26 33 38 ÎÎ TLH, Maximum Oupu Transiion Time, ny Oupu 2.0 60 75 90 ns THL ÎÎ (Figures and 5) 3.0 27 32 36 ÎÎ 4.5Î 2 5 8 ÎÎ 6.0 0 3 5 Î C in Maximum Inpu Capaciance 0 0 0 pf Î C ou Maximum 3 Sae Oupu Capaciance (Oupu in High Impedance Sae) C PD Power Dissipaion Capaciance (Per Enabled Oupu)* * Used o deermine he no load dynamic power consumpion: P D = C PD 2 CC f + I CC CC. 5 5 5 Typical @ 25 C, CC = Î TIMING REQUIREMENTS (C L = 50 pf, Inpu r = f = 6.0 ns) Guaraneed Limi ÎÎ 55 o 25 C 85 C 25 C CC Symbol Parameer Figure Min Max Min Max Min Max Uni Î su Minimum Seup Time, Inpu D o Lach Enable 4 2.0 50 65 75 ns Î 3.0 40 50 60 4.5 0 3 5 6.0 9.0 3 Î h Minimum Hold Time, Lach Enable o Inpu D 4 2.0 ns Î 3.0 4.5 Î 6.0 w ÎÎ Minimum Pulse Widh, Lach Enable 2 2.0 75 95 0 ns 3.0 60 80 90 4.5 5 9 22 Î 6.0 3 6 9 r, f ÎÎ Maximum Inpu Rise and Fall Times 2.0 000 000 000 ns 3.0 800 800 800 ÎÎ 4.5 500 500 500 Î 6.0 400 23 400 400 pf pf 4
SWITCHING WEFORMS INPUT D r 0% 90% f CC LTCH ENBLE w CC Q PLH 0% 90% PHL PLH PHL TLH THL Q Figure. Figure 2. OUTPUT ENBLE Q Q M PZL PZH PLZ PHZ 0% M 90% MC74HC573: M = OH x 0.5 MC74HCT573: M =.3 @ CC = 3 CC HIGH IMPEDNCE OL OH HIGH IMPEDNCE INPUT D LTCH ENBLE Figure 3. Figure 4. SU LID h CC CC TEST POINT D0 2 D 9 Q0 DEICE UNDER TEST OUTPUT C L * D 3 D 8 Q D2 4 D 7 Q2 *Includes all probe and jig capaciance Figure 5. Tes Circui D3 5 D 6 Q3 D4 6 D 5 Q4 D5 7 D 4 Q5 DEICE UNDER TEST TEST POINT OUTPUT k C L * CONNECT TO CC WHEN TESTING PLZ ND PZL. CONNECT TO WHEN TESTING PHZ ND PZH. D6 8 D 3 Q6 D7 9 D 2 Q7 LTCH ENBLE *Includes all probe and jig capaciance OUTPUT ENBLE Figure 6. Tes Circui Figure 7. EXPNDED LOGIC DIGRM 5
PCKGE DIMENSIONS PDIP N SUFFIX CSE 738 03 ISSUE E 0 B NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y4.5M, 982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LED WHEN FORMED PRLLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLSH. T SETING PLNE G E F D PL N K C 0.25 (0.00) M T M L M J PL 0.25 (0.00) M T B M INCHES MILLIMETERS DIM MIN MX MIN MX.00.070 25.66 27.7 B 0.240 0.260 6.0 6.60 C 0.50 0.80 3.8 4.57 D 0.05 0.022 0.39 0.55 E 0.050 BSC.27 BSC F 0.050 0.070.27.77 G 0.00 BSC 2.54 BSC J 0.008 0.05 0.2 0.38 K 0.0 0.40 2.80 3.55 L 0.300 BSC 7.62 BSC M 0 5 0 5 N 0.0 0.040 0.5.0 SOIC DW SUFFIX CSE 75D 05 ISSUE G H 0X 0.25 M B M D E h X 45 NOTES:. DIMENSIONS RE IN MILLIMETERS. 2. INTERPRET DIMENSIONS ND TOLERNCES PER SME Y4.5M, 994. 3. DIMENSIONS D ND E DO NOT INCLUDE MOLD PROTRUSION. 4. MXIMUM MOLD PROTRUSION 0.5 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DMBR PROTRUSION. LLOWBLE PROTRUSION SHLL BE 0.3 TOTL IN EXCESS OF B DIMENSION T MXIMUM MTERIL CONDITION. X B 0.25 M T S 8X e 0 B B S T SETING PLNE C L MILLIMETERS DIM MIN MX 2.35 2.65 0.0 0.25 B 0.35 0.49 C 0.23 0.32 D 2.65 2.95 E 7.40 7.60 e.27 BSC H 0.05 0.55 h 0.25 0.75 L 0.50 0.90 0 7 6
PCKGE DIMENSIONS TSSOP DT SUFFIX CSE 948E 02 ISSUE C 0.5 (0.006) T L 0.5 (0.006) T U 2X L/2 PIN IDENT U S S C 0.00 (0.004) T SETING PLNE X K REF 0.0 (0.004) M T U S S 0 D G H B U N J J N K K ÍÍÍÍ ÍÍÍÍ SOLDERING FOOTPRINT 7.06 SECTION N N 0.25 (0.00) M NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y4.5M, 982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION DOES NOT INCLUDE MOLD FLSH, PROTRUSIONS OR GTE BURRS. MOLD FLSH OR GTE BURRS SHLL NOT EXCEED 0.5 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLED FLSH OR PROTRUSION. INTERLED FLSH OR PROTRUSION SHLL NOT EXCEED 0.25 (0.00) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DMBR PROTRUSION. LLOWBLE DMBR PROTRUSION SHLL BE 0.08 (0.003) TOTL IN EXCESS OF THE K DIMENSION T MXIMUM MTERIL CONDITION. 6. TERMINL NUMBERS RE SHOWN FOR REFERENCE ONLY. 7. DIMENSION ND B RE TO BE DETERMINED T DTUM PLNE W. F MILLIMETERS INCHES DIM MIN MX MIN MX DETIL E 6.40 6.60 0.252 0.260 B 4.30 4.50 0.69 0.77 C ---. --- 0.047 W D 0.05 0.5 0.002 0.006 F 0.50 0.75 0.0 0.030 G 0.65 BSC 0.026 BSC H 0.27 0.37 0.0 0.05 J 0.09 0. 0.004 0.008 DETIL E J 0.09 0.6 0.004 0.006 K 0.9 0.30 0.007 0.02 K 0.9 0.25 0.007 0.00 L 6.40 BSC 0.252 BSC M 0 8 0 8 0.65 PITCH 6X 0.36 6X.26 DIMENSIONS: MILLIMETERS 7
PCKGE DIMENSIONS SOEIJ F SUFFIX CSE 967 0 ISSUE e E H E 0 Z D b 0.3 (0.005) M 0.0 (0.004) IEW P M L E Q L DETIL P c NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y4.5M, 982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D ND E DO NOT INCLUDE MOLD FLSH OR PROTRUSIONS ND RE MESURED T THE PRTING LINE. MOLD FLSH OR PROTRUSIONS SHLL NOT EXCEED 0.5 (0.006) PER SIDE. 4. TERMINL NUMBERS RE SHOWN FOR REFERENCE ONLY. 5. THE LED WIDTH DIMENSION (b) DOES NOT INCLUDE DMBR PROTRUSION. LLOWBLE DMBR PROTRUSION SHLL BE 0.08 (0.003) TOTL IN EXCESS OF THE LED WIDTH DIMENSION T MXIMUM MTERIL CONDITION. DMBR CNNOT BE LOCTED ON THE LOWER RDIUS OR THE FOOT. MINIMUM SPCE BETWEEN PROTRUSIONS ND DJCENT LED TO BE 0.46 ( 0.08). MILLIMETERS INCHES DIM MIN MX MIN MX --- 2.05 --- 0.08 0.05 0. 0.002 0.008 b 0.35 0.50 0.04 0.0 c 0.5 0.25 0.006 0.00 D 2.35 2.80 0.486 0.504 E 5.45 0. 0.25 e.27 BSC 0.050 BSC H E 7.40 8. 0.29 0.323 L 0.50 0.85 0.0 0.033 L E.0.50 0.043 0.059 M 0 0 0 0 Q 0.70 0.90 0.028 0.035 Z --- 0.8 --- 0.032 ON Semiconducor and are regisered rademarks of Semiconducor Componens Indusries, LLC (SCILLC). SCILLC reserves he righ o make changes wihou furher noice o any producs herein. SCILLC makes no warrany, represenaion or guaranee regarding he suiabiliy of is producs for any paricular purpose, nor does SCILLC assume any liabiliy arising ou of he applicaion or use of any produc or circui, and specifically disclaims any and all liabiliy, including wihou limiaion special, consequenial or incidenal damages. Typical parameers which may be provided in SCILLC daa shees and/or specificaions can and do vary in differen applicaions and acual performance may vary over ime. ll operaing parameers, including Typicals mus be validaed for each cusomer applicaion by cusomer s echnical expers. SCILLC does no convey any license under is paen righs nor he righs of ohers. SCILLC producs are no designed, inended, or auhorized for use as componens in sysems inended for surgical implan ino he body, or oher applicaions inended o suppor or susain life, or for any oher applicaion in which he failure of he SCILLC produc could creae a siuaion where personal injury or deah may occur. Should Buyer purchase or use SCILLC producs for any such uninended or unauhorized applicaion, Buyer shall indemnify and hold SCILLC and is officers, employees, subsidiaries, affiliaes, and disribuors harmless agains all claims, coss, damages, and expenses, and reasonable aorney fees arising ou of, direcly or indirecly, any claim of personal injury or deah associaed wih such uninended or unauhorized use, even if such claim alleges ha SCILLC was negligen regarding he design or manufacure of he par. SCILLC is an Equal Opporuniy/ffirmaive cion Employer. This lieraure is subjec o all applicable copyrigh laws and is no for resale in any manner. PUBLICTION ORDERING INFORMTION LITERTURE FULFILLMENT: Lieraure Disribuion Cener for ON Semiconducor P.O. Box 563, Denver, Colorado 8027 US Phone: 303 675 275 or 800 344 3860 Toll Free US/Canada Fax: 303 675 276 or 800 344 3867 Toll Free US/Canada Email: orderli@onsemi.com N. merican Technical Suppor: 800 282 9855 Toll Free US/Canada Europe, Middle Eas and frica Technical Suppor: Phone: 42 33 790 290 Japan Cusomer Focus Cener Phone: 8 3 5773 3850 8 ON Semiconducor Websie: www.onsemi.com Order Lieraure: hp://www.onsemi.com/orderli For addiional informaion, please conac your local Sales Represenaive MC74HC573/D