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Transcription:

EE123 Digital Signal Processing Lecture 19 Practical ADC/DAC

Ideal Anti-Aliasing ADC A/D x c (t) Analog Anti-Aliasing Filter HLP(jΩ) sampler t = nt x[n] =x c (nt ) Quantizer 1 X c (j ) and s < 2 1 T X s (j ) s /2 s X c (j )H LP (j ) 1 and s < 2 1 T X s (j ) s /2 s /2 s

Non Ideal Anti-Aliasing X c (j )H LP (j ) 1 interference noise s /2 Problem: Hard to implement sharp analog filter Tradeoff: Crop part of the signal Suffer from noise and interference (See lab II!)

Oversampled ADC ADC A/D x c (t) Sharp Analog C/D x[n] =x c (nt ) Anti-Aliasing Filter HLP(jΩ) T Quantizer Oversampled ADC A/D x c (t) Simple Analog Anti-Aliasing Filter C/D T = 1 M ( ) Sharp Digital Anti-aliasing filter M M Quantizer

Oversampled ADC 1 X c (j )H LP (j ) s /2 1 s /2

Oversampled ADC 1 X c (j )H LP (j ) s /2 after oversampling x2 1/T ˆX(e j! ) aliased noise

Oversampled ADC after oversampling x2 1/T ˆX(e j! ) aliased noise after digital LP and decimation 1/T d ˆXd (e j! ) T d = MT

Sampling and Quantization ADC A/D x c (t) C/D T x[n] =x c (nt ) Quantizer ˆx[n] 2X m

Sampling and Quantization for 2 s complement with B+1 bits 1 apple ˆx B [n] < 1 = 2X m 2 B+1 = X m 2 B ˆx[n] =X mˆx B [n] 2X m

Quantization Error x[n] Quantizer ˆx[n] Model quantization error as noise In that case: x[n] + ˆx[n] =x[n]+e[n] e[n] /2 apple e[n] < /2 ( X m /2) <x[n] apple (X m /2)

Noise Model for Quantization Error Assumptions: Model e[n] as a sample sequence of a stationary random process e[n] is not correlated with x[n], e.g., E e[n] x[n] = 0 e[n] not correlated with e[m], e.g., E e[n] x[m] = 0 m n (white noise) e[n] ~ U[-Δ/2, Δ/2] Result: 2 2 2 Variance is: e =, or e = 2 2B Xm 2 since 12 =2 12 B X m Assumptions work well for signals that change rapidly, are not clipped and for small Δ

Quantization Noise Figure 4.57 (continued) (b) Quantized samples of the cosine waveform in part (a) with a 3-bit quantizer. (c) Quantization error sequence for 3-bit quantization of the signal in (a). (d) Quantization error sequence for 8-bit quantization of the signal in (a).

SNR of Quantization Noise For uniform B+1 bits quantizer: SNR Q = 10 log 10 2x 2 e = 10 log 10 12 2 2B 2 x X 2 m 2 e = 2 2B Xm 2 12 SNR Q =6.02B + 10.8 20 log 10 Xm x Quantizer range rms of amp

SNR of Quantization Noise SNR Q =6.02B + 10.8 20 log 10 Xm x Improvement of 6dB with every bit Quantizer range rms of amp The range of the quantization must be adapted to the rms amplitude of the signal Tradeoff between clipping and noise! Often use pre-amp Sometimes use analog auto gain controller (AGC) If σx = Xm/4 then SNRQ 6B - 1.25dB so SNR of 90-96 db requires 16-bits (audio)

Quantization noise in Oversampled ADC x c (t) x[n] ˆx[n] =x[n]+e[n] T = C/D M e[n] + LPF ωc=π/m M ˆx d [n] = x d [n]+e d [n] X c (j ) 1 ˆX(e j! ) ΩNM/π σe 2 π/m ˆX d (e j! ) ΩN/π σe 2 /M

Quantization noise in Oversampled ADC Energy of xd[n] equals energy of x[n] No filtering of signal! Noise std is reduced by factor of M SNR Q =6.02B + 10.8 20 log 10 Xm x + 10 log 10 M For doubling of M we get 3dB improvement, which is the same as 1/2 a bit of accuracy With oversampling of 16 with 8bit ADC we get the same quantization noise as 10bit ADC!

Practical ADC (Ch. 4.8.4) D.T x[n] =x(t) t=nt sinc pulse generator x r (t) = 1X n= 1 C.T x[n]sinc t nt T Scaled train of sinc pulses Difficult to generate sinc Too long!

Practical ADC D.T x[n] =x(t) t=nt Interp. Filter h 0 (t) H 0 (jω) C.T analog processing Recon. Filter h r (t) H r (jω) x r (t) = X x[n]h 0 (t nt ) h 0 (t) is finite length pulse easy to implement For example: zero-order hold 1 H 0 (j ) = Te j T 2 sinc( s ) T

Practical ADC Zero-Order-Hold interpolation x 0 (t) 0 T 2T 3T 4T 5T 1X x 0 (t) = x[n]h 0 (t nt )=x 0 (t) x s (t) Taking a FT: n= 1 X ( j ) = H 0 (j )X s (j ) = H 0 (j ) 1 1X T k= 1 X(j( k s ))

Practical ADC Output of the reconstruction filter: X r (j ) = H r (j ) H 0 (j ) X s (j ) H r (j ) = H r (j ) {z } Te j T 2 sinc( ) {z s recon } filter X H 0 (j ) from zero-order hold 1 {z } 1 1X X(j( k s )) T k= 1 {z } Shifted copies from sampling X s (j )

Practical ADC X s (j ) Ideally: X s (j )H LP (j )

Practical ADC X s (j ) Practically: X s (j )H 0 (j )

Practical ADC X s (j ) Practically: X s (j )H 0 (j ) = *

Practical ADC X s (j ) Practically: X s (j )H 0 (j )H r (j )

Easier Implementation with Digital upsampling x[n] X s (j ) L x e [n] LPF gain=l /L Practically: X s (j )H 0 (j )H r (j )

Easier Implementation with Digital upsampling easier implementing with analog components Need analog components made of Nonobtainium