Inducing Chaos in the p/n Junction

Similar documents
Delayed Feedback and GHz-Scale Chaos on the Driven Diode-Terminated Transmission Line

RF Upset and Chaos in Circuits: Basic Investigations. Steven M. Anlage, Vassili Demergis, Ed Ott, Tom Antonsen

Chaos Experiments. Steven M. Anlage Renato Mariz de Moraes Tom Antonsen Ed Ott. Physics Department University of Maryland, College Park

Experimental and Simulated Chaotic RLD Circuit Analysis with the Use of Lorenz Maps

A simple electronic circuit to demonstrate bifurcation and chaos

Demonstration of Chaos

Homework Assignment 08

Section 4. Nonlinear Circuits

arxiv:chao-dyn/ v1 14 May 1998

Chaos in Modified CFOA-Based Inductorless Sinusoidal Oscillators Using a Diode

Lecture 23: Negative Resistance Osc, Differential Osc, and VCOs

EE 321 Analog Electronics, Fall 2013 Homework #3 solution

Mod. Sim. Dyn. Sys. Amplifiers page 1

Package TO Symbol Parameter Value Unit Test Conditions Note. V GS = 20 V, T C = 25 C Fig. 19 A 40 V GS = 20 V, T C = 100 C.

L03: pn Junctions, Diodes

Q. 1 Q. 25 carry one mark each.

55:041 Electronic Circuits The University of Iowa Fall Exam 2

Package. Symbol Parameter Value Unit Test Conditions Note. V GS = 20 V, T C = 25 C Fig. 19 A 24 V GS = 20 V, T C = 100 C.

TO-247-3L Inner Circuit Product Summary I C) R DS(on)

A New Circuit for Generating Chaos and Complexity: Analysis of the Beats Phenomenon

Mod. Sim. Dyn. Sys. Amplifiers page 1

Package TO Symbol Parameter Value Unit Test Conditions Note. V GS =20 V, T C = 25 C Fig. 19 A 60 V GS =20 V, T C = 100 C.

Electronic Circuits Summary

ELECTROMAGNETIC OSCILLATIONS AND ALTERNATING CURRENT

PHYS225 Lecture 9. Electronic Circuits

Chaos and R-L diode Circuit

Package TO Symbol Parameter Value Unit Test Conditions Note V GS = 20 V, T C = 25 C A 6 V GS = 20 V, T C = 100 C.

LSIC1MO120E V N-channel, Enhancement-mode SiC MOSFET

Final Exam. 55:041 Electronic Circuits. The University of Iowa. Fall 2013.

Chaotic Operation of a Colpitts Oscillator in the Presence of Parasitic Capacitances

Package. Symbol Parameter Value Unit Test Conditions Note. V GS = 15 V, T C = 25 C Fig. 19 A 15 V GS = 15 V, T C = 100 C.

An Analogue Circuit to Study the Forced and Quadratically Damped Mathieu-Duffing Oscillator

Demonstration of Chaos

Prof. Anyes Taffard. Physics 120/220. Voltage Divider Capacitor RC circuits

RICH VARIETY OF BIFURCATIONS AND CHAOS IN A VARIANT OF MURALI LAKSHMANAN CHUA CIRCUIT

Metastable states in an RF driven Josephson oscillator

Package. TAB Drain. Symbol Parameter Value Unit Test Conditions Note. V GS = 15 V, T C = 25 C Fig. 19 A 22.5 V GS = 15 V, T C = 100 C.

junctions produce nonlinear current voltage characteristics which can be exploited

A Novel Tunable Dual-Band Bandstop Filter (DBBSF) Using BST Capacitors and Tuning Diode

PRE-BOARD EXAMINATION STD : XII MARKS : 150

MUR3020WT. Ultrafast Rectifier. t rr = 35ns I F(AV) = 30Amp V R = 200V. Bulletin PD rev. C 05/01. Features. Package Outline

Controlling Chaos in a State-Dependent Nonlinear System

Package. Symbol Parameter Value Unit Test Conditions Note V GS = 15 V, T C = 25 C Fig. 19 A 7.5 V GS = 15 V, T C = 100 C.

1.1 An excitation is applied to a system at t = T and its response is zero for < t < T. Such a system is (a) non-causal system.

Package. Renewable energy EV battery chargers High voltage DC/DC converters Switch Mode Power Supplies Part Number Package Marking

Package. TAB Drain S S G. Symbol Parameter Value Unit Test Conditions Note. V GS = 15 V, T C = 25 C Fig. 19 A 13.5 V GS = 15 V, T C = 100 C

ECE PN Junctions and Diodes

The Smallest Transistor-Based Nonautonomous Chaotic Circuit

Package. Drain. Symbol Parameter Value Unit Test Conditions Note. V GS = 15 V, T C = 25 C Fig. 19 A 40 V GS = 15 V, T C = 100 C.

Module 25: Outline Resonance & Resonance Driven & LRC Circuits Circuits 2

Package. Symbol Parameter Value Unit Test Conditions Note. V GS = 15 V, T C = 25 C Fig. 19 A 19.7 V GS = 15 V, T C = 100 C.

ECE 340 Lecture 27 : Junction Capacitance Class Outline:

Synchronization and control in small networks of chaotic electronic circuits

Diodes for Power Electronic Applications

CHAPTER 14 SIGNAL GENERATORS AND WAVEFORM SHAPING CIRCUITS

Energy Storage Elements: Capacitors and Inductors

High Speed Communication Circuits and Systems Lecture 4 Generalized Reflection Coefficient, Smith Chart, Integrated Passive Components

IKW40N120T2 TrenchStop 2 nd Generation Series

AO V Dual P + N-Channel MOSFET

The colpitts oscillator family

Chua s Oscillator Using CCTA

I C. A Pulsed collector current, t p limited by T jmax I Cpuls 3.5 Turn off safe operating area V CE 1200V, T j 150 C - 3.

MFJ 259/259B Operation & Simplified Calibration

Chapter 13 Small-Signal Modeling and Linear Amplification

55:041 Electronic Circuits The University of Iowa Fall Final Exam

KH600. 1GHz, Differential Input/Output Amplifier. Features. Description. Applications. Typical Application

Introduction to CMOS RF Integrated Circuits Design

STARPOWER IGBT GD25FST120L2S_G8. General Description. Features. Typical Applications. Equivalent Circuit Schematic SEMICONDUCTOR

1200 V 600 A IGBT Module

KDG25R12KE3. Symbol Description Value Units V CES Collector-Emitter Blocking Voltage 1200 V V GES Gate-Emitter Voltage ±20 V

General Purpose Transistors

AO3411 P-Channel Enhancement Mode Field Effect Transistor

Switched-Capacitor Circuits David Johns and Ken Martin University of Toronto

Fast IGBT in NPT-technology with soft, fast recovery anti-parallel Emitter Controlled Diode

Session 6: Solid State Physics. Diode

Study of Chaos and Dynamics of DC-DC Converters BY SAI RAKSHIT VINNAKOTA ANUROOP KAKKIRALA VIVEK PRAYAKARAO

NAME SID EE42/100 Spring 2013 Final Exam 1

Fast IGBT in NPT-technology with soft, fast recovery anti-parallel Emitter Controlled Diode

Low Loss DuoPack : IGBT in TrenchStop and Fieldstop technology with soft, fast recovery anti-parallel Emitter Controlled HE diode

CMOS Cross Section. EECS240 Spring Dimensions. Today s Lecture. Why Talk About Passives? EE240 Process

Parameter Symbol Conditions Values Unit. V CC = 900 V, V CEM 1200 V V GE 15 V, Tv j 125 ºC

SKP15N60 SKW15N60. Fast IGBT in NPT-technology with soft, fast recovery anti-parallel Emitter Controlled Diode

Tunnel Diodes (Esaki Diode)

60EPU02PbF 60APU02PbF

Chapter 33. Alternating Current Circuits

STARPOWER IGBT GD30PJT60L2S. General Description. Features. Typical Applications. Equivalent Circuit Schematic SEMICONDUCTOR

IRGP30B60KD-EP V CES = 600V I C = 30A, T C =100 C. t sc > 10µs, T J =150 C. V CE(on) typ. = 1.95V. Absolute Maximum Ratings. Thermal Resistance

IXYX25N250CV1 IXYX25N250CV1HV

AON V Common-Drain Dual N-Channel MOSFET

Electric Circuits. Overview. Hani Mehrpouyan,

STARPOWER IGBT GD25FSY120L2S. General Description. Features. Typical Applications. Equivalent Circuit Schematic SEMICONDUCTOR

TRENCHSTOP Series. Low Loss DuoPack : IGBT in TRENCHSTOP and Fieldstop technology with soft, fast recovery anti-parallel Emitter Controlled HE diode

Chapter 11 AC and DC Equivalent Circuit Modeling of the Discontinuous Conduction Mode

HFB20HJ20C. Ultrafast, Soft Recovery Diode. Features. Description. Absolute Maximum Ratings. 1 PD A V R = 200V I F(AV) = 20A

Lecture 040 Integrated Circuit Technology - II (5/11/03) Page ECE Frequency Synthesizers P.E. Allen

Holes (10x larger). Diode currents proportional to minority carrier densities on each side of the depletion region: J n n p0 = n i 2

EECS240 Spring Today s Lecture. Lecture 2: CMOS Technology and Passive Devices. Lingkai Kong EECS. EE240 CMOS Technology

GP1M003A080H/ GP1M003A080F GP1M003A080HH/ GP1M003A080FH

Fast IGBT in NPT-technology with soft, fast recovery anti-parallel EmCon diode

A New Dynamic Phenomenon in Nonlinear Circuits: State-Space Analysis of Chaotic Beats

Transcription:

Inducing Chaos in the p/n Junction Renato Mariz de Moraes, Marshal Miller, Alex Glasser, Anand Banerjee, Ed Ott, Tom Antonsen, and Steven M. Anlage CSR, Department of Physics MURI Review 14 November, 2003 Funded by STIC/STEP and Air Force MURI

Motivation Identify the origins of chaos in the driven resistor inductor - varactor diode series circuit Establish a universal picture of chaos in circuits containing p/n junctions Identify new opportunities to induce chaos exploiting the p/n junction nonlinearity John Rodgers talk

Driven Resistor-Inductor-Diode Circuit Studied since the 1980 s Why is the driven RLD circuit so important? Simplest passive circuit that displays period doubling and chaos It is a good model of the ubiquitous p-n junction and its nonlinearities L D V DRIVEN R

Chaos in the Driven RLD Circuit 1 R L D Voltage across Resistor R ~ I 2 4 I V 0 sin(ωt) chaos Maximum Voltage across Resistor R 1 4 chaos 2 Driving Amplitude V 0 (V) Bifurcation diagram R = 25 Ω L = 50 µh D = NTE610 f = 2.5 MHz

Period-doubling phase diagrams Low Freq. Driving Voltage V 0 (V) Low Freq. Driving Voltage (V) V LF (b) L resonance RLD V LF = V 0 cos(2π f t) Period-1 D R f (MHz) 0 HF signal applied LC j (0) No HF signal Diode = NTE610 L = 390 nh R = 25 Ω f 0 70 MHz f (MHz) f Period-1 1 Period-2 or more complicated behavior RLD + op-amp circuit

Nonlinearity of the p-n Junction The diffusive dynamics of majority and minority charge carriers in the p-n junction is complex and nonlinear Charge distribution profiles for a forward-biased diode that is suddenly switched off at t = 0 V D n p0 V D n p (x,t) t = 0 I(V D ) C(V D ) V D or Battery p n (x,t) C t = 0 (forward biased and conducting) t = τ s p n0 x t = τ RR (reverse biased and off) All models of chaotic dynamics in p-n junctions approximate the charge dynamics using nonlinear lumped-elements Real Diode NLCR V D Hunt C(V D ) or I(V D ) C Approximate Nonlinear NLCR Lumped-element Hunt

Resistor-Inductor-Diode Circuit What is the cause of chaos? There are 3 competing forms of nonlinearity in this problem: 1. Nonlinear I-V curve I rv (Q). Traditional focus rectification 2. Nonlinear C(V) => V v (Q). C increases by x4 period doubling 1 10 Van Buskirk + Jeffries, Chua, Crevier, etc. -9 f 0 = 2π 1 LC( V ) 8 10-10 6 10-10 4 10-10 2 10-10 C(V) (F) -1-0.5 0.5 1 Reverse Voltage (-V v ) 3. Finite minority carrier lifetime or reverse recovery time. Delayed feedback The p/n junction retains memory of previous fwd-bias current swings Rollins + Hunt => No consensus on the origin of chaos

Reverse Recovery Time τ RR I DIODE (A) A forward-biased diode that is shut off will continue to conduct for the reverse recovery time, τ RR τ RR τ s τ t Diode 1N4007 R = 25 Ω Piecewise linear capacitor τ s = storage time τ t = transition time τ RR = τ s + τ t Drive Voltage (V) V R I DIODE Time (µs)

τ rr vs. Diode 1.2µs t (s) D A=5V V DC =0 R=25 Ω Voltage drop at resistor (V) f=100 khz f=700 khz f=700 khz f=700 khz 1N5475B, varactor 120ns NTE610, varactor 60ns 1N4148, fast recovery 0 1N4007, rectifier

Search for Period Doubling and Chaos in Driven RLD Circuit Diode τ RR (ns) C j (pf) Results with f 0 ~ 1/τ RR 1N5400 7000 81 Period-doubling and chaos for f/f 0 ~ 0.11 1.64 1N4007 700 19 Period-doubling and chaos for f/f 0 ~ 0.13 2 1N5475B 160 82 Period-doubling and chaos for f/f 0 ~ 0.66 2.2 NTE610 45 16 Period-doubling and chaos for f/f 0 ~ 0.14 3.84 V LF L RLD V 0 sin(2π ft) D R Results with f 0 ~ 10/τ RR Period-doubling and chaos f/f 0 ~ 0.16 1.76 Period-doubling and chaos for f/f 0 ~ 0.23 1.3 No chaos, nor period-doubling Period-doubling only for f/f 0 ~ 1.17 3.25 f 0 = 2π 1 LC j Results with f 0 ~ 100/τ RR No chaos, nor period-doubling No period doubling or chaos No chaos, nor period-doubling No chaos, nor period-doubling

Circuit Chaos: Rule of Thumb Driven Nonlinear Diode Resonator L D V DRIVEN sin(ωt) R For lumped element nonlinear diode resonator circuits, Period Doubling and Chaos are observed for sufficiently large driving amplitudes when; and ω ~ ω 0 /10 4 ω 0 where ω0 = 1 LC j ω 0 < 10/τ RR to 100/τ RR and C j is the diode junction capacitance τ RR is the reverse recovery time of the diode

Circuit Chaos Driven Nonlinear Diode Resonator (technical detail) Several kinds of models of the driven RLD circuit show behavior consistent with experiment V D I(V D ) NLCR V D C(V D ) or Battery C Hunt Universal Feature of All Models: All models display a reverse-recovery-like phenomenon, associated with a charge storage mechanism. When ω >> 1/τ RR period doubling and chaos are strongly suppressed

Piecewise Linear Capacitor has a Reverse Recovery Time τ RR V I DIODE (A) τ RR Diode 1N4007 R = 25 Ω slope 1/C 2 E 0 slope 1/C 1 Q τ s τ t Piecewise linear capacitor PLC Model for the diode Drive Voltage (V) V R I DIODE Time (µs)

Circuit Chaos Driven Nonlinear Diode Resonator The reverse recovery time of the diode is itself a nonlinear function of many parameters, including; History of current transients in the diode Pulse amplitude Pulse frequency Pulse duty cycle DC bias on the junction Influence τ RR These nonlinearities can expand the range of driving parameters over which period doubling and chaos are observed.

DC Bias Dependence of Reverse Recovery Time Storage Time (ns) ------ PSpice NTE610 Factor of 10 change in τ s Storage Time (ns) ------ PSpice 1N4007 V DC NTE610 A=5V f=100khz R Forward bias: broader charge distribution in p/n junction, and a longer recovery time DC Offset V DC (V)

Max. of Circuit Current (Arb. Units) DC Bias Dependence of Period Doubling +0.2 V (forward bias) 0.0 V -0.4 V (reverse bias) -0.6 V (reverse bias) RLD NTE 610 diode R = 25 Ω, L = 10 µh f =29 MHz >1/τ RR =22 MHz > f 0 = 12.3 MHz Reverse bias enhances period doubling in this case 1 10-9 8 10-10 6 10-10 4 10-10 2 10-10 C D (V) (F) -1-0.5 0.5 1 Reverse Voltage (-V v But reverse bias should reduce the C(V) nonlinearity! Incident Power (dbm) Drop in τ RR and C D with V DC makes f ~ f 0 ~1/τ RR

Circuit Chaos More Complicated Circuits ω LF RLD-TIA Trans-Impedance Amplifier ω HF 2-tone injection experiments: frequency (similar to Vavriv) ω 0 ~ GHz ~ MHz The ω HF signal is rectified, introducing a DC bias on the p/n junction and increasing the circuit nonlinearity at ω LF. Our conclusion: The combination of rectification and nonlinear dynamics in this circuit produces qualitatively new ways to influence circuit behavior by means of rf injection.

Two-Tone Injection of Nonlinear Circuits Low Freq. Driving Voltage (V) Driven RLD Circuit Period-1 Region not explored Period-2 Driving Frequency (MHz) (Low Frequency) RF injection causes significant drop in driving amplitude required to produce perioddoubling! Period- Doubling No change in period doubling behavior with or without RF Low Freq. Driving Voltage (V) Driven RLD/TIA Circuit 8 Driving Frequency (MHz) (Low Frequency) Period Doubling (No RF) 0 0 9 Period Doubling (With RF)

RF Injection Lowers the Threshold for Chaos in Driven RLD/TIA LF = 5.5 MHz + HF = 800 MHz PHF =+40dBm PHF =+30dBm Max. of Op-amp AC Voltage Output PHF =+20dBm Max. of Op-amp AC Voltage Output No Incident Power No DC Offset Period 1 V LF + V HF V DC LF = 5.5 MHz + V DC Offset DC Offset=+440 mv DC Offset=+30 0mv DC Offset=+40 mv Low Frequency Driving Voltage V LF (V) Low Frequency Driving Voltage V LF (V)

Two-Tone Injection of Nonlinear Circuits In this case The combination of rectification, nonlinear capacitance, and the DC-bias dependence of τ RR produce complex dynamics In general To understand the p/n junction embedded in more complicated circuits: Nonlinear capacitance Rectification Nonlinearities of τ RR All play a role! More surprises are in store

Chaos in the Driven Diode Distributed Circuit R g Transmission Line V g (t) Z 0 delay T V inc V ref A simple model of the ESD circuit on an IC Delay differential equations for the diode voltage + V(t) -

Chaos in the Driven Diode Distributed Circuit Simulation results V g =.5 V Period 1 V(t) (Volts) Time (s) V g = 2.25 V Period 2 V(t) (Volts) Time (s) V g = 3.5 V Period 4 V(t) (Volts) Time (s) V g = 5.25 V Chaos V(t) (Volts) Time (s)

Chaos in the Driven Diode Distributed Circuit Strobe Points (Volts) Period 1 Period 2 f = 700 MHz T = 87.5 ps R g = 1 Ω Z 0 = 70 Ω PLC, C r = C f /1000 Period 4 V g (Volts) Chaos

Challenges for the Future Ten parameters to explore: C f, C r, g, Z o, R g, V g, ω, T, V f, V gap Experimental verification of numerical results 2D projection of chaotic orbit

Conclusions about Chaos in the Driven p/n Junction A history-dependent recovery/discharge time scale is the key physics needed to understand chaos in the driven RLD circuit Nonlinear Capacitor (NLC) models have a τ RR -like time scale Both the Hunt and NLC models have a history-dependent recovery time scale due to charge storage mechanisms Real diodes have strong nonlinearities of the reverse recovery time that are not captured in current models The addition of a TIA to the RLD circuit introduces a new way to influence nonlinear circuit behavior through rectification Embedding a diode in a distributed circuit offers new opportunities to induce chaos. See John Rodgers talk

Recent Papers on the Nonlinear Diode Resonator and Related Circuits: Renato Mariz de Moraes and Steven M. Anlage, "Unified Model, and Novel Reverse Recovery Nonlinearities, of the Driven Diode Resonator," Phys. Rev. E 68, 026201 (2003). Renato Mariz de Moraes and Steven M. Anlage, "Effects of RF Stimulus and Negative Feedback on Nonlinear Circuits," IEEE Trans. Circuits Systems I (in press). http://arxiv.org/abs/nlin.cd/0208039 T. L. Carroll and L. M. Pecora, Parameter ranges for the onset of period doubling in the diode resonator, Phys. Rev. E 66, 046219 (2002) DURIP 2004 proposal: Nonlinear and Chaotic Pulsed Microwave Effects on Electronics Anlage, Granatstein and Rodgers