EE247 Lecture 0 Switched-apacitor Filter Switched-capacitor integrator DDI integrator LDI integrator Effect of paraitic capacitance Bottom-plate integrator topology Reonator Bandpa filter Lowpa filter Termination implementation Tranmiion zero implementation Switched-capacitor filter deign conideration Switched-capacitor filter utilizing double ampling technique Effect of non-idealitie EES 247 Lecture 0: S Filter 2005 H. K. Page Switched-apacitor Integrator f I f 2 V - f f 2 f f 2 f lock V EES 247 Lecture 0: S Filter 2005 H. K. Page 2
DDI Switched-apacitor Integrator f I f 2 - f f f 2 f f 2 f lock V EES 247 Lecture 0: S Filter 2005 H. K. Page 3 DDI Switched-apacitor Integrator (n-3/2)t (n-)t (n-/2)t nt (n/2)t (n)t f f 2 f f 2 f lock V Φ Q [(n-)t ]= V i [(n-)t ], Q I [(n-)t ] = Q I [(n-3/2)t ] Φ 2 Q [(n-/2) T ] = 0, Q I [(n-/2) T ] = Q I [(n-3/2) T ] Q [(n-) T ] Φ _ Q [nt ] = V i [nt ], Q I [nt ] = Q I [(n-) T ] Q [(n-) T ] Since V o = - Q I / I & V i = Q / I V o (nt ) = I V o [(n-) T ] - V i [(n-) T ] EES 247 Lecture 0: S Filter 2005 H. K. Page 4
DDI Switched-apacitor Integrator Output Sampled on φ f I f 2 - f V(nT) I o = V I o (n )T V in (n )T V o(nt) = (n )T V I in (n )T V(Z) o = Z V(Z) o Z V I in (Z) V o Z (Z) = I Z V in DDI (Direct-Tranform Dicrete Integrator) EES 247 Lecture 0: S Filter 2005 H. K. Page 5 z-domain Frequency Repone LHP ingularitie in -plane map into inide of unit-circle in Z domain RHP ingularitie in -plane map imag. axi in into outide of unit-circle in Z domain domain The jω axi map onto the unit circle Particular value: f = 0 z = f = f /2 z = - The frequency repone i obtained f = f by evaluating H(z) on the unit circle /2 at z = e jωt = co(ωt)jin(ωt) Once z=- (f /2) i reached, the frequency repone repeat, a expected The angle to the pole i equal to 360 (or 2π radian) time the ratio of the pole frequency to the ampling frequency LHP in domain (co(wt),in(wt)) 2pf f S f = 0 EES 247 Lecture 0: S Filter 2005 H. K. Page 6
Switched-apacitor Direct-Tranform Dicrete Integrator f I f 2 - f V o V in (Z) = Z I Z I Z = EES 247 Lecture 0: S Filter 2005 H. K. Page 7 Z-=0 Z= on unit circle DDI Integrator Pole-Zero Map in z-plane f z-plane Pole from f 0 in -plane mapped to z= A frequency increae z domain pole move on unit circle (W) Once pole get to (Z=- ),(f=f /2), frequency repone repeat f = f /2 f increaing (Z-) EES 247 Lecture 0: S Filter 2005 H. K. Page 8
DDI Switched-apacitor Integrator f I f 2 - f Z jωt (Z) =, Z = e I V Z in e jωt/2 = = I jωt I jωt/2 jωt/2 e e e jωt/2 = j e I 2in( ωt/2) ωt/2 jωt/2 = e I jω T in( ωt/2) Ideal Integrator) Magnitude Error Phae Error EES 247 Lecture 0: S Filter 2005 H. K. Page 9 DDI Switched-apacitor Integrator f I f 2 - f Example: Mag. & phae error for: - f / f=/2 Mag. Error = % or 0.dB Phae error=5 degree Q intg = -3.8 2- f / f=/32 Mag. Error=0.6% or 0.04dB Phae error=5.6 degree Q intg = -0.2 DDI Integrator magnitude error no problem phae error major problem EES 247 Lecture 0: S Filter 2005 H. K. Page 0
jω Switched apacitor Filter Build with DDI Integrator jω ω -plane oare View -plane Fine View σ σ -ω Example: 5th Order Elliptic Filter Singularitie puhed toward RHP due to integrator exce phae Pole Zero EES 247 Lecture 0: S Filter 2005 H. K. Page H( jω) Paband Peaking Switched apacitor Filter Build with DDI Integrator S DDI baed Filter Zero lot! f /2 ontinuou-time Prototype Frequency (Hz) f 2f f EES 247 Lecture 0: S Filter 2005 H. K. Page 2
Switched-apacitor Integrator Output Sampled on φ2 f I f 2 - f 2 2 Sample output ½ clock cycle earlier Sample output on f 2 EES 247 Lecture 0: S Filter 2005 H. K. Page 3 (n-3/2)t Switched-apacitor Integrator Output Sampled on φ2 (n-)t (n-/2)t nt (n/2)t f f 2 f f 2 f (n)t lock V 2 Φ Q [(n-)t ]= V i [(n-)t ], Q I [(n-)t ] = Q I [(n-3/2)t ] Φ 2 Q [(n-/2) T ] = 0, Q I [(n-/2) T ] = Q I [(n-3/2) T ] Q [(n-) T ] Φ _ Q [nt ] = V i [nt ], Q I [nt ] = Q I [(n-) T ] Q [(n-) T ] Φ 2 Q [(n/2) T ] = 0, Q I [(n/2) T ] = Q I [(n-/2) T ] Q [n T ] EES 247 Lecture 0: S Filter 2005 H. K. Page 4
Switched-apacitor Integrator Output Sampled on φ2 (n-3/2)t (n-)t (n-/2)t nt (n)t f f 2 f f 2 f lock V Q I [(n/2) T ] = Q I [(n-/2) T ] Q [n T ] V o2 = - Q I / I & V i = Q / I V o2 [(n/2) T ] = I V o2 [(n-/2) T ] - V i [n T ] Uing the z operator rule: V o2 I V o2 Z /2 = I V o2 Z -/2 Z /2 - V (Z) = i I V Z in EES 247 Lecture 0: S Filter 2005 H. K. Page 5 LDI Switched-apacitor Integrator LDI (Lole Dicrete Integrator) ame a DDI but output i ampled ½ clock cycle earlier LDI f I f 2 - f 2 2 V o2 Z /2 (Z) =, Z = e jωt I V Z in e jωt/2 = = I jωt I jωt/2 jωt/2 e e e = j I 2in( ωt/2) = I jωt Ideal Integrator ωt/2 in( ωt/2) Magnitude Error No Phae Error! For ignal at frequencie << ampling freq. Magnitude error negligible EES 247 Lecture 0: S Filter 2005 H. K. Page 6
Frequency Warping Frequency repone ontinuou time (-plane): imaginary axi Sampled time (z-plane): unit circle ontinuou to ampled time tranformation Should map imaginary axi onto unit circle How do S integrator map frequencie? H S ( z) = 2 z z = int int 2 j inπft EES 247 Lecture 0: S Filter 2005 H. K. Page 7 T S Integrator omparion T Integrator H R ( ) = τ = 2π jf R τ H S Integrator S ( z) = 2 z z = int int 2 j inπf S T Identical time contant: τ = R = int f ompare: H R (f R ) = H S (f S ) f R f = π π in f f S EES 247 Lecture 0: S Filter 2005 H. K. Page 8
0.9 LDI Integration f R f = π π in f f S f S /f 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0. 0 0 0.05 0. 0.5 0.2 0.25 0.3 0.35 f R /f /π R frequencie up to f /π map to phyical (real) S frequencie Frequencie above f /π do not map to phyical frequencie Mapping i ymmetric about f /2 (aliaing) Accurate only for f R << f EES 247 Lecture 0: S Filter 2005 H. K. Page 9 H( jω) Switched-apacitor Filter Built with LDI Integrator Zero Preerved f /2 Frequency (Hz) f 2f f EES 247 Lecture 0: S Filter 2005 H. K. Page 20
Switched-apacitor Integrator Paraitic Senitivity f f 2 I p2 p3 p - Effect of paraitic capacitor: - p - driven by opamp o.k. 2- p2 - at opamp virtual gnd o.k. 3- p3 harge to & dicharge into I Problem paraitic enitivity EES 247 Lecture 0: S Filter 2005 H. K. Page 2 Paraitic Inenitive Bottom-Plate Switched-apacitor Integrator Senitive paraitic cap. p rearrange circuit o that p doe not charge/dicharge f= p grounded f2= p at virtual ground f f 2 I Vi p p2 - Vi- Solution: Bottom plate capacitor integrator EES 247 Lecture 0: S Filter 2005 H. K. Page 22
Vi Bottom Plate Switched-apacitor Integrator f f 2 I f - f 2 2 Input/Output z-tranform Note: Delay from Vi and Vi- to output i different Special attention needed to input/output connection Vi on f Vi- Vion f2 2 on f on f2 z z 2 z z z 2 z z EES 247 Lecture 0: S Filter 2005 H. K. Page 23 Bottom Plate Switched-apacitor Integrator z-tranform Model Vi f f I 2 z -z 2 z z z 2 Input/Output z-tranform z z Vif f 2 2 Vi Vi- I I z 2 2 z z z 2 2 LDI EES 247 Lecture 0: S Filter 2005 H. K. Page 24
LDI Switched-apacitor Ladder Filter - τ 3 τ 4 τ 5 - - z 2 z 2 I I 2 z z 2 z 2 I z 2 z z 2 z z z 2 I z 2 I I Delay around integ. Loop i (Z -/2. Z /2 =) LDI function EES 247 Lecture 0: S Filter 2005 H. K. Page 25 Switched-apacitor LDI Reonator Reonator Signal Flowgraph ω f f 2 ω2 f f 2 ω f = = R eq 2 2 ω f 3 2 = = R eq3 4 4 EES 247 Lecture 0: S Filter 2005 H. K. Page 26
Fully Differential Switched-apacitor Reonator f f 2 f f 2 EES 247 Lecture 0: S Filter 2005 H. K. Page 27 Switched-apacitor LDI Bandpa Filter Utilizing ontinuou-time Termination Bandpa Filter Signal Flowgraph ω0 V i -/Q V o2 Q V o ω0 3 ω f 0 = = 4 2 Q = 2 Q V o2 V i EES 247 Lecture 0: S Filter 2005 H. K. Page 28
-Plane veru z-plane Example: 2 nd Order LDI Bandpa Filter -plane jw z-plane EES 247 Lecture 0: S Filter 2005 H. K. Page 29 Switched-apacitor LDI Bandpa Filter ontinuou-time Termination f f 0 = 2 π 2 f f = 0 Q Q = f 2π 2 4 Both accurately determined by cap ratio & clock frequency 0-3dB Magnitude (db) Df f 0 Frequency 0. 0 EES 247 Lecture 0: S Filter 2005 H. K. Page 30
Fifth Order All-Pole LDI Low-Pa Ladder Filter omplex onjugate Termination Termination Reitor Termination Reitor omplex conjugate termination (alternate phae witching) Ref: Tat. hoi, "High-Frequency MOS Switched-apacitor Filter," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thei, May 983 (ERL Memorandum No. UB/ERL M83/3). EES 247 Lecture 0: S Filter 2005 H. K. Page 3 Fifth-Order All-Pole Low-Pa Ladder Filter Termination Implementation Ref: Tat. hoi, "High-Frequency MOS Switched-apacitor Filter," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thei, May 983 (ERL Memorandum No. UB/ERL M83/3). EES 247 Lecture 0: S Filter 2005 H. K. Page 32
Sixth-Order Elliptic LDI Bandpa Filter Ref: Tranmiion Zero Tat. hoi, "High-Frequency MOS Switched-apacitor Filter," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thei, May 983 (ERL Memorandum No. UB/ERL M83/3). EES 247 Lecture 0: S Filter 2005 H. K. Page 33 Ue of T-Network Ref: High Q filter large cap. ratio for Q & tranmiion zero implementation To reduce large ratio required T-network utilized Tat. hoi, "High-Frequency MOS Switched-apacitor Filter," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thei, May 983 (ERL Memorandum No. UB/ERL M83/3). EES 247 Lecture 0: S Filter 2005 H. K. Page 34
Sixth Order Elliptic Bandpa Filter Utilizing T-Network Q implementation Zero T-network utilized for: Q implemention Tranmiion zero implementation Ref: Tat. hoi, "High-Frequency MOS Switched-apacitor Filter," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thei, May 983 (ERL Memorandum No. UB/ERL M83/3). EES 247 Lecture 0: S Filter 2005 H. K. Page 35 Switched-apacitor Reonator Regular ampling Each opamp buy ettling only during one of the clock phae Idle during the other clock phae EES 247 Lecture 0: S Filter 2005 H. K. Page 36
Switched-apacitor Reonator Uing Double- Sampling Double-ampling: 2 nd et of witche & ampling cap added to all integrator While one et of witche/cap ampling the other et tranfer charge into the intg. cap Opamp buy during both clock phae Effective ampling freq. twice clock freq. while opamp bandwidth requirement remain the ame EES 247 Lecture 0: S Filter 2005 H. K. Page 37 Double-Sampling Iue f clock f = 2f clock Iue to be aware of: - Jitter in the clock - Unequal clock phae -Mimatch in ampling cap. paraitic paband Ref: Tat. hoi, "High-Frequency MOS Switched-apacitor Filter," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thei, May 983 (ERL Memorandum No. UB/ERL M83/3). EES 247 Lecture 0: S Filter 2005 H. K. Page 38
Double-Sampled Fully Differential S.. 6 th Order All-Pole Bandpa Filter Ref: Tat. hoi, "High-Frequency MOS Switched-apacitor Filter," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thei, May 983 (ERL Memorandum No. UB/ERL M83/3). EES 247 Lecture 0: S Filter 2005 H. K. Page 39 Sixth Order Bandpa Filter Signal Flowgraph γ γ V out ω 0 ω 0 Q ω0 ω0 ω0 ω0 Q γ γ EES 247 Lecture 0: S Filter 2005 H. K. Page 40
Double-Sampled Fully Differential 6 th Order S.. All-Pole Bandpa Filter -ont. time termination (Q) implementation -Folded-acode opamp with f u = 00MHz ued -enter freq. 3.MHz, filter Q=55 -lock freq. 2.83MHz effective overampling ratio 8.27 -Meaured dynamic range 46dB (IM3=%) Ref: B.S. Song, P.R. Gray "Switched-apacitor High-Q Bandpa Filter for IF Application," IEEE Journal of Solid State ircuit, l. 2, No. 6, pp. 924-933, Dec. 986. EES 247 Lecture 0: S Filter 2005 H. K. Page 4 Effect of Opamp Nonidealitie on Switched apacitor Filter Behaviour Opamp finite gain Opamp finite bandwidth Finite lew rate of the opamp EES 247 Lecture 0: S Filter 2005 H. K. Page 42
Effect of Opamp Non-Idealitie Finite D Gain f f 2 I H() f I f I a ωo H() ω o a a ω Q ωo Vi - D Gain = a Input/Output z-tranform Q a Finite D gain ame effect in S.. filter a for.t. filter EES 247 Lecture 0: S Filter 2005 H. K. Page 43 Vi Vi- Vi- f f 2 Effect of Opamp Non-Idealitie Finite Opamp Bandwidth I - Unity-gain-freq. Input/Output z-tranform = f t V o f 2 ettling error T=/f time Aumption- Opamp doe not lew (will be reviited) Opamp ha only one pole exponential ettling Ref: K.Martin, A. Sedra, Effect of the OPamp Finite Gain & Bandwidth on the Performance of Switched- apacitor Filter," IEEE Tran. ircuit Syt., vol. AS-28, no. 8, pp. 822-829, Aug 98. EES 247 Lecture 0: S Filter 2005 H. K. Page 44
Vi Vi- f f 2 Effect of Opamp Non-Idealitie Finite Opamp Bandwidth I - Unity-gain-freq. Input/Output z-tranform = f t k k I H actual (Z) H e e Z ideal(z) I where k = π I ft I f ft Opamp unity gain frequency, f lock frequency Ref: V o f 2 ettling error T=/f K.Martin, A. Sedra, Effect of the OPamp Finite Gain & Bandwidth on the Performance of Switched- apacitor Filter," IEEE Tran. ircuit Syt., vol. AS-28, no. 8, pp. 822-829, Aug 98. time EES 247 Lecture 0: S Filter 2005 H. K. Page 45 Effect of Opamp Finite Bandwidth on Filter Magnitude Repone Τ non-ideal / Τ ideal (db) Magnitude deviation due to finite opamp unity-gainfrequency Active R f c /f =/32 f c /f =/2 Example: 2 nd order bandpa with Q=25 Ref: f c /f t K.Martin, A. Sedra, Effect of the OPamp Finite Gain & Bandwidth on the Performance of Switched- apacitor Filter," IEEE Tran. ircuit Syt., vol. AS-28, no. 8, pp. 822-829, Aug 98. EES 247 Lecture 0: S Filter 2005 H. K. Page 46
Effect of Opamp Finite Bandwidth on Filter Magnitude Repone Τ non-ideal / Τ ideal Example: For db magnitude repone deviation: - f c /f =/2 f c /f t ~0.04 f t >25f c 2- f c /f =/32 f c /f t ~0.022 f t >45f c (db) Active R f c /f =/32 f c /f =/2 3- ont.-time f c /f t ~/700 f t >700f c fc /f t Ref: K.Martin, A. Sedra, Effect of the Opamp Finite Gain & Bandwidth on the Performance of Switched-apacitor Filter," IEEE Tran. ircuit Syt., vol. AS-28, no. 8, pp. 822-829, Aug 98. EES 247 Lecture 0: S Filter 2005 H. K. Page 47 Effect of Opamp Finite Bandwidth Maximum Achievable Q Max. allowable biquad Q for peak gain change <0% Overampling Ratio.T. filter Ref: f c /f t K.Martin, A. Sedra, Effect of the Opamp Finite Gain & Bandwidth on the Performance of Switched-apacitor Filter," IEEE Tran. ircuit Syt., vol. AS-28, no. 8, pp. 822-829, Aug 98. EES 247 Lecture 0: S Filter 2005 H. K. Page 48
Example: For Q of 40 required Max. allowable biquad Q for peak gain change <0% - f c /f =/32 f c /f t ~0.02 f t >50f c 2- f c /f =/2 f c /f t ~0.035 f t >28f c 3- f c /f =/6 f c /f t ~0.05 f t >20f c Ref: Effect of Opamp Finite Bandwidth Maximum Achievable Q.T. filter f c /f t K.Martin, A. Sedra, Effect of the Opamp Finite Gain & Bandwidth on the Performance of Switched-apacitor Filter," IEEE Tran. ircuit Syt., vol. AS-28, no. 8, pp. 822-829, Aug 98. EES 247 Lecture 0: S Filter 2005 H. K. Page 49 Effect of Opamp Finite Bandwidth on Filter ritical Frequency ω c /ω c ritical frequency deviation due to finite opamp unity-gainfrequency Example: 2 nd order filter Active R f c /f =/32 f c /f =/2 f c /f t Ref: K.Martin, A. Sedra, Effect of the OPamp Finite Gain & Bandwidth on the Performance of Switched- apacitor Filter," IEEE Tran. ircuit Syt., vol. AS-28, no. 8, pp. 822-829, Aug 98. EES 247 Lecture 0: S Filter 2005 H. K. Page 50
Effect of Opamp Finite Bandwidth on Filter ritical Frequency Example: For maximum critical frequency hift of <% - f c /f =/32 f c /f t ~0.028 f t >36f c 2- f c /f =/2 f c /f t ~0.046 f t >22f c ω c /ω c Active R f c /f =/32 f c /f =/2 3- Active R f c /f t ~0.008 f t >25f c Ref:.T. filter f c /f t K.Martin, A. Sedra, Effect of the Opamp Finite Gain & Bandwidth on the Performance of Switched-apacitor Filter," IEEE Tran. ircuit Syt., vol. AS-28, no. 8, pp. 822-829, Aug 98. EES 247 Lecture 0: S Filter 2005 H. K. Page 5 Source of Ditortion in Switched- apacitor Filter Ditortion induced by finite lew rate of the opamp Opamp output/input tranfer function nonlinearity apacitor non-linearity Ditortion incurred by finite etting time of the opamp Ditortion due to witch clock feed-through and charge injection EES 247 Lecture 0: S Filter 2005 H. K. Page 52
What i Slewing? I f 2 - I V o L f 2 Vi- Vi Aume opamp i of a imple differential pair cla A tranconductance type I EES 247 Lecture 0: S Filter 2005 H. K. Page 53 What i Slewing? I o I V o Slope ~ g m V max V in f 2 I o L I max =I Vi- Vi I V c > V max Output current contant I o =I Slewing After Vc i dicharged enough to have V c <V max Linear ettling EES 247 Lecture 0: S Filter 2005 H. K. Page 54
Ditortion Induced by Opamp Finite Slew Rate EES 247 Lecture 0: S Filter 2005 H. K. Page 55 Ideal Switched-apacitor Output Waveform f - I lock f f 2 I f 2 - Vc f 2 High harge tranferred from to I EES 247 Lecture 0: S Filter 2005 H. K. Page 56
Slew Limited Switched-apacitor Output Settling lock f f 2 -ideal -real Slewing Linear Settling Slewing Linear Settling EES 247 Lecture 0: S Filter 2005 H. K. Page 57 Ditortion Induced by Finite Slew Rate of the Opamp Ref: K.L. Lee, Low Ditortion Switched-apacitor Filter," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thei, Feb. 986 (ERL Memorandum No. UB/ERL M86/2). EES 247 Lecture 0: S Filter 2005 H. K. Page 58
Ditortion Induced by Opamp Finite Slew Rate Error due to exponential ettling change linearly with ignal amplitude Error due to lew-limited ettling change non-linearly with ignal amplitude (doubling ignal amplitude X4 error) For high-linearity need to have either high lew rate or non-lewing opamp ω ( o ) T 2 V 8 o in HD 2 k = ST r π k ( k 2 4 ) 2 8( ot o in ω V 2 ) HD3 = ST r 5 π Ref: K.L. Lee, Low Ditortion Switched-apacitor Filter," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thei, Feb. 986 (ERL Memorandum No. UB/ERL M86/2). EES 247 Lecture 0: S Filter 2005 H. K. Page 59 Ditortion Induced by Opamp Finite Slew Rate Example -20-40 HD3 [db] -60-80 V o =V f / f =/32 V o =2V f / f =/2 V o =V V o =2V -00-20 0 00 000 (Slew-rate / f ) [V] EES 247 Lecture 0: S Filter 2005 H. K. Page 60
Ditortion Induced by Finite Slew Rate of the Opamp Note that for a high order witched capacitor filter only the lat tage lewing will affect the output linearity (a long a the previou tage ettle to the required accuracy) an reduce lew limited linearity by uing an amplifier with a higher lew rate only for the lat tage an reduce lew limited linearity by uing cla A/B amplifier Even though the output/input characteritic i non-linear the ignificantly higher lew rate compared to cla A amplifier help improve lew rate induced ditortion In cae where the output i ampled by another ampled data circuit (e.g. an AD or a S/H) no iue with the lewing of the output a long a the output ettle to the required accuracy & i ampled at the right time EES 247 Lecture 0: S Filter 2005 H. K. Page 6 More Realitic Switched-apacitor ircuit Slew Scenario f 2 - I L f 2 I L t=0 At the intant connect to input of opamp (t=0) Opamp not yet active at t=0 due to finite opamp delay Feedforward path from input to output generate a voltage pike at the output Eventually, opamp become active & tart lewing EES 247 Lecture 0: S Filter 2005 H. K. Page 62
More Realitic S Slew Scenario -ideal -real -real Including t=0 pike Slewing Linear Settling Slewing Linear Settling Spike generated at t=0 Slewing Linear Settling Slewing Ref: R. atello, Low ltage, Low Power Switched-apacitor Signal Proceing Technique," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thei, Aug. 84 (ERL Memorandum No. UB/ERL M84/67). EES 247 Lecture 0: S Filter 2005 H. K. Page 63