A Novel Approach to TSV Metallization based on Electrografted Copper Nucleation Layers Claudio Truzzi, PhD Chief Technology Officer Alchimer
Overview Introduction Electrografting (eg) Technology Description Application to TSVs eg technical Characterization Resistivity Uniformity Step coverage Adhesion Electrografting Process Roadmap Fully Grafted Stack Step coverage Uniformity Adhesion Conclusion
Company Overview Started in 2001 as a spin off from the CEA, the French atomic energy authority Alchimer has developed materials and process IP for creating thin coatings on the inside of high-aspect ratio Through-Silicon Vias (TSVs) 22 patents families granted or filed Investors include Auriga Partners, AGF Private Equity, CEA Valorisation, Rothschild, Partech Partners, Intel Capital and Seventure Laboratory and offices located in Massy, near Paris, France Team of high level scientists in the fields of surface science, chemistry, electrochemistry, physics, materials science and semiconductors As an IP company, Alchimer s business model is based on licensing the technology to the users, as well as those providing production volumes of chemistry Page 3
Wet Chemical Nanofilm Technology Chemical functionalization of conducting and semi-conducting surfaces Proprietary wet technologies electrografting eg TM chemical grafting cg TM Permits the application of highly controlled, ultrathin coatings providing three key properties: Conformality Uniformity and Adhesion Enables economical TSVs with aspect ratios of 10:1 +
What is Electrografting? A breakthrough electrochemical process for creating nanoscale films on conductors and semiconductors Substrate is exposed to organic precursors Electrons from the biased surface serve as bonding seeds for precursor molecules This initiates the growth of a film that is grafted to the surface with co-valent bonds Provides nanometer thickness control from 5 to 500nm extended to 3000nm
Electro-initiated reactions yield conformality electro-deposition: F α grad(v) electro-grafting: F α grad(c) isopotential line isoconcentration line uniform density of electro-grafted precursors & purely chemical chain growth ultra-conformal electro-grafted layers
3-D IC barriers to adoption technological roadblocks TSV filling COST 30% + OF COST IS IN VIA ISOLATION/BARRIER/SEED/FIL L ipvd electro grafting Equipmen t Cost 6 MUS$ 2MUS$ 32% Source: Yole Developpement
Current TSV Process Challenges Via etch Bosch process scalloping Insulation deposition Organic: non integrated process step Barrier and Cu seed deposition High Aspect Ratio TSVs Sidewall coverage 0verburden Frequent adjustments to process parameters for different structures Via Fill by Electroplating voids if Cu seed is discontinuous 5:1 Via
TSV process flow with electrografting Via etch Films are very conformal to scalloped walls Insulation deposition Uniform growth of organic layer, integrated with subsequent steps Barrier and Cu seed deposition Excellent step coverage and adhesion in High Aspect Ratio TSVs Excellent Sidewall coverage No 0verburden Process parameters independent from via structures Via Fill by Electroplating No voids caused by discontinuities discontinuous barrier/adhesion layer Continuous, conformal electrografted film TiN barrier deposited by ASM Photos courtesy of NEXX
Electrografting Cu Seed performance Enables void free
Electrografted copper resistivity resistivity vs. eg layer thickness 1.8 Confidential Alchimer s.a.
Step Coverage on 5*50µm TSVs Dense Via : step coverage 90% TiN barrier deposited by ASM eg ViaCoat 98nm eg ViaCoat 109nm eg ViaCoat 129nm
Adhesion of Electrografting Layers Adhesion Energy Gc (J/m²) 35 30 25 20 15 10 5 0 0 50 100 150 200 Disp. (mm) adhesion failure at ECP Cu / glue interface eg Seed + ECP 4PB measurement Confidential Alchimer s.a.
Infrastructural Compatibility of Electrografting Fully compatible with electrochemical deposition of copper seed layers for the metallization of Thru Silicon Vias ready-to-use, mildly acidic, ultra-pure aqueous copperbased electrolyte solution compatible with industry-standard copper electroplating equipment and CMP processing compatible with standard blend waste stream and on-line monitoring systems
Electrografting Process Roadmap
Full Wet stack on 5 x 25 µm vias AquiVia
Initial characterization on 200-mm wafers eg ViaCoat Barrier Insulation eg insulator Thickness: 36 to 53nm Uniformity: 9% Adhesion: Passes scribe 16/16 squares tests without anneal up to 0.6µm thick Step Coverage: Insulator : 70% Barrier : 80% Cu : 66% eg Isolation Parameter MRS obj. Unit Thickness 400 nm Resistivity 5E14 µohm.cm Step coverage 50-80 % Via diameter 1-150 µm Aspect ratio >10 :1 Refraction index 1,5 / Dielectric constant 1.9-5.4 / Dielectric strength 3.6E6 V/cm eg Barrier Parameter MRS obj. Unit Thickness 50-200 nm nm Resistivity 25 µohm.cm Step coverage 50-80 % Via diameter 1-150 µm Aspect ratio >10 :1
Cost of Ownership per Wafer - Comparison Table ViaCoat Description Dry Process Grafting Process Benefit AquiVia Description Dry Process Grafting Process Benefit Equipment $10.0 $2.0 80% Consumables $15.0 $3.0 80% Labor $2.3 $0.5 78% Clean Room $0.9 $0.4 56% Overhead $2.8 $0.6 79% Total $31.0 $6.5 79% Equipment $33 $19 42% Consumables $36 $12 67% Labor $8 $6 25% Clean Room $4 $2 50% Overhead $8 $4 52% Total $89 $43 52% Assumptions: Wafers: 50K 300mm wafer starts per month; 95% process yield; TSVs: 5μm diameter, 50μm deep TSVs Clean Room: Cost = 250US$/sqft; Equipment footprint ratio = 2.5 (Source: Sematech) Dry Process Seed Deposition: - CoC for 10:1 AR TSV Wafer is 10X that of 1:1 AR Dual Damascene - Throughput for 10:1 AR TSV Wafer is 20% that of 1:1 AR Dual Damascene (Internal Source) Notes: 1) Dry Process - Number of Tools: - PECVD: 3 - i-pvd: 10 - ECD: 8 E3 Process Number of Tools: - ECD-eG: 8 - ECD-Fill: 7 2) 1 operator every 2 machines; 1 technician every 4 machines; 5 shifts 3) Includes equipment, facilities, operating costs
Conclusion Electrografting and chemical grafting approach to TSV layer deposition solves all current TSV technical challenges for isolation, barrier and seed ViaCoat TSV seed is a low cost high performance solution to a wide range of via dimensions exceeding 10:1 A/R AquiVia breaks down cost barriers preventing large scale adoption of 3D-IC applications For further information and reader enquiries: Emmanuel Guidotti Tel: +33 1 69 75 43 43 E-mail: emmanuel.guidotti@alchimer.com Fax:+33 1 60 11 07 52 Web: www.alchimer.com