Chapter 15 SEQUENTIAL CIRCUITS ANALYSIS, STATE- MINIMIZATION, ASSIGNMENT AND CIRCUIT IMPLEMENTATION
Lesson 2 ANALYSIS OF CLOCKED SEQUENTIAL CIRCUIT Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 2
Outline Procedure Excitation table Transition table State table State Diagram Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 3
Analysis Procedure Clocked Sequential circuit 1. Draw logic circuit diagram 2. Perform state variable assignments and excitation variable(means FF inputs) assignments 3. Find the expressions for excitations from flip-flop characteristic equations as per the excitations variables and make an excitation table. [Find Q = F Q (X, Q) and Y.] Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 4
Analysis Procedure 4. Make transition table from the expressions for Y = F (X, Q) in case o of Mealy model and Y = F (X) in o case of Moore model. 5. Perform state minimization and make minimal state table. 6. Draw the state diagram. Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 5
Outline Procedure Excitation table Transition table State table State Diagram Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 6
Excitation table Tabular representation of X and Q at the FFs and of Y as per F Q for the combination circuit at the output stages. Gives present states and the inputs given at the memory section. Gives the memory-section outputs that follow the excitations Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 7
Excitation Table for Y = X. Q2 +Q1; Q1 =D and Q2 = Q n+1 = J. Q n + K. Q n State Excitation Inputs Y (Q 1,Q 2) [D, (J, K)] X=0 [D, (J, K)] X=1 X=0 X =1 (0, 0) 0, (0, 0) 1, (0,1) 0 0 (0, 1) 0, (0, 0) 1, (0,1) 1 0 (1, 0) 0, (1, 0) 1, (1,1) 1 1 (1, 1) 0, (1, 0) 1, (1,1) 1 1 Y is present output state after the X inputs but before transition Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 8
Excitation Table Rows Number of rows in each column equals 2 m where m is the number of flip-flops because each flip-flop has one Q output and m flipflops will have 2 m different combinations of the states at the Qs. For example, if (Q1, Q2) are the Qs of two FFs, then (Q1, Q2) = (0, 0), (0, 1), (1, 0) and (1, 1) are the four combinations possible for the four different states of the memory section present outputs Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 9
Excitation Table Columns First column present state (Q1, Q2) in its each row The number of columns for the excitation inputs Q equals the number of possible combinations of external inputs in the set X. It equals 2 i if there are i distinct literal to represent the inputs when there are i inputs X 0, X 1, X i 1. If i = 1, then columns 2 and 3 will be for X = 0 and X =1, as there are two possible values of X. Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 10
Excitation Inputs For each set of inputs, there is a set of excitation inputs to the memory section, for example, corresponding to each set of external inputs, there will be four sets of inputs to (D1, D2) in case of two D-FFs at the memory section Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 11
Mealy Model Excitation Inputs If (X1, X2) are the external input to the memory section then (X1, X2) = (0, 0), (0, 1), (1, 0) and (1, 1) are the four combinations possible for the four different states of the memory section present outputs, which are also inputs for excitation on next clock instance. Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 12
Moore Model Excitation Inputs The number of column = 1 for a set of Q inputs Q as in Moore model Q depends on Qs only. Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 13
Output Y in Mealy Model Excitation Table The number of columns for the output Y also equals the number of possible 2 i combinations of external inputs in the set X. Suppose output stage has two outputs, Y1 and Y2. Then there will be 4 columns for the four sets of the external inputs and each column having entries for values of (Y1, Y2) Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 14
Moore Model Excitation Table The number of column = 1 for the output Y as in Moore model Y depends on Qs only. The column entries for values of (Y1, Y2) as per the combinational circuit between the memory section output Qs and Ys Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 15
Outline Procedure Excitation table Transition table State table State Diagram Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 16
Transition table A tabular representation of F and F. Q o It shows how the sequential circuit FF will respond to all the present inputs Xs and Qs and will generate Ys from the Q s. Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 17
Transition Table for Y = X. Q2 +Q1; Q1 =D and Q2 = Q n+1 = J. Q n + K. Q n State Transition Outputs Y (Q 1,Q 2) [Q1,Q2 ] X=0 [Q1,Q2 ] X=1 X=0 X =1 (0, 0) 0, 0 1, 0 0 0 (0, 1) 0, 1 1, 0 1 0 (1, 0) 0, 1 1, 1 1 1 (1, 1) 0, 1 0, 0 1 1 Y is present output state after the X inputs but before transition Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 18
Transition Table Rows Number of rows in each column equals 2 m where m is the number of flip-flops because each flip-flop has one Q output and m flipflops will have 2 m different combinations of the states at the Qs. For example, if (Q1, Q2) are the Qs of two FFs, then (Q1, Q2) = (0, 0), (0, 1), (1, 0) and (1, 1) are the four combinations possible for the four different states of the memory section present outputs Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 19
Transition Table Columns First column present state (Q1, Q2) in its each row The number of columns for the transition outputs Q equals the number of possible combinations of external inputs in the set X. It equals 2 i if there are i distinct literal to represent the inputs when there are i inputs X 0, X 1, X i 1. If i = 1, then columns 2 and 3 will be for X = 0 and X =1, as there are two possible values of X. Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 20
Transition Outputs For each set of FF-inputs, there is a set of transition outputs of the memory section, for example, corresponding to each set of external inputs, there will be two sets of outputs to (Q1, Q2) in case of two FFs (one D and one J-K) at memory section Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 21
Y Outputs If (X1, X2) are the external input to the memory section then (X1, X2) = (0, 0), (0, 1), (1, 0) and (1, 1) are the four combinations possible for the four different states of the memory section present outputs Y. Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 22
Moore and Mealy Model Transition tables Moore Model The number of column = 1 each for the transition output set Q and output Y, as in Moore model Y depends on Qs only. Mealy Model The column entries for values of (Y1, Y2) and set of Q s will be 2 each when there is only one external input Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 23
Outline Procedure Excitation table Transition table State table State Diagram Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 24
State Table State table can made easily A set of present Q0, Q1,.. denotes a state Each set assigned a state-name S i as follows: (Q1, Q2) = (0,0) S 0 (Q1, Q2) = (0,1) S 1 (Q1, Q2) = (0,0) S 2 (Q1, Q2) = (0,0) S 3 Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 25
State table 1. Tabular representation of Q, Q at given Y in terms of S0, S1, S2,...states assigned to the sets of the Qs at FFs 2. Gives in terms of S0, S1, S2,...the memory-section outputs that follow the state transitions after excitation inputs Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 26
State Table for Y = X. Q2 +Q1; Q1 =D and Q2 = Q n+1 = J. Q n + K. Q n State Next State Outputs Y (Q 1,Q 2) [Q1, Q2] X=0 [Q1, Q2] X=1 X=0 X =1 S 0 S 0 S 2 0 0 S 1 S 1 S 2 1 0 S 2 S 1 S 3 1 1 S 3 S 1 S 0 1 1 Y is present output state after the X inputs but before transition Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 27
Number of maximum possible states There are z (=2 m ) maximum possible states S 0, S 1,, S in a sequential m 1 circuit with m-ffs Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 28
State Table Rows Number of row in state table = z, one row for each state For m = 2, rows are for S0, S1, S2 and S3, each corresponding to a state of the circuit. Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 29
State Table Columns First column S0, S1, S2 and S3 for four rows The number of columns for State-outputs equals the number of possible combinations of external inputs in the set X. It equals 2 i if there are i distinct literal to represent the inputs when there are i inputs X 0, X 1, X i 1. If i = 1, then columns 2 and 3 will be for X = 0 and X =1, as there are two possible values of X. Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 30
Number of Y Output columns Same as number of columns for next state before Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 31
State minimization from state table We shall learn it in next lesson Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 32
Outline Procedure Excitation table Transition table State table State Diagram Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 33
State Diagram A set of present Q0, Q1,.. is denoted by a state. A state diagram is a diagrammatic representation of state table to show the transitions from present state to next state. A state diagram is drawn after state minimization at the state table Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 34
Number of Nodes A circle shows a node The number of nodes = number of rows in the state table. For two flip-flops, there are four states S1, S2, S3 and S4. So four circles are drawn for the four nodes Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 35
Directed Arc A directed arc from the present state node to the next state node shows a transition Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 36
Directed arcs to next state A small diameter directed circular arc, which starts from node and ends at the same node represents a transition in which the state remains unchanged [S i remains S i ] The number of directed circular arcs equals the number of transitions in which the state does not change Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 37
Directed arcs to next state A small diameter directed arc, which starts from node and ends at another node represents a transition in which the state changed [S i becomes S j ] The number of directed arcs to another node equals the number of transitions in which the state changes Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 38
Mealy Model state diagram Each state S 0 or S 1,... is labeled as S 0 or S 1 at the center of circle, which is representing the node Each arc or circular arc is labeled as X/Y [present input X and output Y]. Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 39
Mealy Model state diagram Each arc or circular arc can have more then one set of (pre-transition input/ output) labeled on it if there are more than one sets of pre-transition input/ output that are having the same transition from one node to another. Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 40
Moore Model state diagram Each state S 0 or S 1,... is labeled as S 0 or S 1 at the center of circle, which is representing the node Each arc or circular arc is labeled by present input from Qs. Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 41
Moore Model state diagram Each arc or circular arc has one set of (pre-transition input) labeled on it if there are more than one sets of (pretransition input) that are having the same transition from a node to another. Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 42
Summary
Analysis of logic clocked sequential circuit is in steps: Making excitation table Making state transition table Making State table Reducing the table after a state minimization process Draw state diagram using circles and directed arcs
End of Lesson 2 on ANALYSIS OF CLOCKED SEQUENTIAL CIRCUIT
THANK YOU Ch15L2- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 46