Edge termination study and fabrication of a 4H SiC junction barrier Schottky diode

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Edge termination study and fabrication of a 4H SiC junction barrier Schottky diode Chen Feng-Ping( ) a), Zhang Yu-Ming( ) a), Zhang Yi-Men( ) a), Tang Xiao-Yan( ) a), Wang Yue-Hu( ) a), and Chen Wen-Hao( ) b) a) School of Microelectronics, Key Laboratory of Wide Band-Gap Semiconductor Materials and Devices, Xidian University, Xi an 710071, China b) School of Technical Physics, Xidian University, Xi an 710071, China (Received 30 March 2011; revised manuscript received 3 May 2011) The 4H SiC junction barrier Schottky (JBS) diodes terminated by field guard rings and offset field plate are designed, fabricated and characterized. It is shown experimentally that a 3-µm P-type implantation window spacing gives an optimum trade-off between forward drop voltage and leakage current density for these diodes, yielding a specific on-resistance of 8.3 mω cm 2. A JBS diode with a turn-on voltage of 0.65 V and a reverse current density less than 1 A/cm 2 under 500 V is fabricated, and the reverse recovery time is tested to be 80 ns, and the peak reverse current is 28.1 ma. Temperature-dependent characteristics are also studied in a temperature range of 75 C 200 C. The diode shows a stable Schottky barrier height of up to 200 C and a stable operation under a continuous forward current of 100 A/cm 2. Keywords: 4H SiC, junction barrier Schottky, offset field plate, electrical characteristics PACS: 73.40.Ns, 73.40. c, 85.30.Hi, 85.30.Kk DOI: 10.1088/1674-1056/20/11/117301 1. Introduction Silicon carbide (SiC) is an attractive material for high-power, high-temperature and high-frequency devices because of its superior properties such as wide bandgap, high breakdown field, high thermal conductivity and high saturation electron drift velocity. [1] And 4H SiC Schottky diode has been proved to have great potential in power applications for its low conduction loss and fast switching speed. [2] One major issue for the Schottky diode is its high reverse leakage current, especially at elevated temperature. The junction barrier Schottky (JBS) diode is proposed, for it offers Schottky-like on-state and fast switching characteristics, while the off-state characteristic has a low leakage current similar to that of the PiN diode. [3] The field guard ring (FGR) is an edge termination structure that has been used in 4H SiC JBS diodes, which dynamically introduces negative charge along the surface of an N-type voltage blocking layer. [4] However, FGR has a shortage that is very sensitive to the charges formed in the passivation layer, which takes offset field plate (FP) into consideration in the edge termination method, and the function is simulated to be proved. [5] In this work, JBS diodes with several different parameters, terminated by FGR and offset FP, are fabricated to study their performances. Because of the properties of SiC radical in a strong chemical bonding between silicon and carbon, difficulties in processing the device arise, for example, a relatively high temperature is generally required. Device processing technology in SiC is one of the crucial issues to realize high-performance SiC electronic devices. A test is carried out to examine essential techniques, direct current (DC) characteristics and reverse recovery characteristics and the obtained results are shown below. 2. Design and fabrication A 10-µm N epilayer with a doping of 1.56 10 15 cm 3 was grown on the N + substrate produced by Si crystal and doped by a concentration of more than 1 10 18 cm 3. Offset FP and FGR are employed in this exper- Project supported by the National Natural Science Foundation of China (Grant No. 61006060) and the 13115 Innovation Engineering of Shaanxi Province, China (Grant No. 2008ZDKG-30). Corresponding author. E-mail: fpchen@yeah.net 2011 Chinese Physical Society and IOP Publishing Ltd http://www.iop.org/journals/cpb http://cpb.iphy.ac.cn 117301-1

iment for comparison. Parameters considered in the structure are shown in Fig. 1. In the FGR structure, the parameters investigated are the ring width w and the distance between two nearest guard rings d. Offset FP consists of FPs (there is one FRG under each FR), which are fabricated with Schottky metal-overlaps on a SiO 2 layer with length L. For JBS part, the P N junction width is denoted as m, and the Schottky region width is denoted as s. Concentration/cm -3 10 21 10 19 10 17 10 15 B Al 0 0.4 0.8 1.2 1.6 Depth/mm Fig. 2. Distributions of B and Al atoms after ionimplantation. Fig. 1. Schematic cross section of a half unit of the JBS diode with offset FP as edge termination. To form selective P-type regions in 4H SiC, aluminum-ion (Al + ) or boron-ion (B + ) implantation is commonly employed. Aluminum is particularly attractive for implantation to form heavily doped P + - regions with low sheet resistances, because Al acceptors have smaller ionization energies (190 mev and 240 mev) than B acceptors (285 mev and 300 mev) in 4H and 6H SiC, respectively. Whereas the use of B is much effective for implantation to form deep P N junctions because of its lighter mass and the resulting larger projected range. [6] In this work, Al + and B + were implanted with an energy of 150 ev when the dose is 1.45 10 14 cm 2, and of 400 ev when the dose is 1.79 10 15 cm 2. Figure 2 shows the distributions of Al and B atoms after implantation, tested by secondary ion mass spectroscopy. It can be seen that since a 200- nm SiO 2 was grown on the surface of samples before ion implantation, the peak of the Al curve is arranged close to the surface of SiC which helps to build a better contact in the P + -region and it can protect the surface from damage during ion implanting as well. Samples were annealed at 1650 C for 45 min in argon ambience to activate the implanted ions. During the annealing, a graphite crucible full of SiC powder was used to protect the surface of 4H SiC and avoid silicon atoms escaping from the surface at high annealing temperature. [7] A 500-nm SiO 2 layer was deposited on the surface as a passivation layer. Then a multi-layer comprised of Ti and Al were deposited in the P + regions, followed by a tri-layer metallization of Ti/Ni/Ag deposited on the backside and subsequently annealed at 1000 C in a gas mixture of 97% N 2 and 3% H 2 for 5 min. Bi-layer metallization of Ti/Ag was used to form the front Schottky metal contact and FPs simultaneously. 3. Results and discussion 3.1. DC characteristics Figure 3 shows the forward current density voltage (J V ) characteristics of Schottky barrier diode (SBD) and JBS diodes. The fabricated devices were electrically characterized at room temperature using Keithley 4200. According to parameters stated above, the JBS mentioned below is designed as JBS (s, m). Since SiC JBS diode conduct current flows only through the Schottky region, it is expected that the forward drop is low due to the low barrier height compared with the high turn-on voltage of SiC PN junction. As can be seen, the turn-on voltage drop of SBD is about 0.62 V. When the voltage reaches 1.5 V, the current density is more then 100 A/cm 2, the JBS diode current density is very close to that of SBD. The specific on-resistances are calculated to be 7.7 mω cm 2 for SBD and 8.3 mω cm 2, 10.5 mω cm 2, 7.8 mω cm 2 for JBS(3, 3), JBS(3, 4), JBS(4, 4), respectively. Using the thermionic emission theory, the current through the SiC Schottky diode can be expressed in the form I = AA T 2 exp ( φ ) [ ( ) ] B qv exp 1, (1) kt nkt 117301-2

where A is the diode area, A is the Richardson s constant, φ B is the Schottky barrier height, n is the ideality factor and other constants have their usual meaning. At a low forward voltage, the ideality factor is given by n = q V kt ln I. (2) Calculated with the formulas given above, the ideality factor is 1.6 and φ B is 0.69 ev. a lower reverse current and higher breakdown voltage. It can be seen that JBS(3, 3) with w = 10 µm, d = 6 µm and L = 3 µm shows a reverse current density lower than 1 A/cm 2 when the reverse voltage is 500 V. Forward current/a 10-1 10-2 10-3 a b Forward current/a 0.08 0.04 0 0 1.0 2.0 3.0 Forward voltage/v 0 1.0 2.0 3.0 Forward voltage/v Fig. 4. Temperature-dependent forward I V characteristics of 4H SiC JBS(3, 3). Fig. 3. diodes. Forward J V characteristics of SBD and JBS Temperature-dependent characteristics of the devices were tested by HP 4156, Figure 4 shows the temperature-dependent forward current voltage (I V ) characteristics of a 6.25 10 4 cm 2 JBS(3, 3). In region a, the JBS current coincides with the Schottky one due to the thermionic emission effect, which is characterized by a positive temperature coefficient (TC); in region b, the series resistance of the N-drift layer of the Schottky portion dominates, so that a negative TC arises. [8,9] With temperature increasing from 75 C to 150 C, the turn-on voltage of the JBS diode decreases from 0.61 V to 0.43 V. However, the differential on-resistance significantly increases from 16.15 Ω at 75 C to 22.4 Ω at 150 C. The large increase in differential resistance is due to the large resistance increase in the 10-µm-thick 1.56 10 15 cm 3 doped drift layer with temperature. Reverse J V characteristics of JBS(3, 3) with different edge terminations are shown in Fig. 5, which are tested by Tektronix 370B programmable curve tracer. Since offset FP can effectively reduce the sensitivity to the charge in passivation layer in comparison with FGRs, the JBS diode terminated by offset FP has Reverse current density/ascm -2 10 0 10-2 10-8 FGRs w=10 mm, d=10 mm FGRs w=10 mm, d=6 mm Offset FP w=10 mm, d=10 mm, L=5 mm Offset FP w=10 mm, d=6 mm, L=3 mm 0 100 200 300 400 500 Reverese voltage/v Fig. 5. Reverse characteristics of JBS terminated by FGRs and offset FP. The temperature-dependent reverse blocking characteristics of SBD and JBS(3, 3) are shown in Fig. 6. Over the temperature range of 75 C 200 C, the reverse current of SBD grows from 5.71 10 6 A to 8.56 10 5 A at 20 V, while the JBS diode current grows from 3.21 10 7 A to 9.72 10 5 A. Apparently, because at low voltage bias, the leakage current is dominated by thermionic emission and the reverse current increases with temperature increasing. At high reverse bias, the leakage current is less sensitive to the temperature, which is dominated by the tunneling current. This case is not shown in Fig. 6, because of the testing limit of the equipment. [10] 117301-3

(a) Reverse current/a Reverse current/a 10-5 1 200 OC 10-7 0-4 -8-12 -16-20 Reverse voltage/v 10-5 10-7 10-8 10-9 (b) 1 200 OC 0-4 -8-12 -16-20 Reverse voltage/v Fig. 6. Temperature-dependent reverse I V characteristics of 4H SiC devices. (a) 2.5 10 3 cm 2 SBD, (b) 6.25 10 4 cm 2 JBS(3, 3). 3.2. Reverse recovery characteristics The reverse-recovery testing was performed using the setup that is shown in Fig. 7. The system includes a cascade probe station with micromanipulators and microscope for probe positioning, two Agilent E3631A voltage sources which supply a forward voltage (10 V for SBD, 6 V for JBS) and a 50-V reverse voltage (maximum output), a single-pole double-throw switch which can switch over from forward state to reverse state within 20 ns and a Tektronix TPS2012 oscilloscope with a frequency limit f max = 100 MHz to monitor and record the output waveforms. Since Tektronix TPS2012 oscilloscope can only measure the voltage and resistances of SBD and JBS diodes are changing in the whole process, it is necessary to introduce the 100-Ω resistance R1 into the setup which has a fixed resistance, then by measuring the voltage, the current curve can be calculated easily. Fig. 7. Experimental setup for reverse-recovery measurements. Under the test conditions employed, the reverse recovery characteristics of JBS(3, 3) with different edge terminations are similar. The 6.25 10 4 cm 2 JBS(3, 3) terminated by offset FP is switched over from a 49.4-mA forward current to the blocking state with a reverse bias of 50 V at a current rate-of-fall of 3 A/µs. At room temperature, the diode has a reverse recovery time t rr of 80 ns, a peak reverse current I rm of 28.1 ma and a reverse recovery charge Q rr of 3.37 nc. The 2.5 10 3 cm 2 SBD is switched over from a 95- ma forward current to the blocking state, t rr is 50 ns, I rm is 37.5 ma and Q rr is 3 nc. Current density/ascm -2 80 40 0-40 SBD JBS(3, 3) -4.0-2.0 0 2.0 4.0 6.0 Time/10-7 s Fig. 8. Reverse recovery characteristics of SBD and JBS(3, 3). 4. Conclusion The 4H SiC SBD and the JBS diodes are fabricated with different parameters using two kinds of edge terminations which are FGRs and offset FP. DC tests show that the JBS diodes have a similar forward characteristic, the JBS(3, 3) has a turn-on voltage of 0.65 V and a specific on-resistance of 8.3 mω cm 2. Reverse characteristics show that the JBS diode terminated by offset FP has a higher breakdown voltage. 117301-4

A current density lower than 1 A/cm 2 under 500 V reverse bias is achieved. It also shows an acceptable performance for all devices over a test range of 75 C 200 C. Under switching tests, the JBS diode shows a reverse recovery time of 80 ns, a peak reverse current of 28.1 ma and a reverse recovery charge of 3.37 nc and those for SBD are 50 ns, 37.5 ma and 3 nc, respectively. References [1] Feng Z, Mohammad M I, Biplob K D and Tangali S S 2010 Materials Lett. 64 281 [2] Takao K, Shinohe T, Harada S, Fukuda K and Ohashi H 2010 Digital Object Identifier 2030 [3] Lin Z, Chow T P, Jones K A and Agarwal A 2006 IEEE Transactions on Electron Devices 53 363 [4] Niu G, Merrett J N and Cressler J D 2001 ISPSD 13th International Symposium p. 191 [5] Chen F P, Zhang Y M, Zhang Y M, Lü H L and Song Q W 2010 Chin. Phys. B 19 047305 [6] Negoro Y, Miyamoto N, Kimoto T and Matsunami H 2002 IEEE Transactions on Electron Devices 49 1505 [7] Guo H 2007 Theoretical and Experimental Study on Ohmic Contacts to Silicon Carbide (Ph.D. Thesis) (Shaanxi: Xidian University) (in Chinese) [8] Alessandro V, Irace A, Breglio G, Spirito P, Bricconi A, Carta R, Raffo D and Merlin L 2006 IEEE International Symposium on Power Semiconductor Devices and IC s Naples, June 4 8, 2006 p. 1 [9] Song Q W, Zhang Y M, Zhang Y M, Zhang Q, Guo H, Li Z Y and Wang Z X 2010 Chin. Phys. B 19 047201 [10] Lin Z and Chow T P 2008 IEEE Transactions on Electron Devices 55 1857 117301-5