EE05 Fall 204 Microelectronic Devices and Circuits Prof. Ming C. Wu wu@eecs.berkeley.edu 5 Sutardja Dai Hall (SDH) Terminal Gain and I/O Resistances of BJT Amplifiers Emitter (CE) Collector (CC) Base (CB) = g mr L + g m R E = r π + (β +)R E = "# r o ( + g m R E ) $ % = β Without degeneration: Simply set R E = 0 = R L g m + R L = r π + (β +)R L = r π + R th + β g m + R th β = β + = g m R L ß = g m =!" r o + g m R E # $ For the gain,, of the whole amplifier, you need to include voltage/ current dividers at input and output stages 2
Terminal Gain and I/O Resistances of MOS Amplifiers Source (CS) Drain (CD) Gate (CG) = g mr L + g m R S = = #$ r o + g m R E % & = Without degeneration: Simply set R S = 0 = = = g m = R L g m + R L = g m R L = g m =!" r o + g m R E # $ For the gain,, of the whole amplifier, you need to include voltage/ current dividers at input and output stages 3 Summary of Single-Transistor Amplifiers BJT MOS Ideal Voltage Amplifiers Emitter Emitter with Deg. Collector Base Moderate Large Large Small 0 Large Very Large Small Large A V Large Moderate ~ Large f H Small Moderate Large Large Ideal Voltage Amplifiers Source Source with Deg. Drain Gate Very Large Very Large Large Small 0 Large Very Large Small Large A V Moderate Small ~ Moderate f H Small Moderate Large Large 4 2
Need for Multistage Amplifiers Typical spec for a general purpose operational amplifier Input resistance ~ MΩ Output resistance ~ 00Ω Voltage gain ~ 00,000 No single transistor amplifier can satisfy the spec Cascading multiple stages of amplifiers to meet the spec Usually An input stage to provide required input resistance A middle stage(s) to provide gain An output stage to provide required output resistance It is important to note that the input resistance of the follow -on stage becomes the load of the previous stage 5 A 3-Stage ac-coupled Amplifier Circuit MOSFET M operating in the C-S configuration provides high input resistance and moderate voltage gain. BJT Q 2 in a C-E configuration, the second stage, provides high gain. BJT Q 3, an emitter-follower gives low output resistance and buffers the high gain stage from the relatively low value of load resistance. 6 3
A 3-Stage ac-coupled Amplifier Circuit Input and output of overall amplifier is ac-coupled through capacitors C and C 6. Bypass capacitors C 2 and C 4 are used to get maximum voltage gain from the two inverting amplifiers. Interstage coupling capacitors C 3 and C 5 transfer ac signals between amplifiers but provide isolation at dc and prevent Q-points of the transistors from being affected. In the ac equivalent circuit, bias resistors are replaced by R B2 = R R 2 and R B3 = R 3 R4 7 dc Equivalent Circuit Transistor Parameters M : K n =0 ma/v 2, V TN = 2 V, λ = 0.02V Q 2 : β F =50, V A = 80V, V BE = 0.7V Q 3 : β F = 80, V A = 60V, V BE = 0.7V At dc, the capacitors isolate each individual transistor stage from the others. Thus, the bias point for each transistor may be found using the single transistor analysis methods already discussed. Q - Points M : 5.00 ma, 0.9 V Q 2 :.57 ma, 5.09 V Q 3 :.99 ma, 8.36 V Small - Signal Parameters M : g m =0.0 ms, r o =2.2 kω Q 2 : g m2 = 62.8 ms, r π 2 = 2.39 kω, r o2 = 54.2 kω Q 3 : g m3 = 79.6 ms, r π 3 =.00 kω, r o3 = 34.4 kω 8 4
ac and Small-Signal Equivalent Circuits ac Equivalent Small-signal Equivalent 9 Input Resistance and Voltage Gain n A v = A vt3 A vt2 A vt R I + n A vt = v 2 = g m R L = 0.0S( 0.478kΩ) = 4.78 v R v = v in MΩ i = v i R I + n 0kΩ +MΩ = 0.990v i R I = 620Ω 7.2kΩ = 598Ω R I 2 = 4.7kΩ 5.8Ω = 4.3kΩ R I 3 = 3.3kΩ 250Ω = 232Ω R L = R I n2 = 598Ω r π 2 =598Ω 2390Ω = 478Ω n = R G =MΩ R L2 = R I 2 n3 = R I 2 [ r π 3 + ( β o3 +)R L3 ] =3.54kΩ A vt2 = v 3 = g m2 R L2 = 62.8S( 3.54kΩ) = 222 v 2 A vt3 = v o ( β o3 +)R L3 = = 0.950 v 3 r π 3 + ( β o3 +)R L3 0 R G A v = A vt3 A vt2 A vt = +998 R I + R G 5
Output Resistance 3 = r π + R th + β g m + R th β R th = R I 2 r o2 = 4.3kΩ 54.2kΩ = 4kΩ 3 = 79.6mS + 4kΩ =2.6Ω+ 50Ω = 62.6Ω 80 ut = R E3 3 = 3.3kΩ 62.6Ω = 6.3Ω Current and Power Gain The input signal current delivered to the amplifier from source v i is v i i i = = 9.90x0 7 v i R I + n and the signal current delivered to the load resistor is i o = v o R L = A vv i 250Ω = 998v i 250Ω = 3.99v i Current Gain: Voltage Gain: Power Gain: A i = i o i i = 4.03x0 6 (32 db) A v = v o v i = 9.98x0 2 (60 db) A P = P o = v i o o = A v A i = 4.02x0 9 (96 db) P i v i i i 2 6
Input and Output Signal Range 0.2 + 2 For the first stage: v 0.2( V GS V TN ) v i V For the second stage: v be2 = v 2 = A v v 5mV v 5mV A v v 3 3 0.99 = 0.202 V = 5mV 4.78 =.05mV v i.05mv =.06 mv 0.99 For the third stage: v be3 = A A 0.990v v v2 i 5mV + g m3 R L3 + g m3 R L3 v i + g m3r L3 A v A v2 0.990 5mV = 92.7 µv = 92.7µV ( 92.7µV ) = 998( 92.7µV ) = 92.5 mv Overall: v i min 202mV,.06mV, 92.7µV v o A v SPICE Simulation Circuit 4 7
SPICE Simulation Results A v = 000 f L = 500 Hz f H = 500 khz 5 SPICE Simulation Results v in = 00 µv 6 8
SPICE Simulation Results v in = 750 µv 7 Short-Circuit Time Constant Estimate for f L An estimate for the lower cutoff frequency for an amplifier with multiple coupling and bypass capacitors is given by the sum of the reciprocals of the "short-circuit" time constants: f L 2π n i= S C i where S is the resistance at the terminals of the ith capacitor with all the other capacitors shorted. 8 9
Short-Circuit Time Constant Estimate for f L C : R S = R I + R G =.0 MΩ C 2 : R 2S = R S S = R S g m = 200Ω 0.0S = 66.7 Ω C 3 : R 3S = R D + R I B2 = R D + R I r π 2 = 620Ω+7.2kΩ 2.39kΩ = 2.72 kω C 4 : R 4S = R E 2 E 2 = R E 2 r π 2 + R th2 β o2 + C 5 : R 5S = R C + R I 2 B3 = R L + R I 2 r π 3 + g m3 R L3 2.39kΩ+7.2kΩ 0.620kΩ =.5kΩ =9.2 Ω 5 R 5S = 4.7kΩ+ 5.8kΩ.0kΩ"# + 0.0796S 232Ω $ % =8.9 kω C 6 : R 6S = R L + R E3 E3 = R L + R E3 r π 3 + R th3 β o3 +.0kΩ+ 5.8kΩ 4.7kΩ R 6S = 250Ω+ 3.3kΩ = 35 Ω 8 9 Short-Circuit Time Constant Estimate for f L f L 2π [.0MΩ 22µF + 66.7Ω( 22µF) + 2.72kΩ( 22µF) + 9.2Ω( 22µF) + ] = 5 Hz 35Ω( 22µF) + 8.9kΩ 22µF f L f H 20 0