Combinational Circuit Design

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Combnatonal Crcut Desgn Part I: Desgn Procedure and Examles Part II : Arthmetc Crcuts Part III : Multlexer, Decoder, Encoder, Hammng Code

Combnatonal Crcuts n nuts Combnatonal Crcuts m oututs A combnatonal crcut has: n Boolean nuts ( or more), m Boolean oututs ( or more) logc gates mang the nuts to the oututs

. Secfcaton Desgn Procedure Wrte a comlete secfcaton for the crcut Secfy/Label nut and outut. Formulaton Derve a truth table or ntal Boolean equatons that defne the requred relatonshs beteen the nuts and oututs, f not n the secfcaton Aly herarchcal desgn f arorate 3. Otmzaton Aly -level and multle-level otmzaton (Boolean Algebra, K-Ma, softare) Dra a logc dagram for the resultng crcut usng necessary logc gates. 3

Desgn Procedure (Cont.) 4. Technology Mang Ma the logc dagram to the mlementaton technology selected (e.g. ma nto NANDs) 5. Verfcaton Verfy the correctness of the fnal desgn manually or usng a smulaton tool Practcal Consderatons: Cost of gates (Number) Maxmum alloed delay Fan-n/Fan-out (# of Inut orts/outut orts rovded by devces) 4

Examle Queston: Desgn a crcut that has a 3- bt bnary nut and a sngle outut (f) secfed as follos: F, hen the nut s less than (5) F, otherse Soluton: Ste (Secfcaton): Label the nuts (3 bts) as X, Y, Z X s the most sgnfcant bt, Z s the least sgnfcant bt The outut ( bt) s F: F (), (), () F other nuts 5

Examle (cont.) Ste (Formulaton) Obtan Truth table X Y Z F Boolean Exresson: F XY ZXYZ XYZ Ste 3 (Otmzaton) F XY ZXYZ XYZ XY ZXYZ XYZXZXY XZ XY (Use consensus theorem) Crcut Dagram X Z X Y F 6

Examle Queston (BCD to Excess-3 Code Converter) Code converters convert from one code to another (BCD to Excess-3 n ths examle) The nuts are defned by the code that s to be converted (BCD n ths examle) The oututs are defned by the converted code (Excess-3 n ths examle) Excess-3 code s a decmal dgt lus three converted nto bnary,.e., s, s, etc. 7

Examle (cont.) Ste (Secfcaton) 4-bt BCD nut (A,B,C,D) 4-bt E-3 outut (W,X,Y,Z) BCD Inut Excess 3 Outut Ste (Formulaton) Obtan Truth table Decmal A B C D W X Y Z 3 4 5 6 7 8 9-5 All other nuts X X X X 8

Examle (cont.) Ste 3 (Otmzaton) source: Mano s book 9

Examle 3 Queston (BCD-to-Seven-Segment Decoder) src: Mano s book A seven-segment dslay s dgtal readout found n electronc devces lke clocks, TVs, etc. Made of seven lght-emttng dodes (LED) segments; each segment s controlled searately. A BCD-to-Seven-Segment decoder s a combnatonal crcut Accets a decmal dgt n BCD (nut) Generates arorate oututs for the segments to dslay the nut decmal dgt (outut)

Examle 3 (cont.) Ste (Secfcaton): 4 nuts (A, B, C, D) 7 oututs (a, b, c, d, e, f, g) Ste (Formulaton) BCD Inut 7 Segment Decoder Decmal A B C D a b c d e f g 3 4 5 6 7 8 9-5 All Other Inuts a b c d e f g BCD-to-Seven- Segment Decoder Invald BCD codes No Lght A B C D

Examle 3 (cont.) Ste 3 (Otmzaton) a b c d e f g

Examle 3 (cont.) Ste 3 (Otmzaton) (cont.) a A C A BD AB C B C D b A B A C D A CD B C c A B B C A C A D d A CD A B C B C D AB C A BC D e A CD B C D f A BC A C D A BD AB C g A CD A B C A BC AB C Exercse: Dra the crcut 3

Part II Arthmetc Crcuts Adder Subtractor Carry Look Ahead Adder BCD Adder Multler 4

Half Adder Desgn a half-adder for -bt numbers. Secfcaton: 3. Logc Dagram Otmzaton/Crcut nuts (X,Y) oututs (C,S). Formulaton: x y c s Grahcal Symbol 5

Full Adder A combnatonal crcut that adds 3 nut bts (x, y, c n ) to generate a Sum bt and a Carry-out bt From Bron s Fundamentals of dgtal logc 6

Full Adder Logc Dagram 7 From Bron s Fundamentals of dgtal logc

Full Adder Half Adders Block dagram Crcut Exercse : Verfy ths full-adder mlementaton. 8 From Bron s Fundamentals of dgtal logc

Bgger Adders Ho to buld an adder for n-bt numbers? Examle: 4-Bt Adder Inuts? 9 nuts Oututs? 5 oututs What s the sze of the truth table? 5 ros! Ho many functons to otmze? 5 functons 9

Rle Carry Adder Note: Carry sgnal rles through the full-adder stages. Delay can be an ssue.

Subtracton ( s Comlement) Ho to buld a subtractor usng s comlement? S A ( -B) Src: Mano s Book

Adder/Subtractor : Add : subtract Src: Mano s Book Usng full adders and XOR e can buld an Adder/Subtractor!

Full-Adder (Reve) s x y x c ; x y c c y c 3

Carry-Lookahead Adder (CLA) Defne Then g s called generate functon and s called roagate functon. y x y x g ; c g c s called roagate functon. Rertng c n terms of - terms yelds ) ( c g g c g g c 4

CLA (cont.) Reeatng untl term yelds c g g g g c L L L c can be mlemented n -level AND-OR crcuts. A Carry-Lookahead Adder s based on ths exresson. 5

Rle-carry Adder Delay Only Frst stages shon LSB: (x, y ) (,) Delay: 5 gates For n stages: Delay: n gates 6 From Bron s Fundamentals of dgtal logc

CLA Delay Only Frst stages shon LSB: (x, y ) (,) c g c c g g c Delay: 3 gates For n stages: Delay: 3 gates 7

CLA Imlementaton Total delay : 4 gates ( for all g,, for all carry, for the fnal XOR to comute all s ) Becomes very comlex hen n large. Herarchcal CLA th rle-carry 8

CLA : A better mlementaton Consder c 8 out of block : Recall that 6 7 6 7 5 6 7 6 7 7 8 c g g g g c L L L c g c If defne Then can rte Lkese 6 7 5 6 7 6 7 7 g g g g G L L 3 4 5 6 7 c P 8 c P G c 6 c PP PG G c 6 c P PP P PG P G G c 3 3 3 3 3 3 c P P PP P P PG P P G P G G c 9

CLA : A better mlementaton 3

BCD Addton 3

BCD Adder Adjust -> S Z Adjust -> S Z 6 3

4-bt Comarator 3-(-5)-8-5-47 33

4-bt Comarator X < Y Same sgn: No overflo (V) and N Dfferent sgn: V && N, OR V (overflo) && N (ostve) Thus, condton s N V. X Y -> Z X > Y Same sgn: No overflo (V) and N Dfferent sgn: V && N, OR V (overflo) && N (negatve) Thus, condton s N V,.e., the comlement of N V, (N V). 34

-to- Multlexer (MUX) Multlexer has multle nuts and one outut; t asses the sgnal on one nut to the outut. Symbol Truth Table SOP crcut Crcut th transmsson gates 35

4-to- Multlexer f s s s s ss s s 3 36

4-to- Multlexer 4-to- mux usng -to- mux 6-to- mux usng 4-to- mux 37

crossbar stch nuts, oututs s -> connect x ->y, x ->y s -> connect x ->y, x ->y 38

Synthess of Logc Functons f 39

3-nut XOR Usng -to- MUX Usng 4-to- MUX 4

3-nut Majorty Functon Get 3 nuts and outut f # of s greater than # of s. 4

Shannon s Exanson Shannon s Exanson Theorem f (,, K, n ) f (,, K, ) f (,, K, f f n f, f : cofactors n ) Examle : 3-nut majorty functon f 3 3 3 Can be rertten as f 3 3 ( 3 ) ( 3 ) 3 3 3 4

Shannon s Exanson Usng -to- MUX 3-nut XOR f 3 ( 3 ) ( 3) 43

Shannon s Exanson In general : exand by -varable exanson: n n n f f f f f ),,,,, ( ),,,,, ( ),,, ( K K K K K -varable exanson: hch can be mlemented by a 4-to- MUX. ),, (,, ),, (,, ),, (,, ),, (,, ),,, ( 3 3 3 3 n n n n n f f f f f K K K K K 44

Examle () ) ( 3 3 3 3 3 3 3 f Usng -to- MUX Usng 4-to- MUX 45

3-nut majorty functon f 3 3 ( 3 ) ( 3 ) Let g 3, h 3, then g () 3 ; h 3 () 46

Decoder Man functon: decode encoded data. n-to- n decoder -to-4 decoder 47

Decoder 3-to-8 decoder usng -to-4 decoder 4-to- MUX usng -to-4 decoder 48

4-to-6 Decoder 49

Demultlexer (DEMUX) A m m ROM Block 5

Encoder n -to-n encoder 4-to- bnary encoder 5

Hammng Code In lnear block code famly. Can correct -bt error or detect -bt error. Add arty bts to message bts. Tycally use notaton (n,k) Hammng code, hch means n total bts, k message bts. Clearly there are (n-k) arty bts. 5

(7,4) Hammng Code System Structure 53

Codeords 3 3 ; ; a a a r a a a r a a a r Codeord : a 3 a a a r r r th 54

Syndrome s Error attern s gven by syndrome,.e., s s s (s) here b b b q s b b b3 q; ; s b b b q 3 Examle : Send Receve -> s -> No error Receve -> s -> Error at b Receve -> s -> Error at b 55

(7,4) Hammng Encoder Exercse : Desgn the (7,4) Hammng Decoder 56

Gate Arrays (Programmable Logc Devce) Basc Structure (AND-OR GA) 57

Examle f a b abc g a b c ab bc h a b c 58

Smlfed Dagram 59

Usng ROM W ( A, B, C, D) X ( A, B, C, D) Y ( A, B, C, D) m(3,7,8,9,,5) m(3,4,5,7,,4,5) m(,5,7,,5) 6

Usng PLA (,5,7,,5) ),,, ( (3,4,5,7,,4,5) ),,, ( (3,7,8,9,,5); ),,, ( m D C B A Y m D C B A X m D C B A W } or { } or { A BD BCD ACD D A C Y ABC BCD A CD ACD A BC X ACD A CD AB C CD AB C W 6

Usng PLA () 6

Usng Programmable Array Logc 63