Smart Highside Power Switch

Similar documents
Smart Highside Power Switch

Smart Highside Power Switch PROFET

Smart Highside Power Switch

Smart Highside Power Switch

Smart High-Side Power Switch

Smart Two Channel Highside Power Switch

Smart Highside Power Switch

Smart High-Side Power Switch

Smart Highside Power Switch

Smart Sense High-Side Power Switch For Industrial Applications

Smart Sense High-Side Power Switch

Smart Power High-Side-Switch

PROFET BTS 840 S2. Smart High-Side Power Switch Two Channels: 2 x 30mΩ Current Sense

Smart High-Side Power Switch for Industrial Applications 1 Channel: 1 x 200mΩ

N channel vertical power FET in Smart SIPMOS technology. Fully protected by embedded protection functions. Overvoltage- Protection

N channel vertical power FET in Smart SIPMOS technology. Fully protected by embedded protection functions. Overvoltage- Protection

Data Sheet, Rev. 1.1, September 2011 HITFET - BTS3405G. Smart Low-Side Power Switch. Automotive Power

Smart Lowside Power Switch HITFET BSP 75N

HV513 8-Channel Serial to Parallel Converter with High Voltage Push-Pull Outputs, POL, Hi-Z, and Short Circuit Detect

Data Sheet, Rev. 1.0, March 2008 BTS4130QGA. Smart High-Side Power Switch. Automotive Power

Datasheet, Rev. 1.1, Nov BTS5012SDA. Smart High-Side Power Switch PROFET One Channel. Automotive Power

Datasheet, Rev. 1.0, Jan BTS TMB. Smart High-Side Power Switch PROFET One Channel. Automotive Power

Features / Advantages: Applications: Package: Y4

Datasheet, Rev. 1.1, February 2008 BTS3160D. 10mOhm Smart Low Side Power Switch. Automotive Power

Data Sheet, V1.1, February 2007 BTS 6142D. Smart High-Side Power Switch PROFET One Channel, 12 mω. Automotive Power. Never stop thinking.

Features / Advantages: Applications: Package: Y4

XPT IGBT Module MIXA450PF1200TSF. Phase leg + free wheeling Diodes + NTC MIXA450PF1200TSF. Part number

HITFET HITFET - BTS3046SDR. Datasheet. Automotive Power. Smart Low Side Power Switch

Data Sheet, V1.0, January 2004 BTS 5234L. Smart High-Side Power Switch PROFET Two Channels, 60 mω. Automotive Power. Never stop thinking.

Features / Advantages: Applications: Package: Y4

Data Sheet, Rev. 1.0, March 2008 BTS4160DGA. Smart High-Side Power Switch. Automotive Power

p h a s e - o u t Three phase full Bridge with Trench MOSFETs in DCB isolated high current package GWM X2

Converter - Brake - Inverter Module (CBI2)

Data Sheet, Rev.1.0, April 2008 BTS4175SGA. Smart High-Side Power Switch. Automotive Power

Converter - Brake - Inverter Module (CBI2)

Data Sheet, Rev. 1.0, March 2008 BTS4300SGA. Smart High-Side Power Switch. Automotive Power

Converter - Brake - Inverter Module (CBI2)

Converter - Brake - Inverter Module (CBI3)

NDP4050L / NDB4050L N-Channel Logic Level Enhancement Mode Field Effect Transistor

NDS356P P-Channel Logic Level Enhancement Mode Field Effect Transistor

CoolMOS 1) Power MOSFET with Series Schottky Diode and Ultra Fast Antiparallel Diode

Top View. Top View. V DS Gate-Source Voltage ±8 ±8 Continuous Drain Current Pulsed Drain Current C V GS I D -2.5 I DM P D 0.

p h a s e - o u t Dual Power MOSFET Module VMM X2 V DSS = 75 V I D25 = 1560 A R DS(on) = 0.38 mω Phaseleg Configuration

NDS332P P-Channel Logic Level Enhancement Mode Field Effect Transistor

AO V Complementary Enhancement Mode Field Effect Transistor

p h a s e - o u t Three Phase Rectifier Bridge with IGBT and Fast Recovery Diode for Braking System VVZB 135 = 1600 V = 135 A Recommended replacement:

V DS. 100% UIS Tested 100% R g Tested. Top View. Top View S2 G2

Type Ordering Code Package TLE 4729 G Q67006-A9225 P-DSO-24-3 (SMD)

NDH834P P-Channel Enhancement Mode Field Effect Transistor

NCV84160/D. Self Protected Very Low I q High Side Driver with Analog Current Sense

5-V Low Drop Fixed Voltage Regulator TLE 4268

Top View. Top View S2 G2 S1 G1

NDS355AN N-Channel Logic Level Enhancement Mode Field Effect Transistor

Infineon Basic LED Driver TLD1124EL. Data Sheet. Automotive. 1 Channel High Side Current Source. Rev. 1.0,

MC74VHC1GT125. Noninverting Buffer / CMOS Logic Level Shifter with LSTTL Compatible Inputs

Power MOSFET Stage for Boost Converters

BTS7012-1EPA. 1 Overview. Smart High-Side Power Switch. Package PG-TSDSO Marking A

BTS7008-1EPP. 1 Overview. High Current PROFET 12V Smart High-Side Power Switch. Package PG-TSDSO Marking P

BTS7004-1EPP. 1 Overview. High Current PROFET 12V Smart High-Side Power Switch. Package PG-TSDSO Marking P

SOTiny Gate STX. Input. Descriptio n. Features. Block Diagram. Pin Configuration. Recommended Operating Conditions (1) Pin Description.

3~ Rectifier Bridge, half-controlled (high-side) + Brake Unit + NTC /20 NTC. Features / Advantages: Applications: Package: E2-Pack

Features / Advantages: Applications: Package: SMPD

5STF 28H2060. Fast Thyristor. VDRM, VRRM = V High operational capability. ITAV = A Optimized turn-off parameters

S G V DS V GS Pulsed Drain Current B -15 Schottky reverse voltage Continuous Forward Current A F I DM V KA

BTS7200-2EPC. 1 Overview. Smart High-Side Power Switch. Package PG-TSDSO-14 Marking C

2x 10 mω DZ2 IN0 IN1 DEN. Control DSEL. Protection. Diagnosis OUT1 RGND RSENSE

PI74STX1G126. SOTiny Gate STX Buffer with 3-State Output. Features. Descriptio n. Block Diagram. Pin Configuration

Standard Rectifier Module

SOTiny TM LVDS High-Speed Differential Line Receiver. Features. Description. Applications. Pinout. Logic Diagram. Function Table

5STF 07T1414 Old part no. TR 907FC

5STF 11F3010 Old part no. TR Fast Thyristor

Chapter 7 Response of First-order RL and RC Circuits

PT8A A-F/67A/68A NTC Heating Controller with Multi LEDs

V DS I D (at V GS =-10V) R DS(ON) (at V GS = -4.5V) 100% UIS Tested 100% R g Tested

Type Ordering Code Package TLE 6255 G Q67006-A9352 P-DSO-14-9 (SMD)

IXTA96P085T IXTP96P085T IXTH96P085T

IXRH 40N120. IGBT with Reverse Blocking capability V CES I C25. = ±1200 V = 55 A V CE(sat) = 2.3 V typ IXYS All rights reserved TO-247 AD

Lecture -14: Chopper fed DC Drives

IXGH48N60C3D1. GenX3 TM 600V IGBT with Diode V CES = 600V I C110. = 48A V CE(sat) 2.5V t fi(typ) = 38ns. High speed PT IGBT for kHz Switching

Silicon Controlled Rectifiers UNIT-1

TLD2326. Internal supply. Thermal protection IN_SET3 IN_SET2 IN_SET1. Current adjustment TLD2326EL CFB

2-Phase Stepper-Motor Driver Bipolar-IC TLE4729G

Dual Low Drop Voltage Regulator TLE 7469

Smart Highside High Current Power Switch

PI5A3157. SOTINY TM Low Voltage SPDT Analog Switch 2:1 Mux/Demux Bus Switch. Features. Descriptio n. Applications. Connection Diagram Pin Description

V DS. 100% UIS Tested 100% R g Tested

MC74HC138A. 1 of 8 Decoder/ Demultiplexer. High Performance Silicon Gate CMOS

Direct Current Circuits. February 19, 2014 Physics for Scientists & Engineers 2, Chapter 26 1

Chapter 5-4 Operational amplifier Department of Mechanical Engineering

Smart Lowside Power Switch

L1, L2, N1 N2. + Vout. C out. Figure 2.1.1: Flyback converter

SFH636. Optocoupler, Phototransistor Output, 1 Mbd, 10 kv/ms CMR, Split CollectorTransistor Output VISHAY. Vishay Semiconductors.

CHAPTER 6: FIRST-ORDER CIRCUITS

Module 10 SCR. 2. To understand two Transistor Static and Transient Models. 3. To learn the SCR Turn-on and Turn-off methods

TrenchMV TM Power MOSFET

Silicon Diffused Power Transistor

Introduction to Digital Circuits

Topic Astable Circuits. Recall that an astable circuit has two unstable states;

TLE94003EP. Features. Potential applications. Product validation. Description

Quad 2-Input OR Gate High-Performance Silicon-Gate CMOS

Transcription:

Smar ighside Power Swich Feaures Overload proecion Curren limiaion Shor circui proecion Thermal shudown Overvolage proecion (including load dump) Fas demagneizaion of inducive loads Reverse baery proecion ) Undervolage and overvolage shudown wih auoresar and hyseresis CMOS diagnosic oupu Open load deecion in OFFsae CMOS compaible inpu oss of ground and loss of proecion Elecrosaic discharge (ESD) proecion Applicaion µc compaible power swich wih diagnosic feedback for 2 and 24 DC grounded loads All ypes of resisive, inducive and capacive loads Replaces elecromechanical relays, fuses and discree circuis PROFET Produc Summary Overvolage proecion (AZ) 6 Operaing volage (on) 4.7... 42 Onsae resisance RON 220 mω oad curren (SO) (SO).8 A Curren limiaion (SCr) A Sandard General Descripion N channel verical power FET wih charge pump, ground referenced CMOS compaible inpu and diagnosic feedback, monolihically inegraed in Smar SPMOS echnology. Fully proeced by embedded proecion funcions. TO220AB/ Sraigh leads SMD olage source Overvolage proecion Curren limi Gae proecion + 3 ogic 2 ESD olage sensor ogic Charge pump evel shifer Recifier imi for unclamped ind. loads Open load deecion Temperaure sensor oad 4 Signal Shor circui deecion PROFET oad ) Wih exernal curren limi (e.g. resisor R =0 Ω) in connecion, resisor in series wih connecion, reverse load curren limied by conneced load. Semiconducor Group 03.97

Pin Symbol Funcion ogic ground 2 npu, acivaes he power swich in case of logical high signal 3 + Posiive power supply volage, he ab is shored o his pin 4 S Diagnosic feedback, low on failure (oad, ) O Oupu o he load Maximum Raings a Tj = 2 C unless oherwise specified Parameer Symbol alues Uni Supply volage (overvolage proecion see page 3) 6 oad dump proecion 2) oaddump = U A + s, U A = 3. 4) oad dump 00 R 3) = 0. Ω, R = 6.6 Ω, d = 400 ms, = low or high oad curren (Shor circui curren, see page 4) selflimied A Operaing emperaure range T j 40...+0 C Sorage emperaure range T sg...+0 Power dissipaion (DC), T C 2 C P o 0 W nducive load swichoff energy dissipaion, single pulse = 2, T j,sar = 0 C, T C = 0 C cons. =.8 A, Z = 2.3, 0 Ω: E AS 4. J Elecrosaic discharge capabiliy (ESD) (uman Body Model) : all oher pins: ESD 2 k acc. MD883D, mehod 30.7 and ESD assn. sd. S.993 npu volage (DC) 0... +6 Curren hrough inpu pin (DC) ±.0 ma Curren hrough saus pin (DC) ±.0 see inernal circui diagrams page 6 Thermal Characerisics Parameer and Condiions Symbol alues Uni min yp max Thermal resisance chip case: R hjc 2. K/W juncion ambien (free air): R hja 7 SMD version, device on PCB ) : 3 2) Supply volages higher han (AZ) require an exernal curren limi for he and saus pins, e.g. wih a 0 Ω resisor in he connecion and a kω resisor in series wih he saus pin. A resisor for he proecion of he inpu is inegraed. 3) R = inernal resisance of he load dump es pulse generaor 4) oad dump is seup wihou he DUT conneced o he generaor per SO 7637 and D 40839 ) Device on 0mm*0mm*.mm epoxy PCB FR4 wih 6cm 2 (one layer, 70µm hick) copper area for connecion. PCB is verical wihou blown air. Semiconducor Group 2

Elecrical Characerisics Parameer and Condiions Symbol alues Uni a Tj = 2 C, = 2 unless oherwise specified min yp max oad Swiching Capabiliies and Characerisics Onsae resisance (pin 3 o ) =.6 A T j =2 C: T j =0 C: R ON 90 390 Nominal load curren, SO Norm (pin 3 o ) ON = 0., T C = 8 C (SO).6.8 A Oupu curren (pin ) while disconneced or pulled up, =30, = 0, see diagram (high) ma page 7 Turnon ime o 90% : Turnoff ime o 0% : R = 2 Ω, Tj =40...+0 C Slew rae on 0 o 30%, R = 2 Ω, Tj =40...+0 C Slew rae off 70 o 40%, R = 2 Ω, Tj =40...+0 C on off 220 440 2 8 mω µs d /d on 3 /µs d/d off 6 /µs Operaing Parameers Operaing volage 6) Tj =40...+0 C: (on) 4.7 42 Undervolage shudown Tj =2 C: (under) 2.9 4. Tj =40...+0 C: 2.7 4.7 Undervolage resar Tj =40...+0 C: (u rs) 4.9 Undervolage resar of charge pump (ucp).6 6.0 see diagram page 2 Undervolage hyseresis (under) = (u rs) (under) (under) 0. Overvolage shudown Tj =40...+0 C: (over) 42 2 Overvolage resar Tj =40...+0 C: (o rs) 40 Overvolage hyseresis Tj =40...+0 C: (over) 0. Overvolage proecion 7) Tj =40...+0 C: (AZ) 6 70 =40 ma Sandby curren (pin 3), (off) µa =0, 0 T j =40...+0 C: 40 70 Operaing curren (Pin ) 8), = ma 6) A supply volage increase up o =.6 yp wihou charge pump, 2 7) Meassured wihou load. See also ON(C) in able of proecion funcions and circui diagram page 7. 8) Add, if > 0, add, if >. Semiconducor Group 3

Parameer and Condiions Symbol alues Uni a Tj = 2 C, = 2 unless oherwise specified min yp max Proecion Funcions niial peak shor circui curren limi (pin 3 o ) 9), ( max 40 µs if ON > ON(SC) ) T j =40 C: T j =2 C: T j =+0 C: Overload shudown curren limi (SCp) (SCr) 9 23 2 4 ON = 8, T j = T j (see iming diagrams, page 0) A Shor circui shudown delay afer inpu pos. slope ON > ON(SC), T j =40..+0 C: d(sc) 40 µs min value valid only, if inpu "low" ime exceeds 60 µs Oupu clamp (inducive load swich off) a = ON(C) = 40 ma, T j =40..+0 C: ON(C) 6 68 73 = A, T j =40..+0 C: 7 Shor circui shudown deecion volage (pin 3 o ) ON(SC) 8. Thermal overload rip emperaure T j 0 C Thermal hyseresis T j 0 K Reverse baery (pin 3 o ) 0) 32 A Diagnosic Characerisics Open load deecion curren (included in sandby curren (off) ) T j =40...+0 C: (off) 30 60 µa Open load deecion volage T j =40..0 C: (O) 2 3 4 9) Shor circui curren limi for max. duraion of d(sc) max =40 µs, prior o shudown 0) Requires 0 Ω resisor in connecion. The reverse load curren hrough he inrinsic drainsource diode has o be limied by he conneced load. Noe ha he power dissipaion is higher compared o normal operaing condiions due o he volage drop across he inrinsic drainsource diode. The emperaure proecion is no acive during reverse curren operaion! npu and Saus currens have o be limied (see max. raings page 2 and circui page 7). Semiconducor Group 4

Parameer and Condiions Symbol alues Uni a Tj = 2 C, = 2 unless oherwise specified min yp max npu and Saus Feedback ) npu resisance see circui page 6 R 9 kω npu urnon hreshold volage T j =40..+0 C: (T+). 2.4 npu urnoff hreshold volage T j =40..+0 C: (T).0 npu hreshold hyseresis (T) 0. Off sae inpu curren (pin 2), = 0.4 (off) 30 µa On sae inpu curren (pin 2), = 3. (on) 0 2 70 µa Delay ime for saus wih open load d( O3) 200 µs afer npu neg. slope (see diagram page ) Saus invalid afer posiive inpu slope d( SC) 40 µs (shor circui) Tj=40... +0 C: Saus oupu (CMOS) T j =40...+0 C, = 0 µa: T j =40...+0 C, = +.6 ma: Max. saus curren for curren source (ou): valid saus oupu, curren sink (in) : T j =40...+0 C (high) 2) (low) + 3) 4.4. 6. 0.4 0.2.6 ma ) f a ground resisor R is used, add he volage drop across his resisor. 2) S high during undervolage shudown 3) No curren sink capabiliy during undervolage shudown Semiconducor Group

Truh Table Normal operaion Open load Shor circui o Shor circui o Overemperaure Undervolage Overvolage npu Oupu Saus level level 42 B2 4) 40 D2 ( ) ) 6) 6) 6) 6) 40 E2/F2 ( ) ) 40 G2 ( ) ) = "ow" evel = don' care Z = high impedance, poenial depends on exernal circui = "igh" evel Saus signal afer he ime delay shown in he diagrams (see fig. page...2) Terms Saus oupu 40 2 2 4 3 PROFET R ON ogic ESD ZD Zener diode: 6 yp., max.0 ma, ogic yp, ESD zener diodes are no o be used as volage clamp a DC condiions. Operaion in his mode may resul in a drif of he zener volage (increase of up o ). npu circui (ESD proecion) R Shor circui deecion Faul Condiion: ON > 8. yp.; high + ESDZD ON ESD zener diodes are no o be used as volage clamp a DC condiions. Operaion in his mode may resul in a drif of he zener volage (increase of up o ). ogic uni Shor circui deecion 4) Power Transisor off, high impedance, versions BTS 40, BTS 42B: inernal pull up curren source for open load deecion. ) ow resisance shor o oupu may be deeced in ONsae by he noloaddeecion 6) No curren sink capabiliy during undervolage shudown Semiconducor Group 6

nducive and overvolage oupu clamp disconnec + 3 Z 2 PROFET ON PROFET 4 ON clamped o 68 yp. Overvol. and reverse ba. proecion + Any kind of load. n case of npu=high is (T+). Due o >0, no = low signal available. disconnec wih pull up R R R Z ogic Z2 PROFET 2 4 3 PROFET R Signal Z = 6.2 yp., Z2 = 70 yp., R = 0 Ω, R = kω, R = 9 kω yp. Openload deecion OFFsae diagnosic condiion: > 3 yp.; low OFF (O) Any kind of load. f > (T+) device says off Due o >0, no = low signal available. disconnec wih energized inducive load high 2 4 3 PROFET ogic uni Open load deecion Signal Normal load curren can be handled by he PROFET iself. Semiconducor Group 7

disconnec wih charged exernal inducive load high 2 4 S 3 PROFET D Maximum allowable load inducance for a single swich off = f ( ); T j,sar = 0 C,T C = 0 C cons., = 2, R = 0 Ω [m] 0000 000 f oher exernal inducive loads are conneced o he PROFET, addiional elemens like D are necessary. nducive oad swichoff energy dissipaion E 00 0 E AS = PROFET Z { R E oad E E R 2 3 4 6 [A] Typ. ransien hermal impedance chip case Z hjc = f( p, D), D= p /T Z hjc [K/W] 0 Energy sored in load inducance: E = /2 2 While demagneizing load inducance, he energy dissipaed in PROFET is E AS = E + E E R = ON(C) i () d, wih an approximae soluion for R > 0 Ω: E AS = 2 R ( + (C) ) ln R (+ (C) ) 0. D= 0. 0.2 0. 0.0 0.02 0.0 0 0.0 E E4 E3 E2 E E0 E p [s] Semiconducor Group 8

Opions Overview all versions: ighside swich, npu proecion, ESD proecion, load dump and reverse baery proecion wih 0 Ω in connecion, proecion agains loss of ground Type BTS 42 B2 40D2 40E2 40G2 402 307 308 ogic version B D E G Overemperaure proecion wih hyseresis Tj >0 C, lach funcion 7)8) Tj >0 C, wih auoresar on cooling Shor circui o proecion swiches off when ON >3. yp. and > 8 yp 7) (when firs urned on afer approx. 20 µs) swiches off when ON >8. yp. 7) (when firs urned on afer approx. 20 µs) Achieved hrough overemperaure proecion Open load deecion in OFFsae wih sensing curren 30 µa yp. in ONsae wih sensing volage drop across power ransisor Undervolage shudown wih auo resar Overvolage shudown wih auo resar 9) Saus feedback for overemperaure shor circui o shor o open load undervolage overvolage Saus oupu ype CMOS Open drain 20) 20) 20) Oupu negaive volage ransien limi (fas inducive load swich off) o ON(C) oad curren limi high level (can handle loads wih high inrush currens) low level (beer proecion of applicaion) Proecion agains loss of 7) ach excep when < ON(SC) afer shudown. n mos cases = 0 afer shudown ( 0 only if forced exernally). So he device remains lached unless < ON(SC) (see page 4). No lach beween urn on and d(sc). 8) Wih lach funcion. Reseed by a) npu low, b) Undervolage 9) No auo resar afer overvolage in case of shor circui 20) ow resisance shor o oupu may be deeced in ONsae by he noloaddeecion Semiconducor Group 9

Timing diagrams Figure a: urn on: Figure 2b: Swiching an inducive load d( ) A CMOS A in case of oo early =high he device may no urn on (curve A) d( ) approx. 0 µs Figure 2a: Swiching a lamp, Figure 3a: Turn on ino shor circui, d(sc) d(sc) approx. µs if > 8. yp. Semiconducor Group 0

Figure 3b: Turn on ino overload, Figure 4a: Overemperaure, Rese if (=low) and (T j <T j ) (SCp) (SCr) T J eaing up may require several seconds, < 8. yp. Figure 3c: Shor circui while on: *) goes high, when =low and Tj<Tj Figure a: Open load: deecion in OFFsae, urn on/off o open load d( O3) **) open normal **) curren peak approx. 20 µs *) in case of exernal capaciy d(,o3) may be higher due o high impedance *) = 30 µa yp Semiconducor Group

Figure b: Open load: deecion in OFFsae, open load occurs in offsae Figure 6b: Undervolage resar of charge pump on ON(C) offsae onsae (over) offsae (u rs) (o rs) normal load open load normal load (under) (u cp) *) *) charge pump sars a (ucp) =.6 yp. *) = 30 µa yp Figure 7a: Overvolage: Figure 6a: Undervolage: ON(C) (over) (o rs) (under) (u cp) (u rs) CMOS if > (AZ) increase of due o resisor volage. Semiconducor Group 2

Figure 9a: Overvolage a shor circui shudown: (o rs) Oupu shor o shor circui shudown Overvolage due o power line inducance. No overvolage auoresar of PROFET afer shor circui shudown. Semiconducor Group 3

Package and Ordering Code All dimensions in mm Sandard TO220AB/ Ordering code Q67060S609A2 SMD TO220AB/, Op. E3062 Ordering code E3062A T&R: Q67060S609A4 TO220AB/, Opion E3043 Ordering code E3043 Q67060S609A3 Semiconducor Group 4

This daashee has been download from: www.daasheecaalog.com Daashees for elecronics componens.