Semi-insulating SiC substrates for high frequency devices

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Klausurtagung Silberbach, 19. - 21. Feb. 2002 Institut für Werkstoffwissenschaften - WW 6 Semi-insulating SiC substrates for high frequency devices Vortrag von Matthias Bickermann

Semi-insulating SiC substrates for high frequency devices what s this? Semi-insulating......Silicon Carbide......SiC substrates......high frequency devices...?

First, explain what means semi-insulating... Semi-insulating......Silicon Carbide......SiC substrates......high frequency devices...?

The basics: semi-insulating Deep electronic levels E >> kt: Almost no thermal activation at room temperature Fermi level is pinned at the deep level Temperature dependence of the charge carrier concentration is the same as in an intrinsic semiconductor! E N A? shallow acceptor» N D E A E F LEITUNGSBAND? deep (midgap) acceptor E A E F E E F C VALENZBAND? intrinsic semiconductor E F E G /2 E E F C shallow acceptor E-E F 2kT V p ~ exp( ) deep acceptor E-E F kt V p ~ exp( ) intrinsic semiconductor E-E C V E-E F 2kT kt V p ~ exp( ) exp( ) p 10 5 cm 293K

What is silicon carbide used for? Semi-insulating......Silicon Carbide......SiC substrates......high frequency devices...?

The basics: silicon carbide Electronic properties of SiC maximum work temperature... 1240 C (Si: 300 C) electrical breakdown field...2,5 MV/cm (Si: 0,3 MV/cm) 7 7 saturation drift velocity... 2,5 10 cm²/vs (Si: 1 10 cm²/vs) thermal conductance... 5W/mK (Si: 1,5 W/mK) dielectric constant......9,7 (Si: 11,8) power1 MW 100 10 1kW 100 Thyristor GTO GTO IGBT Si IGBT SiC MOSFET MOSFET GaAs SiGe MESFET GaN SiC MESFET HBT 10 Hz 100 1 khz 10 100 1MHz 10 100 1GHz 10 100 frequency

Yes, silicon carbide devices are superior, but why substrates are needed? Semi-insulating......Silicon Carbide......SiC substrates......high frequency devices...?

The Basics: SiC substrates for GaN and SiC devices...for SiC devices high-power high-frequency low harmonic noise (CE-Normative) Infineon SiC-Schottky-Doide Frauenhofer-Insitut LUCOLED for GaN devices low lattice mismatch similar thermal expansion coeff. blue LEDs / Laser white LED / LUCOLED

Tell me more about high-frequency devices, how do they work? Semi-insulating......Silicon Carbide......SiC substrates......high frequency devices...?

SiC high-frequency device: introducing the MESFET

High-frequency MESFET device: Transit time: = L²/µVD SiC high-frequency device: MESFET operation limits RC time constant: = R C 1/(neµ) 0 A/L High µ: low channel n-type doping - series resistance at source and drain - miller capacitance at gate - parasitic capacitance at substrate interface - heat dissipation Channel needs to be defined: p or semi-insulating substrate?

SiC high-frequency device: p-type vs. semi-insulating substrate p-type vs. semi-insulating substrate: - device / connection isolation - heat dissipation cooling from the backside needs grounded metallization - series resistance can be lowered also by backside grounded metallization - pn junction at the channel-substrate interface is influenced by the electric field at the gate - parasitic capacitance at substrate interface can lead to space charge at channel-substrate interface drain current collapse

Now on to some practical work! How to prepare semi-insulating SiC substrates...

Growth of semi-insulating SiC: search for deep levels E N Ti N P Ta CONDUCTION BAND O W O V Zn V Be D Al B Ga Mg Sc Cr Z/Z 1 2 UD-1 v Si 0 i-band acceptors donors intrinsic defects VALENCE BAND Known defect levels in SiC: Only the vanadium donator level lies midgap Acceptors: Wolfram, Zinc, Vanadium, D-Center In bulk SiC growth only V doping was published so far 0 Intrinsic defects: UD-1 und v are also of interest! Si

Growth of semi-insulating SiC: vanadium deep levels Semi-insulating SiC by vanadium doping: 0,10 ev Leitungsband N --/0 (Donator) 0,6...0,8 ev SiC is generally n-type ( N): Al or B doping to get p-type E? V 4+/3+ (Akzeptor) V 3+/4+ acceptor level: deep level, as E 800 mev (just like Fe in InP and EL2 in GaAs) 1eV 1,55 ev 0,32 ev 0,25 ev V Valenzband B 5+/4+ 0/+ (Donator) (Akzeptor) V 4+/5+ donor level: deep midgap level ( E 1450 mev, 10 cm) 15 6H Al 0/+ (Akzeptor)

Growth of semi-insulating SiC: implant or grow? SiC+VC Kimoto, Appl. Phys. Lett. 69 (1996) 1113 Barrett, US Patent 5,611,955 (1997) Only by growth semi-insulating substrates are obtained!

Growth of semi-insulating SiC: problems in V doped growth Problems in bulk growth of semi-insulating V-doped SiC: Inhomogeneous incorporation of vanadium during growth 17 3 Low solubility limit: 5 10 cm Formation of precipitates Impurities (mainly nitrogen) are 16 17 3 present in the 10 to 10 cm range and decrease during growth time: low yield changes in electrical behavior p-type co-doping required growth direction

Growth of semi-insulating SiC: electrical properties of SiC:V samples V donor level activation energy Jenny, J. Appl. Phys. 78 (1995) 3839 Wafer homogeneity on specific resistivity with activated V acceptor SiC:V electrical properties: Results are encouraging!

Growth of semi-insulating SiC: high-purity semi-insulating SiC High-purity semi-insulating SiC (HPSI-SiC): Reduction of impurity levels to beyond 10 Electrical behavior gouverned by intrinsic defects 0 UD-1 and v Si (how are they generated?) 15 3 cm Carter, US Patent 6,218,680 B1 (2001) The neutral silicon vacancy anneals partially out at 1600 C Ellison, MRS Symp. Proc. 640 (2001) H1 2

Growth of semi-insulating SiC: HPSI vs. V-doped SiC in MESFET behavior HPSI vs. V-doped SiC: Lower impurity and defect concentration: Capacitance losses reduced Carrier trapping at substrate/channel interface suppressed HPSI-SiC shows superior behavior over V-doed SiC!

Semi-insulating SiC substrates for high frequency devices Résumé SiC substrates are needed for SiC and GaN high-power and high-frequency devices. Semi-insulating substrates lead to better performance of these devices (as it was demonstrated on the MESFET structure) A semiconductor becomes semi-insulating as a deep (midgap) level dominates electrical behavior For SiC, this has been demonstrated for vanadium doping and for high-purity growth utilizing the formation of intrinsic defects like UD-1 or v Si 0 Results show that HPSI-SiC leads to superior device performance