N Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS RDSON (MX.) ID D 6V 6mΩ G UIS, Rg % Tested Pb Free Lead Plating & Halogen Free S BSOLUTE MXIMUM RTINGS (T C = 5 C Unless Otherwise Noted) PRMETERS/TEST CONDITIONS SYMBOL LIMITS UNIT Gate Source Voltage V GS ± V Continuous Drain Current T C = 5 C T C = C I D Pulsed Drain Current I DM 3 valanche Current I S valanche Energy L =.mh, ID=, RG=5Ω E S 7. Repetitive valanche Energy L =.5mH E R 3.6 mj Power Dissipation T C = 5 C P D 6.6 T C = C 6.6 W Operating Junction & Storage Temperature Range T j, T stg 55 to 5 C THERML RESISTNCE RTINGS THERML RESISTNCE SYMBOL TYPICL MXIMUM UNIT Junction to Case R JC 7.5 Junction to mbient R J C / W Pulse width limited by maximum junction temperature. Duty cycle % p.
ELECTRICL CHRCTERISTICS (T C = 5 C, Unless Otherwise Noted) PRMETER SYMBOL TEST CONDITIONS LIMITS UNIT MIN TYP MX STTIC Drain Source Breakdown Voltage V (BR)DSS V GS = V, I D = 5 6 V Gate Threshold Voltage V GS(th) V DS = V GS, I D = 5.. 3. Gate Body Leakage I GSS V DS = V, V GS = ±V ± n Zero Gate Voltage Drain Current I DSS V DS = 4V, V GS = V V DS = 4V, V GS = V, T J = 5 C 5 On State Drain Current I D(ON) V DS = V, Drain Source On State Resistance R DS(ON), I D = 5 6 V GS = 5V, I D = 5 75 mω Forward Transconductance g fs V DS = 5V, I D = 9 S DYNMIC Input Capacitance C iss Output Capacitance C V GS = V, V DS = V, f = MHz oss 67 633 pf Reverse Transfer Capacitance C rss 44 Gate Resistance R g V GS = 5mV, V DS = V, f = MHz.5 Ω Total Gate Charge, Q g V DS = V,, 3. Gate Source Charge, Q gs I D =. Gate Drain Charge, Q gd 4. nc Turn On Delay Time, t d(on) Rise Time, t r V DS = V, 7.5 Turn Off Delay Time, t d(off) I D =,, R GS = 6Ω ns Fall Time, t f 6 SOURCE DRIN DIODE RTINGS ND CHRCTERISTICS (T C = 5 C) Continuous Current I S Pulsed Current 3 I SM 4 Forward Voltage V SD I F = I S, V GS = V.3 V Reverse Recovery Time t rr I F = 5, dl F /dt = / S 5 ns Reverse Recovery Charge Q rr nc Pulse test : Pulse Width 3 sec, Duty Cycle %. Independent of operating temperature. p.
3 Pulse width limited by maximum junction temperature. Ordering & Marking Information: Device Name: for IPK (TO 5) B6 N6 BCDEFG B6N6: Device Name BCDEFG: Date Code Outline Drawing E E C B D D D3 L H L P B Dimension in mm Dimension B B C D D D3 E E H L L P Min....4.6.4 5.3 6.7 5. 6.3 4. 4..9.9. Max..5.3...6 6. 7.3. 6.7 5.45 5..7..5 p.3
TYPICL CHRCTERISTICS 3 On Region Characteristics 7V 6V. On Resistance Variation with Drain Current and Gate Voltage I D Drain Current( ) 4 6 5V R DS(ON) Normalized Drain Source On Resistance.6.4. V GS = 5. V 6. V 7. V V 4 6. 6 I D Drain Current( ) 4 3 R DS(on) Normalized Drain Source On Resistance....6.4...6 On Resistance Variation with Temperature I D = R DS(ON) On Resistance( Ω ).4....6.4. On Resistance Variation with Gate Source Voltage I D = 5 T = 5 C T = 5 C.4 5 5 5 5 75 5 T Junction Temperature ( C) J 5 4 6 V GS Gate Source Voltage( V ) I D Drain Current( ) 6 4 V DS = 5V Transfer Characteristics 5 C T = 55 C 5 C Is Reverse Drain Current( )... V GS = V Body Diode Forward Voltage Variation with Source Current and Temperature T = 5 C 5 C 55 C 3 4 5 6 V GS Gate Source Voltage( V )...4.6.. V SD Body Diode Forward Voltage( V ) p.4
V GS Gate to Source Voltage(V) 6 4 I D = Gate Charge Characteristics V DS = 5V 3V 3 6 9 5 Q g Gate Charge( nc ) Capacitance(pF) 9 7 6 5 4 3 Capacitance Characteristics f = MHz V GS = V Ciss Coss Crss 3 4 5 6 I D Drain Current( ) 5 R DS(ON) Maximum Safe Operating rea Limit R JC = 7.5 C/W T C = 5 C μs ms ms ms s s DC P( pk ),Peak Transient Power( W ) 5 4 3 Maximum Power Dissipation R = 7.5 C/W θjc T = 5 C 6... t,time ( sec ) Duty Cycle =.5 Transient Thermal Response Curve. r(t),normalized Effective Transient Thermal Resistance....5.. Notes: P DM t t t.duty Cycle,D = t.r θjc=7.5 C/W 3.T J T C = P * R θjc (t). 4 3 t,time (sec) 4.R θjc(t)=r(t) * RθJC p.5