Double patterning for 32nm and below: an update. Jo Finders, Mircea Dusa, Bert Vleeming, Birgitt Hepp, Henry Megens ASML

Similar documents
Evolution of Optical Lithography towards 22nm and beyond Donis Flagello

Double patterning for 32nm and below: an update. ASML US Inc, 4211 Burton Dr. Santa Clara, CA, USA. IMEC vzw, Kapeldreef 75, B-3001 Heverlee, Belgium;

Towards 3nm overlay and critical dimension uniformity: an integrated error budget for double patterning lithography

Litho scenario solutions for FinFET SRAM 22nm node

Important challenge for the extension of Spacer DP process

EUV Lithography Towards Industrialization

Chromeless Phase Lithography (CPL)

Resist material for negative tone development process

Mask Characterization for Double Patterning Lithography

EUV lithography industrialization for HVM

Figure 1 below shows the generic process flow of an LELE method of double patterning.

Cost of Ownership Considerations for Maskless Lithography

Reticle intensity based Critical Dimension Uniformity to improve efficiency for DOMA correction in a foundry

Intra-wafer CDU characterization to determine process and focus contributions based on Scatterometry Metrology

ADVANCED IMAGING AND OVERLAY PERFORMANCE OF A DUV STEP & SCAN SYSTEM

Impact of Pellicle on Overlay in Double Patterning Lithography

High NA the Extension Path of EUV Lithography. Dr. Tilmann Heil, Carl Zeiss SMT GmbH

Critical Dimension Uniformity using Reticle Inspection Tool

EUVL Readiness for High Volume Manufacturing

FLCC Seminar. Spacer Lithography for Reduced Variability in MOSFET Performance

Monitoring EUV Reticle Molecular Contamination on ASML s Alpha Demo Tool

Cost Implications of EUV Lithography Technology Decisions

Current status, challenges, and outlook of EUV Lithography for High Volume Manufacturing

Across-wafer CD Uniformity Enhancement through Control of Multi-zone PEB Profiles

Registration Measurement Capability of VISTEC LMS IPRO4 with Focus on Small Features

Technology Choices, Challenges and Timing Requirements for Nanolithography at the 32nm Node and Beyond

Photolithography II ( Part 1 )

Sensors and Metrology. Outline

After Development Inspection (ADI) Studies of Photo Resist Defectivity of an Advanced Memory Device

Tilted ion implantation as a cost-efficient sublithographic

Hyper-NA imaging of 45nm node random CH layouts using inverse lithography

Nanoimprint Lithography

Dan Smith 2016 EUV Mask Pellicle TWG San Jose CA 21 Feb 2016

193 nm STEP AND SCAN LITHOGRAPHY

Registration Error Terms: Grid: Wafer Terms and Field IFD

IEUVI Mask Technical Working Group

Lithography Challenges Moore s Law Rising Costs and Challenges of Advanced Patterning

Optical Proximity Correction

Accurate and Reliable Optical CD of MuGFET down to 10nm

Selective Processes: Challenges and Opportunities in Semiconductor Scaling

Bossung Curves; an old technique with a new twist for sub-90 nm nodes Terrence E. Zavecz TEA Systems

Copyright 2004 by the Society of Photo-Optical Instrumentation Engineers.

Interactions of 3D mask effects and NA in EUV lithography

The Impact of EUV on the Semiconductor Supply Chain. Scotten W. Jones President IC Knowledge LLC

Design Study. Carl Zeiss Microelectronic Systems GmbH Enabling the Nano-Age World

Characterization of Optical Proximity Correction Features

Automatic Classification and Defect Verification Based on Inspection Technology with Lithography Simulation

Title: ASML PAS 5500 Job Creation Semiconductor & Microsystems Fabrication Laboratory Revision: D Rev Date: 09/20/2012

PERFORMANCE OF A STEP AND SCAN SYSTEM FOR DUV LITHOGRAPHY

Extending the Era of Moore s Law

Actinic review of EUV masks: First results from the AIMS EUV system integration

Fiducial Marks for EUV mask blanks. Jan-Peter Urbach, James Folta, Cindy Larson, P.A. Kearney, and Thomas White

Title: ASML Stepper Semiconductor & Microsystems Fabrication Laboratory Revision: B Rev Date: 12/21/2010

Critical Dimension Control and its Implications in IC Performance

UV2Litho Usable Vacuum Ultra Violet Lithography

Chapter 3 : ULSI Manufacturing Technology - (c) Photolithography

UHF-ECR Plasma Etching System for Dielectric Films of Next-generation Semiconductor Devices

Copyright 2000 by the Society of Photo-Optical Instrumentation Engineers.

Lawrence Berkeley National Laboratory Lawrence Berkeley National Laboratory

Technology Improvement and Fault TCP Etch Chamber and a Dual Frequency Oxide Etch Chamber

Nanometer Ceria Slurries for Front-End CMP Applications, Extendable to 65nm Technology Node and Beyond

IC Fabrication Technology

Methodology of modeling and simulating line-end shortening effects in deep-uv resist

Recent progress in nanoparticle photoresist development for EUV lithography

Gold Nanoparticles Floating Gate MISFET for Non-Volatile Memory Applications

EUV Lithography Status and Key Challenges for HVM Implementation

4FNJDPOEVDUPS 'BCSJDBUJPO &UDI

Microsystems Technology Laboratories i-stepperthursday, October 27, 2005 / site map / contact

Fall 2003 EE290H Tentative Weekly Schedule

More on Stochastics and the Phenomenon of Line-Edge Roughness

Impact of parametric mismatch and fluctuations on performance and yield of deep-submicron CMOS technologies. Philips Research, The Netherlands

EUREKA: A new Industry EUV Research Center at LBNL

SiO 2 Buffer-Etch Processes with a TaN Absorber for EUV Mask Fabrication

Overview of EUV Lithography and EUV Optics Contamination

We published the text from the next page.

0. Table of contents. Author: Jaap Snijder

Fabrication Engineering at the Micro- and Nanoscale, by Stephen Campbell, 4 th Edition, Oxford University Press

The Waferstepper Challenge: Innovation and Reliability despite Complexity

Improved Method for Measuring and Assessing Reticle Pinhole Defects for the 100nm Lithography Node

Discussions start next week Labs start in week 3 Homework #1 is due next Friday

Application of plasma parameters to characterize product interactions between memory and logic products at Gate Contact (GC) Stack etch in LAM TCP

Modeling Random Variability of 16nm Bulk FinFETs

Transmission Electron Microscopy for metrology and characterization of semiconductor devices

Developer-soluble Gap fill materials for patterning metal trenches in Via-first Dual Damascene process

Actual Measurement Data Obtained On New 65nm Generation Mask Metrology Tool Set

Single Pass Die to Database Tritone Reticle Inspection Capability

EE-612: Lecture 22: CMOS Process Steps

E152 Standard Revision: EUV-pod Reticle Carrier

Copyright 2001 by the Society of Photo-Optical Instrumentation Engineers.

Resist-outgas testing and EUV optics contamination at NIST

Spectroscopic Critical Dimension technology (SCD) for Directed Self Assembly

Ebeam based mask repair as door opener for defect free EUV masks M. Waiblinger a, Tristan Bret a, R. Jonckheere b, D.

= n. Psin. Qualitative Explanation of image degradation by lens + 2. parallel optical beam. θ spatial frequency 1/P. grating with.

SCI. Scientific Computing International. Scientific Computing International. FilmTek. Raising Thin Film Metrology Performance to a New Level

Comparison of Techniques to Measure the Point Spread Function due to Scatter and Flare in EUV Lithography Systems

A Reticle Correction Technique to Minimize Lens Distortion Effects

Effects of Chrome Pattern Characteristics on Image Placement due to the Thermomechanical Distortion of Optical Reticles During Exposure

Supplementary Information Our InGaN/GaN multiple quantum wells (MQWs) based one-dimensional (1D) grating structures

EE141- Spring 2003 Lecture 3. Last Lecture

Analysis of carbon contamination on EUV mask using CSM/ ICS

Transcription:

Double patterning for 32nm and below: an update Jo Finders, Mircea Dusa, Bert Vleeming, Birgitt Hepp, Henry Megens ASML Mireille Maenhoudt, Shaunee Cheng, Tom Vandeweyer IMEC / Slide 1 <file name> <version 00> <author.> Outline Introduction Problem description and challenges Experimental Progress in overlay to enable Litho-Etch-Litho-Etch Process control in Litho-Etch-Litho-Etch and Spacer Outlook towards 22nm node Conclusions / Slide 2 1

Introduction Litho options with potential to be adopted at <3x node for memory designs that requires 1:1 hp resolution: Spacer (self-aligned); LELE (Dual Litho-Etch) LFL (Litho Freeze Litho) EUV (single exposure) Double patterning options, Spacer and LELE, could be positive process flow negative process flow Requirements / Slide 3 CDU 3σ for 32nm L/S Target CDU Flash Target CDU Other (DRAM. Logic) CDU line 3.2nm 3.2nm CDU space 3.2nm 4.0nm Double-patterning LELE: Line-CD distribution Target CD and CDU is critical for multiple line populations Count Bi-modal CD distribution occurs when CD differs in the two exposures impact on total CDU of lines Line CD [nm] population 1 population 2 / Slide 4 2

Double-patterning: Space distribution Overlay is critical in CDU for multiple space populations Count Space CD [nm] / Slide 5 Experimental (schematically) Resist Barc HM Poly SiO2 HM Poly SiO2 Positive litho DPT 1:1 L/S 1 mask 1 st litho: Expose 2 to~ 1:2 1 st etch + Trim to 1:3 3 Positive Spacer DPT Resist Barc Sacrificial (APF) Poly Electric layer Sacrificial (APF) Poly Electric layer Spacer deposition Spacer after Sacrificial removal Final Poly SiO 2 / Slide 6 3

Experimental: context information crucial for process control Exposure Multiple XT:1900i (ASML VHV) XT:1700i (IMEC) 32nm L/S: annular 1.2 NA XY-pol 0.8/0.5 22nm L/S: 1.35NA dipole-x 35 deg Y-pol 0.92/0.72 Reticle 6% Attenuated PSM 64nm L/S Track Etch Metrology Process Control multiple tracks; interfaced to XT:1900 and XT:1700 VHV: LELE IMEC: LELE and Spacer CD-SEM angle resolved scatterometry DoseMapper GridMapper 44nm L/S Intrafield and Interfield dose and grid corrections / Slide 7 Outline Introduction Problem description and challenges Experimental Progress in overlay to enable Litho-Etch-Litho-Etch Process control in Litho-Etch-Litho-Etch and Spacer Outlook towards 22nm node Conclusions / Slide 8 4

Evolution of DPT Overlay at 32nm resolution Measured with CD-SEM P1 R P1 L P1 L + P1 DPT _ OL = P P P R 1 1 = 2 DPT Overlay [nm] XT:1900i Mean+3σ: x=2.9nm, y=3.0nm Keystone 2007 DPT Overlay (Mean+3σ): X: 4.6 nm Y: 4.3 nm XT:1700i No corrections / filtering applied 2.5 weeks between exposures DPT overlay well controlled <3nm / Slide 9 Evolution of DPT Overlay at 32nm resolution: cont multiple XT:1900 s, multiple wafers Raw Data 5 45 4.5 XT:1900i #1, 4 3.5 3 2.5 2 1.5 1 0.5 0 XT:1700i XT:1900i, #2 CDSEM 2579 meas XT:1900i, 4 wafers CDSEM 332 meas CDSEM 2579 meas Multiple XT:1900 s with similar performance, stable over multiple wafers Same wafer, different sampling Dense sampling to capture inter- and intrafield fingerpint Further improvements: see Jos de Klerk et al., paper 6924-60 M+3σ, x M+3σ, y / Slide 10 5

DPT overlay reticle contribution die fingerprint, same reticle on 2 different XT:1900 s CD-SEM DPT overlay XT:1900 #1 99.7%: x=2.5nm y=3.0nm 99.7% x=1.4nm y=1.2nm Modeled die fingerprint Reticle Contribution 1.5nm CD-SEM DPT overlay XT:1900 #2 99.7%: x=3.3nm Reticle overlay fingerprint reproduces y=3.6nm over two machines and may be corrected for 99.7% x=1.1nm 11 y=1.7nm / Slide 11 XT:1700i Overlay: Short loop vs. Full flow DPT Process Resist only (Zero layer) Gate stack only (Zero layer) Full flow (Align to STI) 3σ (nm.) Metrology X Y Dedicated Chuck Overlay 3.6 5.5 DPT overlay 4.6 4.3 DPT overlay 4.1 4.8 DPT1 DPT2 DPT1 DPT2 Photo Resist (120nm) BARC (65nm litho 1/85nm litho2) Oxide HM (30nm) Poly (60nm) Gate oxide (2nm) Si substrate DPT intra-layer overlay is the same on short loop and full flow See David Laidler et al. paper 6922-49 / Slide 12 6

Outline Introduction Problem description and challenges Experimental Progress in overlay to enable Litho-Etch-Litho-Etch Process control in Litho-Etch-Litho-Etch and Spacer Outlook towards 22nm node Conclusions / Slide 13 Process control in Litho-Etch-Litho-Etch and Spacer Error component Pattern polarity Positive Tone Spacer Positive tone LELE Lines Spaces Lines Spaces Dose - 07 0.7 07 0.7 05 0.5 Focus - 0.5 0.5 0.4 Track and etch process - 2.4 2.7 1.7 Spacer deposition 1.6 2.9 - - (+ multiple etch steps) Mask CDU (1x) - 1.4 1.4 1 (assumes MEEF of 1.4) Mask registration and overlay (1x) - 1.1-1.5 Scanner overlay - - - 3 CDU - lines (nm) 1.6 3.1 CDU - spaces (nm) 4.2 3.9 Typical Contributions Main Contributors To CDU lines Overlay& Mask. reg Contributions in CDU spaces Jo Finders, Mircea Dusa, Stephen Hsu, MLW 2008, to be published / Slide 14 7

DPT CDU: reticle contribution Measured reticle data at 1x level for three reticles MEEF = 1.5 ± 0.2 nm SPIE 2008 (LELE) 3σ =09nm 0.9 Bacus 2007 EMLC 2008 SPIE 2007 Keystone 2007 SPIE 2008 (Spacer) 3σ = 1.9 nm Reticle contribution 3σ = 0.6 to nmcdu is 0.9..2.8nm With DoseMapper: With DoseMapper: With DoseMapper: 3σ = 0.4 nm Can be corrected 3σ = 0.5 nm by DoseMapper 3σ = 0.7 nm / Slide 15 DPT CDU: track contribution (evaluated after litho 1) Track #1 Track #2 XT:1900i CDSEM Raw CD data Fitted Interfield CD fingerprint Track fingerprints are different and can be corrected with DoseMapper From raw CD data (contains track and reticle) Track #1: CDU 2.9 nm -> 1.1 nm with DoseMapper Track #2: CDU 3.8 nm -> 1.4 nm with DoseMapper / Slide 16 8

DPT CDU: Etch contribution after hardmask etch, measured with CD-SEM Etcher 1 Etcher 2 XT:1900i CDSEM Raw CD data / Slide 17 Fitted Interfield CD fingerprint Etch fingerprints are different and can be corrected by DoseMapper From raw CD data (contains reticle, track, etch) Etcher #1: CDU 4.0 nm -> 1.8 nm with DoseMapper Etcher #2: CDU 3.3 nm -> 2.0 nm with DoseMapper DoseMapper is required to achieve target CDU of 3.2nm 3σ Final result LELE (raw experimental data) Line1: Mean=36.1 3σ=4.6nm Line2: Mean=38.8 3s=5.5nm Space1 Mean=26.8 3s=5.7nm (XT:1900i; CD SEM, 2579 measurements) Correction of mean CD and CDU is needed L1 L2 Space2 Mean=26.25 3s=5.6nm S1 S2 / Slide 18 9

LELE Final result (raw experimental data) Line1 Line2 Space1 Space2 3σ=4.6nm 3σ=5.5nm 3σ=5.7 nm 3σ= 5.6 nm LELE Final wafer result applying DoseMapper (CD SEM, 2579 measurements) 3σ=2.1nm 3σ=2.3nm 3σ= 3.7nm 3σ=3.8nm / Slide 19 Final wafer result applying DoseMapper Line1: Mean=34.9 3σ=2.2nm Line 2 Mean=34.6 3σ=2.3nm Space 1 Mean= 30.0 3σ=3.7nm Space 2 Mean=28.5 3σ=3.8nm / Slide 20 Lines: CDU < Target CDU Spaces: CDU< Target CDU for DRAM, logic 10

10 nm 10 nm Litho patterning process control for CD and Overlay of 32nm, using angle resolved scatterometry raw etched poly CDU mean CD overlay between litho 1 and 2 < 4.9 nm < 7.0 nm <63 6.3 nm 99.7% OVL X = 4.0 nm 99.7% OVL Y = 4.2 nm Line1 Line2 DoseMapper recipe DoseMapper recipe Optimum GridMapper recipe < 2.8 nm < 3.8 nm < 0.8 nm 99.7% OVL X = 3.2 nm 99.7% OVL Y = 3.4 nm DoseMapper corrected etched / Slide poly 21 CDU mean CD Process control in Litho-Etch-Litho-Etch and Spacer Error component Pattern polarity Positive Tone Spacer Positive tone LELE Lines Spaces Lines Spaces Dose - 07 0.7 07 0.7 05 0.5 Focus - 0.5 0.5 0.4 Track and etch process - 2.4 2.7 1.7 Spacer deposition 1.6 2.9 - - (+ multiple etch steps) Mask CDU (1x) - 1.4 1.4 1 (assumes MEEF of 1.4) Mask registration and overlay (1x) - 1.1-1.5 Scanner overlay - - - 3 CDU - lines (nm) 1.6 3.1 CDU - spaces (nm) 4.2 3.9 Typical Contributions Jo Finders, Mircea Dusa, Stephen Hsu, MLW 2008, to be published / Slide 22 11

32nm Spacer Final result (experimental data: CD-SEM) Line1 Mean=32.7 3σ=2.1nm Line2 Mean=32.7 3σ=2.0nm Space1 Mean= 30.0 3σ=2.1nm Space2 Mean=32.8 3σ=4.1nm CD L1 L2 S1 S2 Most critical: space control XT1700i;CD-SEM Distance From center / Slide 23 Spacer DPT control through litho dose variation Space/line [nm] 55.00 50.00 45.00 40.00 35.00 30.00 25.00 Litho CD (nm) APF CD (nm) Line1 (nm) Line2 (nm) Space1 (nm) Space2 (nm) L1 L2 L1 S1 S2 20.00 25 27mJ27 29 31 3333mJ 35 Dose (mj) / Slide 24 12

32nm Spacer Final result (experimental data: CD-SEM) Line1 Mean=32.7 3σ=2.1nm Line2 Mean=32.7 3σ=2.0nm Space1 Mean= 30.0 3σ=2.1nm Space2 Mean=32.8 3σ=4.1nm Expected performance after applying dosemapper (calculated) Line1 Mean=32.7 3σ=2.1nm Line2 Mean=32.7 3σ=2.0nm Space 1 Mean= 31.3 3σ=2.3nm Space 2 Mean= 31.3 3σ=2.8nm / Slide 25 Expected performance after applying DoseMapper (calculated) Line1 Mean=32.7 3σ=2.1nm Line2 Mean=32.7 3σ=2.0nm Space 1 Mean= 31.3 3σ=2.3nm Space 2 Mean= 31.3 3σ=2.8nm / Slide 26 13

Outline Introduction Problem description and challenges Experimental Progress in overlay to enable Litho-Etch-Litho-Etch Process control in Litho-Etch-Litho-Etch and Spacer Outlook towards 22nm node Conclusions / Slide 27 Optical potential for 22nm L/S topdown SEM STEM Example: LELE LITHO 32nm L/S 22nm L/S k 1 0.40 0.31 k 1 final 0.20 0.155 Exposure Dose sensitivity nm/% dose Annular XY polarized 1.2 NA Dipole Y polarized 1.35 NA 0.6 0.7 Same dose sensitivity obtained for 22nm L/S by going to more aggressive Illuminator setting / Slide 28 14

Conclusion Experimental investigation of Spacer DPT and Litho DPT suggests Process corrections are required to achieve target CDUs For LELE DPT we were able to improve overlay on resolution to 3nm for single hard mask stack. Using DoseMapper fingerprints from Reticle, Track and Etch can be reduced. Process control for LELE and Spacer by DoseMapper and GridMapper LELE: overlap and CDU of the two line and the two space populations Spacer: overlap and balanced performance for the two space populations CDU 3σ for Requirement LELE LELE +Litho Spacer Spacer+ Litho 32nm L/S Flash Process Control Process Control CDU Line 1 3.2nm 4.6nm 2.1nm 2.1nm 2.1nm CDU Line 2 3.2nm 5.5nm 2.3nm 2.1nm 2.1nm CDU Space 1 3.2nm 5.7nm 3.7nm 2.1nm 2.3nm CDU Space 2 3.2nm 5.6nm 3.8nm 4.1nm 2.8nm 32nm seems feasible for both LELE and Spacer / Slide 29 Acknowledgement ASML DPT TEAM; David Deckers, Ad Lammers, Dorothe Oorschot, Bart Rijpers, Paul de Haas, Christian Leewis, Martyn Coogans, Eddy van der Heijden, John Quaedackers, Jeroen Meessen, Toine de Kort, Joris Kuin, Robert Routh IMEC DPT TEAM, Patrick Jaenen, Diziana Vangoidsenhoven / Slide 30 15

Process control in Litho-Etch-Litho-Etch Error component Pattern polarity Positive tone LELE expected Dose 0.7 0.5 Focus 05 0.5 04 0.4 Positive tone LELE experimental Positive tone LELE +Litho Process Control Lines Spaces Lines Spaces Track and etch process 2.7 1.7 4.0 2.9 2 1.4 Spacer deposition (+ multiple etch steps) - - Mask CDU (1x) (assumes MEEF of 1.4) Mask registration and overlay (1x) 1.4 1 1.35 0.6-1.5 1.5 1.5 Scanner overlay - 3 3 3 CDU - lines (nm) 3.1 CDU - spaces (nm) 3.9 CDU -lines exp. 4.6 5.5 2.1 2.3 CDU- spaces exp 5.7 5.6 3.7 3.8 / Slide 31 DoseMapper application Needed input for DoseMapper: Measured CD data on final product for population 1 and 2 LEDR (Lot Exposure Dose Report) from scanner of litho exposures for population 1 and 2 Dose sensitivity for population 1 and 2 from etched FEM wafer CD on final product pop 1 Lot Exposure Dose Report Litho pop 1 Dose Mapper DoMa subrecipe to correct profile pop 1 FEM: CD pop 1 as function dose Dose sensitivity Population 1 / Slide 32 16

DoseMapper application results Measured CD data Calculated DoMa result Achieved DoMa result line 1 3 σ = 4.5 nm 3 σ = 1.6 nm 3 σ = 2.4 nm line 2 3 σ = 4.7 nm 3 σ = 1.7 nm 3 σ = 2.2 nm / Slide 33 32nm L/S LELE Final result (raw experimental data) etch process #2 XT:1900 #3 3σ=6.3nm 3σ=4.8nm LELE Final result applying dosemapper 3σ=3.6nm 3σ=2.5nm 3σ=5.3nm 3σ=5.4nm / Slide 34 17

Process control in Spacer: Litho + sacrificial etch Track + Reticle (evaluated after first litho) Etch (evaluated after sacrificial etch) XT1700i, CD-SEM / Slide 35 Measurements and definitions PL L2 S2 L1 S1 L2 PR OVL = 64 05*(PL+PR) 0.5 S2 = PL L2 = PR L1 S1 = 128 L2 L1 S2 / Slide 36 18

Intrafield DPT overlay as observed by different techniques Image based SEM Angle Resolved Scatterometry XT1900i LELE / Slide 37 32nm Spacer Final result (experimental data by CD-SEM) Line1 Mean=33.6 3σ=2.2nm Line2 Mean=33.4 3σ=2.3nm Space1 Mean= 32.5 3σ=3.8nm Space2 Mean=28.3 3σ=2.6nm L1 L2 S1 S2 CD-SEM / Slide 38 19

32nm Spacer Final result (experimental data by CD-SEM) Line1 Mean=33.6 3σ=2.2nm Line2 Mean=33.4 3σ=2.3nm Space1 Mean= 32.5 3σ=3.8nm Space2 Mean=28.3 3σ=2.6 Expected performance after applying dosemapper (calculated) Line1 Mean=33.6 3σ=2.2nm Line2 Mean=33.4 3σ=2.3nm Space 1 Mean= 30.5 3σ=2.9nm Space 2 Mean= 30.5 3σ=2.9nm / Slide 39 Expected performance after applying dosemapper (calculated) Line1 Mean=33.6 3σ=2.2nm Line2 Mean=33.4 3σ=2.3nm Space 1 Mean= 30.5 3σ=2.9nm Space 2 Mean= 30.5 3σ=2.9nm / Slide 40 20