PD - 97A IRF797PbF Appications Dua SO-8 MOSFET for POL Converters in Notebook Computers, Servers, Graphics Cards, Game Consoes and Set-Top Box V DSS HEXFET Power MOSFET R DS(on) max 3V Q.4m:@V GS = V 9.A Q2.8m:@V GS = V A I D Benefits Very Low R DS(on) at 4.5V V GS Low Gate Charge Fuy Characterized Avaanche Votage and Current 2V V GS Max. Gate Rating Improved Body Diode Reverse Recovery % Tested for R G Lead-Free * * ' ' ' ' SO-8 Absoute Maximum Ratings Parameter Q Max. Q2 Max. Units V DS Drain-to-Source Votage 3 V V GS Gate-to-Source Votage ± 2 I D @ T A = 25 C Continuous Drain Current, V GS @ V 9. I D @ T A = 7 C Continuous Drain Current, V GS @ V 7.3 8.8 A I DM Pused Drain Current c 7 85 P D @T A = 25 C Power Dissipation 2. 2. W P D @T A = 7 C Power Dissipation.3.3 Linear Derating Factor.. W/ C T J Operating Junction and -55 to 5 C Storage Temperature Range T STG Therma Resistance Parameter Q Max. Q2 Max. Units R θjl Junction-to-Drain Lead g 42 42 C/W R θja Junction-to-Ambient fg 2.5 2.5 www.irf.com 7/9/8
IRF797PbF Static @ (uness otherwise specified) Parameter Min. Typ. Max. Units Conditions BV DSS Drain-to-Source Breakdown Votage Q&Q2 3 V V GS = V, I D = 25µA ΒV DSS / T J Breakdown Votage Temp. Coefficient Q.24 V/ C Reference to 25 C, I D = ma Q2.24 Q 3.7.4 V GS = V, I D = 9.A e R DS(on) Static Drain-to-Source On-Resistance 7. 2.5 mω V GS = 4.5V, I D = 7.3A e Q2 9.8.8 V GS = V, I D = A e.5 3.7 V GS = 4.5V, I D = 8.8A e V GS(th) Gate Threshod Votage Q&Q2.35.8 2.35 V Q: V DS = V GS, I D = 25µA V GS(th) / T J Gate Threshod Votage Coefficient Q -4. mv/ C Q2: V DS = V GS, I D = 5µA Q2-4.9 I DSS Drain-to-Source Leakage Current Q&Q2. µa V DS = 24V, V GS = V Q&Q2 5 V DS = 24V, V GS = V, I GSS Gate-to-Source Forward Leakage Q&Q2 na V GS = 2V Gate-to-Source Reverse Leakage Q&Q2 - V GS = -2V gfs Forward Transconductance Q 9 S V DS = 5V, I D = 7.A Q2 24 V DS = 5V, I D = 8.8A Q g Tota Gate Charge Q.7 Q2 4 2 Q gs Pre-Vth Gate-to-Source Charge Q.3 Q Q2 3. V DS = 5V Q gs2 Post-Vth Gate-to-Source Charge Q.7 nc V GS = 4.5V, I D = 7.A Q2.3 Q gd Gate-to-Drain Charge Q 2.5 Q2 Q2 4.9 V DS = 5V Q godr Gate Charge Overdrive Q 2.2 V GS = 4.5V, I D = 8.8A Q2 4.8 Q sw Switch Charge (Q gs2 Q gd ) Q 3.2 Q2.2 Q oss Output Charge Q 4.5 nc V DS = V, V GS = V Q2 9. R G Gate Resistance Q 2. 4.7 Ω Q2 3. 5. t d(on) Turn-On Deay Time Q. Q Q2 8. V DD = 5V, V GS = 4.5V t r Rise Time Q 9.3 I D = 7.A Q2 4 ns t d(off) Turn-Off Deay Time Q 8. Q2 Q2 3 V DD = 5V, V GS = 4.5V t f Fa Time Q 3.4 I D = 8.8A Q2 5.3 Camped Inductive Load C iss Input Capacitance Q 85 Q2 79 V GS = V C oss Output Capacitance Q 9 pf V DS = 5V Q2 39 ƒ =.MHz C rss Reverse Transfer Capacitance Q 88 Q2 9 Avaanche Characteristics Parameter Typ. Q Max. Q2 Max. Units E AS Singe Puse Avaanche Energy d 5 mj I AR Avaanche Current c 7. 8.8 A Diode Characteristics Parameter Min. Typ. Max. Units I S Continuous Source Current Q 2.8 A (Body Diode) Q2 2.8 I SM Pused Source Current Q 7 A (Body Diode)c Q2 85 V SD Diode Forward Votage Q. V Q2. t rr Reverse Recovery Time Q 2 8 ns Q2 24 Q rr Reverse Recovery Charge Q 4.. nc Q2 5.9 8.9 Conditions MOSFET symbo showing the integra reverse p-n junction diode., I S = 7.3A, V GS = V e, I S = 8.8A, V GS = V e Q, I F = 7.A, V DD = 5V, di/dt = A/µs e Q2, I F = 8.8A, V DD = 5V, di/dt = A/µs e 2 www.irf.com
I D, Drain-to-Source Current (Α) I D, Drain-to-Source Current (Α) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) Typica Characteristics IRF797PbF Q - Contro FET Q2 - Synchronous FET VGS TOP V 5.V 4.5V 3.5V 3.V 2.7V 2.5V BOTTOM 2.3V VGS TOP V 5.V 4.5V 3.5V 3.V 2.7V 2.5V BOTTOM 2.3V. 2.3V µs PULSE WIDTH Tj = 25 C Fig. Typica Output Characteristics. 2.3V µs PULSE WIDTH Tj = 25 C Fig 2. Typica Output Characteristics VGS TOP V 5.V 4.5V 3.5V 3.V 2.7V 2.5V BOTTOM 2.3V VGS TOP V 5.V 4.5V 3.5V 3.V 2.7V 2.5V BOTTOM 2.3V. 2.3V µs PULSE WIDTH Tj = 5 C Fig 3. Typica Output Characteristics. 2.3V µs PULSE WIDTH Tj = 5 C Fig 4. Typica Output Characteristics. T J = 5 C. T J = 5 C.. V DS = 5V µs PULSE WIDTH. 2. 3. 4. 5. V GS, Gate-to-Source Votage (V) V DS = 5V µs PULSE WIDTH. 2. 3. 4. 5. V GS, Gate-to-Source Votage (V) Fig 5. Typica Transfer Characteristics Fig. Typica Transfer Characteristics www.irf.com 3
I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) V GS, Gate-to-Source Votage (V) V GS, Gate-to-Source Votage (V) C, Capacitance (pf) C, Capacitance (pf) IRF797PbF Typica Characteristics Q - Contro FET V GS = V, f = MHZ C iss = C gs C gd, C ds SHORTED Q2 - Synchronous FET V GS = V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd C rss = C gd C oss = C ds C gd Ciss Ciss Coss Crss Coss Crss Fig 7. Typica Capacitance vs. Drain-to-Source Votage Fig 8. Typica Capacitance vs. Drain-to-Source Votage 2 8 I D = 7.A V DS = 24V VDS= 5V VDS=.V 2 8 I D = 8.8A V DS = 24V VDS= 5V VDS=.V 4 4 2 2 4 8 2 5 5 2 25 3 Q G Tota Gate Charge (nc) Q G Tota Gate Charge (nc) Fig 9. Typica Gate Charge vs. Gate-to-Source Votage Fig. Typica Gate Charge vs. Gate-to-Source Votage OPERATION IN THIS AREA LIMITED BY R DS (on) OPERATION IN THIS AREA LIMITED BY R DS (on) µsec msec µsec msec msec msec T A = 25 C msec Tj = 5 C Singe Puse. Tj = 5 C Singe Puse. Fig. Maximum Safe Operating Area Fig 2. Maximum Safe Operating Area 4 www.irf.com T A = 25 C msec
I SD, Reverse Drain Current (A) R DS (on), Drain-to -Source On Resistance (mω) R DS(on), Drain-to-Source On Resistance I SD, Reverse Drain Current (A) R DS (on), Drain-to -Source On Resistance (mω) R DS(on), Drain-to-Source On Resistance (Normaized) (Normaized) Typica Characteristics IRF797PbF.5 I D = 9.A V GS = V Q - Contro FET.5 Q2 - Synchronous FET I D = A V GS = V...5 - -4-2 2 4 8 2 4 T J, Junction Temperature ( C) Fig 3. Normaized On-Resistance vs. Temperature..5 - -4-2 2 4 8 2 4 T J, Junction Temperature ( C) Fig 4. Normaized On-Resistance vs. Temperature.. T J = 5 C. T J = 5 C.. V GS = V.2.4..8..2.4. V SD, Source-to-Drain Votage (V) Fig 5. Typica Source-Drain Diode Forward Votage V GS = V.2.4..8..2.4. V SD, Source-to-Drain Votage (V) Fig. Typica Source-Drain Diode Forward Votage 4 I D = 8.8A 4 I D = A 3 3 2 2 2 4 8 2 4 8 V GS, Gate-to-Source Votage (V) V GS, Gate-to-Source Votage (V) Fig 7. Typica On-Resistance vs.gate Votage Fig 8. Typica On-Resistance vs.gate Votage www.irf.com 5
E AS, Singe Puse Avaanche Energy (mj) E AS, Singe Puse Avaanche Energy (mj) V GS(th, Gate threshod Votage (V) V GS(th, Gate threshod Votage (V) I D, Drain Current (A) I D, Drain Current (A) IRF797PbF Typica Characteristics Q - Contro FET Q2 - Synchronous FET 2 8 8 4 4 2 2 25 5 75 25 5 T J, Ambient Temperature ( C) Fig 9. Maximum Drain Current vs. Ambient Temp. 2.2 25 5 75 25 5 T J, Ambient Temperature ( C) Fig 2. Maximum Drain Current vs. Ambient Temp. 2.2 2. 2..8 I D = 25µA.8 I D = 25µA...4.4.2.2. -75-5 -25 25 5 75 25 5 T J, Temperature ( C ) Fig 2. Threshod Votage vs. Temperature. -75-5 -25 25 5 75 25 5 T J, Temperature ( C ) Fig 22. Threshod Votage vs. Temperature 5 4 I D TOP 3.A 3.5A BOTTOM 7.A 5 I D TOP 3.8A 4.4A BOTTOM 8.8A 4 3 3 2 2 25 5 75 25 5 25 5 75 25 5 Starting T J, Junction Temperature ( C) Starting T J, Junction Temperature ( C) Fig 23. Maximum Avaanche Energy vs. Drain Current Fig 24. Maximum Avaanche Energy vs. Drain Current www.irf.com
IRF797PbF D =.5 Therma Response ( Z thja )..2..5.2. SINGLE PULSE ( THERMAL RESPONSE ) E- E-5... τj τj τ τ Ci= τi/ri / R R 2 R 3 R R 2 R 3 τ 2 τ 3 τ 2 τ 3 t, Rectanguar Puse Duration (sec) R4 R4 τ4 τ4 τa Ri ( C/W) τι (sec) 2.288789.37 7.79.4957 3.9893.724.7333 2.8 Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthja Ta Fig 25. Maximum Effective Transient Therma Impedance, Junction-to-Ambient (Q) D =.5 Therma Response ( Z thja )..2..5.2. SINGLE PULSE ( THERMAL RESPONSE ) E- E-5... Fig 2. Maximum Effective Transient Therma Impedance, Junction-to-Ambient (Q2) τj τj τ τ Ci= τi/ri / R R 2 R 3 R R 2 R 3 τ 2 τ 3 τ 2 τ 3 t, Rectanguar Puse Duration (sec) R4 R4 τ4 τ4 τa Ri ( C/W) τι (sec).8484.4.2988.5458 34.97452.9598 4.3858 38.2 Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthja Ta L S2 G2 2 8 7 D2 D2 S 3 D G 4 5 D C o V o GND C in V in Fig 27. Layout Diagram www.irf.com 7
IRF797PbF - D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Pane Low Leakage Inductance Current Transformer - Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =V V DD * R G dv/dt controed by RG Driver same type as D.U.T. I SD controed by Duty Factor "D" D.U.T. - Device Under Test V DD - Re-Appied Votage Body Diode Inductor Curent Current Forward Drop Rippe 5% I SD * V GS = 5V for Logic Leve Devices Fig 28. Peak Diode Recovery dv/dt Test Circuit for N-Channe HEXFET Power MOSFETs 5V tp V (BR)DSS V DS L DRIVER R G 2V V GS tp D.U.T IAS.Ω - V DD A I AS Fig 29a. Uncamped Inductive Test Circuit Fig 29b. Uncamped Inductive Waveforms 5V V DS 9% V DS L DRIVER R G 2V tp D.U.T IAS.Ω - V DD A % V GS t d(on) t r t d(off) t f Fig 3a. Switching Time Test Circuit Current Reguator Same Type as D.U.T. Fig 3b. Switching Time Waveforms Vds Id 5KΩ Vgs 2V.2µF.3µF D.U.T. V DS - V GS Vgs(th) -3mA I G I D Current Samping Resistors Qgs Qgs2 Qgd Qgodr Fig 3a. Gate Charge Test Circuit Fig 3b. Gate Charge Waveform 8 www.irf.com
IRF797PbF SO-8 Package Outine(Mosfet & Fetky) Dimensions are shown in miimeters (inches) ' % ',,&(, $;,//,(7(5, $; $ $ $ ( >@ $ E F ' ( H %$,& %$,& H %$,& %$,& ; H. / \ ƒ ƒ ƒ ƒ H $.[ƒ & \ ;E $ >@ ;/ ;F >@ & $ % 27( ',(,2,* 72/(5$&,*3(5$(< &2752//,*',(,2,//,(7(5 ',(,2$5(2:,,//,(7(5>,&(@ 287/,(&2)2572-('(&287/,($$ ',(,2'2(27,&/8'(2/'352758,2 2/'352758,22772(;&(('>@ ',(,2'2(27,&/8'(2/'352758,2 2/'352758,22772(;&(('>@ ',(,2,7(/(*72)/($')252/'(5,*72 $8%75$7( >@ )22735,7 ;>@ ;>@ ;>@ SO-8 Part Marking Information (;$3/(7,,$,5)2)(7,7(5$7,2$/ 5(&7,),(5 /2*2 ) ;;;; '$7(&2'(<:: 3 ',*$7(/($')5(( 352'8&7237,2$/ < /$7',*,72)7(<($5 :: :((. $ $(%/<,7(&2'( /27&2'( 3$578%(5 Note: For the most current drawing pease refer to IR website at: http://www.irf.com/package/ www.irf.com 9
IRF797PbF SO-8 Tape and Ree Dimensions are shown in miimeters (inches) TERMINAL NUMBER 2.3 (.484 ).7 (.4 ) 8. (.38 ) 7.9 (.32 ) FEED DIRECTION NOTES:. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 3. OUTLINE CONFORMS TO EIA-48 & EIA-54. 33. (2.992) MAX. NOTES :. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA-48 & EIA-54. 4.4 (.5 ) 2.4 (.488 ) Note: For the most current drawing pease refer to IR website at: http://www.irf.com/package/ Notes: Repetitive rating; puse width imited by max. junction temperature. Starting, Q: L =.4mH, R G = 25Ω, I AS = 7.A; Q2: L =.38mH, R G = 25Ω, I AS = 8.8A. ƒ Puse width 4µs; duty cyce 2%. When mounted on inch square copper board. R θ is measured at T J approximatey 9 C. Data and specifications subject to change without notice. This product has been designed and quaified for the Consumer market. Quaification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., E Segundo, Caifornia 9245, USA Te: (3) 252-75 TAC Fax: (3) 252-793 Visit us at www.irf.com for saes contact information. 7/28 www.irf.com