NLX2G00. Dual 2-Input NAND Gate

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Transcription:

ual 2-Input NN Gat Th NLX2G00 is an advancd high-spd dual 2-input CMOS NN gat in ultra-small footprint. Th NLX2G00 input structurs provid protction whn voltags up to 7.0 volts ar applid, rgardlss of th supply voltag. Faturs igh Spd: t P 2.4 ns (typical) at =.0 V signd for.6 V to. V Opration Low Powr issipation: I CC = (Max) at T = 2 C 24 m Balancd Output Sink and Sourc Capability Balancd Propagation lays Ovrvoltag Tolrant (OVT) Input Pins This is a Pb Fr vic ULLG.4 x.0 CS 63 ULLG.6 x.0 CS 63B MRKING IGRMS QM JM ULLG.9 x.0 CS 63C M B 2 7 Y UFN.4 x.0 CS 7BZ X M Y2 3 6 B2 B I/IC & Y UFN.6 x.0 CS 7BY X M GN 4 Figur. Pinout 2 2 B2 Figur 2. Logic Symbol Y2 UFN.9 x.0 CS 7C X M PIN SSIGNMNT Pin Function 2 B 3 Y2 4 GN 2 6 B2 7 Y FUNCTION TBL L L Inputs Y = B B L L = IG Logic Lvl L = LOW Logic Lvl Output Y L XX M = Spcific vic Cod = at Cod = Pb Fr Packag ORRING INFORMTION S dtaild ordring and shipping information in th packag dimnsions sction on pag 4 of this data sht. Smiconductor Componnts Industris, LLC, 202 January, 202 Rv. Publication Ordr Numbr: NLX2G00/

MXIMUM RTINGS Symbol Paramtr Valu Unit C Supply Voltag 0. to +7.0 V V IN C Input Voltag 0. to +7.0 V V OUT C Output Voltag 0. to + 0. V I IK C Input iod Currnt V IN < GN 0 m I OK C Output iod Currnt V OUT < GN 0 m I O C Output Sourc/Sink Currnt 0 m I CC C Supply Currnt pr Supply Pin 00 m I GN C Ground Currnt pr Ground Pin 00 m T STG Storag Tmpratur Rang 6 to 0 C T L Lad Tmpratur, mm from Cas for 0 Sconds TB C T J Junction Tmpratur Undr Bias TB C J Thrmal Rsistanc (Not ) TB C/W P Powr issipation in Still ir at C TB mw MSL Moistur Snsitivity Lvl F R Flammability Rating Oxygn Indx: 2 to 34 UL 94 V 0 @ 0.2 in V S S Withstand Voltag uman Body Modl (Not 2) Machin Modl (Not 3) Chargd vic Modl (Not 4) > 2000 > 200 N/ I Latchup Latchup Prformanc bov and Blow GN at 2 C (Not ) 00 m Strsss xcding Maximum Ratings may damag th dvic. Maximum Ratings ar strss ratings only. Functional opration abov th Rcommndd Oprating Conditions is not implid. xtndd xposur to strsss abov th Rcommndd Oprating Conditions may affct dvic rliability.. Masurd with minimum pad spacing on an FR4 board, using 0 mm by inch, 2 ounc coppr trac with no air flow. 2. Tstd to I/JS22 4. 3. Tstd to I/JS22. 4. Tstd to JS22 C0.. Tstd to I/JS7. V RCOMMN OPRTING CONITIONS Symbol Paramtr Min Max Unit Powr C Supply Voltag Oprating ata Rtntion Only V IN igital Input Voltag (Not 6) 0. V V OUT Output Voltag 0 V T Oprating Fr ir Tmpratur +2 C.6... V t/ V Input Transition Ris or Fall Rat =. V 0. V = 2. V 0.2 V = 3.3 V 0.3 V =.0 V 0. V 0 0 0 0 20 20 0 ns/v 6. Unusd inputs may not b lft opn. ll inputs must b tid to a high or low logic input voltag lvl. 2

C LCTRICL CRCTRISTICS Symbol Paramtr Condition V I V IL V O igh Lvl Input Voltag Low Lvl Input Voltag igh Lvl Output Voltag V IN = V I or V IL, I O = 00 (V).6 2.3 to..6 2.3 to. T = 2 C T C T = C to +2 C Min Typ Max Min Max Min Max 0.7 x 0.7 x.6 to. 0. 0.2 x 0.3 x 0.7 x 0.7 x 0. 0.2 x 0.3 x 0.7 x 0.7 x 0. 0.2 x 0.3 x Unit V V V V IN = V I or V IL I O = 4 m I O = m I O = 2 m I O = 6 m I O = 24 m I O = 32 m.6 2.3 2.7 3.0 3.0 4..29.9 2.2 2.4 2.3 3.. 2. 2.4 2.7 2. 4.0.29.9 2.2 2.4 2.3 3..29.9 2.2 2.4 2.3 3. V OL Low Lvl Output Voltag V IN = V I or V IL, I OL = 00.6 to. 0. 0. 0. V V IN = V I or V IL I OL = 4 m I OL = m I OL = 2 m I OL = 6 m I OL = 24 m I OL = 32 m.6 2.3 2.7 3.0 3.0 4. 0.0 0.20 0.22 0.2 0.3 2 0.24 0.3 0. 0. 0.24 0.3 0. 0. 0.24 0.3 0. 0. I IN I OFF I CC Input Lakag Currnt Powr Off Input Lakag Currnt Quiscnt Supply Currnt 0 V IN. V 0 to. 0..0.0 V IN =. V 0.0 0 0 0 V IN. V..0 0 0 C LCTRICL CRCTRISTICS t R = t F = 2. ns Symbol t PL t PL Paramtr Propagation lay Input to Output (V) Tst Condition T = 2 C T C T = C to +2 C Min Typ Max Min Max Min Max.6 to.9 R L = M C L = pf 2.0.7 0. 2.0.0 TB TB ns 2.3 to 2.7 R L = M C L = pf.2 3.2.3.2.7 TB TB 3.0 to 3.6 R L = M C L = pf 0. 2.4 3.7 0. 4.0 TB TB R L = 00 C L = 0 pf.2 3.0 4.6.2 4.9 TB TB 4. to. R L = M C L = pf 0..9 2.9 0. 3.2 TB TB R L = 00 C L = 0 pf 0. 2.4 3.6 0. 3.9 TB TB C IN Input Capacitanc. V IN = 0 V or 2. pf C P Powr issipation Capacitanc (Not 7) 3.3. 0 Mz, V IN = 0V or 9 7. C P is dfind as th valu of th intrnal quivalnt capacitanc which is calculatd from th oprating currnt consumption without load. vrag oprating currnt can b obtaind by th quation: I CC(OPR) = C P f in + I CC. C P is usd to dtrmin th no load dynamic powr consumption; P = C P 2 f in + I CC. Unit pf 3

t f = 3 ns t f = 3 ns INPUT and B 90% 0% 0% 90% 0% 0% GN INPUT OUTPUT C L t PL t PL V O OUTPUT Y 0% 0% Mz squar input wav is rcommndd for propagation dlay tsts. V OL Figur 3. Switching Wavform Figur 4. Tst Circuit ORRING INFORMTION vic Packag Shipping NLX2G00MXTCG ULLG,.9 x.0, 0.P NLX2G00BMXTCG ULLG,.6 x.0, P NLX2G00CMXTCG ULLG,.4 x.0, 0.3P NLX2G00MUTCG UFN,.9 x.0, 0.P NLX2G00MUTCG UFN,.6 x.0, P NLX2G00FMUTCG UFN,.4 x.0, 0.3P For information on tap and rl spcifications, including part orintation and tap sizs, plas rfr to our Tap and Rl Packaging Spcifications Brochur, BR0/. 4

PCKG IMNSIONS UFN.6x.0, P CS 7BY ISSU O 0.0 C 0.0 C L SI VIW 4 B 3 L C STING PLN. IMNSIONING N TOLRNCING PR SM Y4.M, 994. 3. IMNSION b PPLIS TO PLT TRMINL N IS MSUR BTWN 0. N 0.20 MM FROM TRMINL TIP. 4. PCKG IMNSIONS XCLUSIV OF BURRS N MOL FLS. IM MIN MX 0. 0.00 0.0 3 0.3 RF b 0. 0.2.60 BSC.00 BSC 0 BSC L 0.2 0.3 L 0.30 0 RCOMMN SOLRING FOOTPRINT* 9 0.26.24 b 0.0 M C B 0.0 M C NOT 3 0.3 0 PITC IMNSIONS:

PCKG IMNSIONS UFN.4x.0, 0.3P CS 7BZ ISSU O 0.0 C 0.0 C L ÉÉ SI VIW 4 B 3 L C STING PLN. IMNSIONING N TOLRNCING PR SM Y4.M, 994. 3. IMNSION b PPLIS TO PLT TRMINL N IS MSUR BTWN 0. N 0.20 MM FROM TRMINL TIP. 4. PCKG IMNSIONS XCLUSIV OF BURRS N MOL FLS. IM MIN MX 0. 0.00 0.0 3 0.3 RF b 0. 0.2.4 BSC.00 BSC 0.3 BSC L 0.2 0.3 L 0.30 0 RCOMMN SOLRING FOOTPRINT* 0.22. b 0.0 M C B 0.0 M C NOT 3 0.3 0.3 PITC IMNSIONS: 6

PCKG IMNSIONS UFN.9x.0, 0.P CS 7C ISSU O 0.0 C 0.0 C L SI VIW 4 B 3 L C STING PLN. IMNSIONING N TOLRNCING PR SM Y4.M, 994. 3. IMNSION b PPLIS TO PLT TRMINL N IS MSUR BTWN 0. N 0.20 MM FROM TRMINL TIP. 4. PCKG IMNSIONS XCLUSIV OF BURRS N MOL FLS. IM MIN MX 0. 0.00 0.0 3 0.3 RF b 0. 0.2.9 BSC.00 BSC 0.0 BSC L 0.2 0.3 L 0.30 0 RCOMMN SOLRING FOOTPRINT* 9 0.30.24 b 0.0 M C B 0.0 M C NOT 3 0.0 PITC IMNSIONS: 7

PCKG IMNSIONS ULLG.4x.0, 0.3P CS 63 ISSU 0.0 C 0.0 C L SI VIW 4 B C L STING PLN NOT 4. IMNSIONING N TOLRNCING PR SM Y4.M, 994. 3. IMNSION b PPLIS TO PLT TRMINL N IS MSUR BTWN 0. N 0.30 mm FROM T TRMINL TIP. 4. MXIMUM OF 0.0 PULL BCK OF T PLT TRMINL FROM T G OF T PCKG IS LLOW. IM MIN MX 0 0.00 0.0 b 0. 0.2.4 BSC.00 BSC 0.3 BSC L 0.2 0.3 L 0.30 0 MOUNTING FOOTPRINT SOLRMSK FIN* 0.22. b 0.0 C B NOT 3 0.3 0.3 PITC IMNSIONS:

PCKG IMNSIONS ULLG.6x.0, P CS 63B ISSU 0.0 C 0.0 C L SI VIW 4 B C L STING PLN NOT 4. IMNSIONING N TOLRNCING PR SM Y4.M, 994. 3. IMNSION b PPLIS TO PLT TRMINL N IS MSUR BTWN 0. N 0.30 mm FROM T TRMINL TIP. 4. MXIMUM OF 0.0 PULL BCK OF T PLT TRMINL FROM T G OF T PCKG IS LLOW. IM MIN MX 0 0.00 0.0 b 0. 0.2.60 BSC.00 BSC 0 BSC L 0.2 0.3 L 0.30 0 MOUNTING FOOTPRINT SOLRMSK FIN* 9 0.26.24 b 0.0 C B NOT 3 0.3 0 PITC IMNSIONS: 9

PCKG IMNSIONS ULLG.9x.0, 0.P CS 63C ISSU 0.0 C É É 0.0 C L SI VIW 4 B C STING PLN L NOT 4. IMNSIONING N TOLRNCING PR SM Y4.M, 994. 3. IMNSION b PPLIS TO PLT TRMINL N IS MSUR BTWN 0. N 0.30 mm FROM T TRMINL TIP. 4. MXIMUM OF 0.0 PULL BCK OF T PLT TRMINL FROM T G OF T PCKG IS LLOW. IM MIN MX 0 0.00 0.0 b 0. 0.2.9 BSC.00 BSC 0.0 BSC L 0.2 0.3 L 0.30 0 MOUNTING FOOTPRINT SOLRMSK FIN* 9 0.30.24 b 0.0 C B NOT 3 0.3 0.0 PITC IMNSIONS: ON Smiconductor and ar rgistrd tradmarks of Smiconductor Componnts Industris, LLC (SCILLC). SCILLC rsrvs th right to mak changs without furthr notic to any products hrin. SCILLC maks no warranty, rprsntation or guarant rgarding th suitability of its products for any particular purpos, nor dos SCILLC assum any liability arising out of th application or us of any product or circuit, and spcifically disclaims any and all liability, including without limitation spcial, consquntial or incidntal damags. Typical paramtrs which may b providd in SCILLC data shts and/or spcifications can and do vary in diffrnt applications and actual prformanc may vary ovr tim. ll oprating paramtrs, including Typicals must b validatd for ach customr application by customr s tchnical xprts. SCILLC dos not convy any licns undr its patnt rights nor th rights of othrs. SCILLC products ar not dsignd, intndd, or authorizd for us as componnts in systms intndd for surgical implant into th body, or othr applications intndd to support or sustain lif, or for any othr application in which th failur of th SCILLC product could crat a situation whr prsonal injury or dath may occur. Should Buyr purchas or us SCILLC products for any such unintndd or unauthorizd application, Buyr shall indmnify and hold SCILLC and its officrs, mploys, subsidiaris, affiliats, and distributors harmlss against all claims, costs, damags, and xpnss, and rasonabl attorny fs arising out of, dirctly or indirctly, any claim of prsonal injury or dath associatd with such unintndd or unauthorizd us, vn if such claim allgs that SCILLC was nglignt rgarding th dsign or manufactur of th part. SCILLC is an qual Opportunity/ffirmativ ction mployr. This litratur is subjct to all applicabl copyright laws and is not for rsal in any mannr. PUBLICTION ORRING INFORMTION LITRTUR FULFILLMNT: Litratur istribution Cntr for ON Smiconductor P.O. Box 63, nvr, Colorado 027 US Phon: 303 67 27 or 00 344 360 Toll Fr US/Canada Fax: 303 67 276 or 00 344 367 Toll Fr US/Canada mail: ordrlit@onsmi.com N. mrican Tchnical Support: 00 22 9 Toll Fr US/Canada urop, Middl ast and frica Tchnical Support: Phon: 42 33 790 290 Japan Customr Focus Cntr Phon: 3 7 00 0 ON Smiconductor Wbsit: www.onsmi.com Ordr Litratur: http://www.onsmi.com/ordrlit For additional information, plas contact your local Sals Rprsntativ NLX2G00/