Dielectric materials for Organic Thin-Film Transistors Arinola Awomolo University of Illinois Chicago Advisors: : Prof. Christos Takoudis, Prof. Greg Jursich Graduate Research Assistant: Lin Jiang Motorola Supervisor: : Dr. Jie Zhang
Why does it have to be organic? Fabrication is simple. Some methods used include: spin- coating, rod coating, and pad printing. It can be used on flexible substrates; for example, plastic It is cheaper compared to traditional methods using silicon or other metals Application: large area electronics; examples: flexible display, Radio Frequency Identification (RFID), sensors http://researchweb.watson.ibm.com/journal/rd/451/dimitrakopoulos.pdf
Organic Semiconductor bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene) 10-5 10-6 10-7 V ds =-40V 0.0012 0.001 Drain Current Ids (A) 10-8 10-9 10-10 10-11 W/L=5000um/100um 0.0008 0.0006 0.0004 SQRT Ids 10-12 μ=0.01 cm2/v-s 0.0002 Result from Penn State Univ. Performance on Si wafer with SiO 2 as gate dielectric 10-13 0-60 -50-40 -30-20 -10 0 10 20 Gate Voltage Vg (V) Result from Motorola Performance on Poly Ethylene Terephthalate with polymer as gate dielectric Performance is 100x less on polymer dielectric
Importance of Crystal Structure on Mobility Result from IBM
Study Outline Understand dielectric interface vs. organic transistor electrical performance Benchmark SiO 2 surface treatment technology Determine functional groups at the interface that promote semiconductor crystal formation
Experimental Process Silicon Dioxide(SiO 2 ) Growth Si + O 2 SiO 2 Growth time was estimated using Deal Grove Model: t = x o2 /B + x o /(B/A) where: B and A = constants, x 0 = desired thickness We grow the silicon dioxide by putting silicon wafers in an oven at about 1000 C for a certain amount of time. Pressure = 1atm Oxygen flow rate = 3.5 l/min Thickness = 60 nm, 100 nm, greater than 100 nm; after 30 min, 1 hr, 2 hr, respectively
Surface Modification of Silicon Substrate with Hexamethylsilazane (HMDS) 1. 100 nm thick silicon dioxide (SiO 2 ) is grown on clean silicon substrate for 1 hr. Conditions: 1000 C, 1 atm, 3.5 l/min flow of oxygen 2. reacted with piranha solution (sulfuric acid and peroxide) for 20 min Conditions: 80 C, 1 atm 3. reacted with the HMDS for 1 hr Conditions: 120 C, 1 atm; rinsed with acetone to remove excess
Process of adding HMDS 1. + H 2 SO 4 + H 2 O 2 OH 2. CH 3 CH 3 2. OH + CH 3 3. CH 3 O-Si CH 3 CH 3 Si NH Si CH 3 CH 3 CH 3
After Modification- Making the Transistor Spin-coat surface with semiconductor material pentacene derivative in toluene Pad-print source and drain using carbon suspension Cure in oven for 15 min at 110 C Top Contact Deposition Method http://researchweb.watson.ibm.com/journal/rd/451/dimitrakopoulos.pdf
Surface Modification of Silicon Substrate with Octyltriethoxylsilane (OTS) 1. 60 nm and greater than 100 nm-thick Silicon dioxide(sio 2 ) is grown on clean silicon substrate for 30 min, 2 hr respectively. Conditions: 1000 C, 1 atm, 3.5 L/min flow of oxygen 2. treat with piranha solution for 20 min Conditions: 80 C, 1 atm 3. place wafer in OTS solution Conditions: 70 C,30 min ; evaporated at 120 C, 15 min; and then rinsed with acetone
Process of Adding OTS 1. + H 2 SO 4 + H 2 O 2 OH 2. OCH 2 CH 3 OH + H 3 CH 2 CO Si CH 2 CH 2 CH 2 CH 2 CH 2 CH 2 CH 2 CH 3 OCH 2 CH 3 3. O O Si CH 2 CH 2 CH 2 CH 2 CH 2 CH 2 CH 2 CH 3 O
Making the Transistor Pad-print source and drain using carbon suspension Cure in oven for 15 min at 110 C Deposit semiconductor between the source and drain channel using pipette http://researchweb.watson.ibm.com/journal/rd/451/dimitrakopoulos.pdf Bottom Contact Deposition Method
Top View Image of Transistor Source and Drain on Octyltriethoxylsilane(OTS) Modified SiO 2 Surface Dimensions Channel length: 5000 µm Channel width: 100 µm Source and Drain width: 500 µm
SiOH Surface Crystal Structure of Semiconductor after Deposition: Top View of Transistor Semiconductor SiO 2 Surface Source Source Drain 100 µm 100 µm Drain Instrument: OLYMPUS PMG3
Crystal Structure of semiconductor after deposition OTS Treated Surface Semiconductor Source 100µm Drain
FTIR Results Surface Modification Using OTS Absorbance 0.12 0.10 0.08 0.06 0.04 0.02 0.00 300-0.02 500 700 900 1100 1300 SiO2 SiOH OTS treated -0.04 Wavenumber(1/cm) Virtually no change in result after each step: Could be due to the formation of a monolayer of SiOH and OTS that could not be detected by using FTIR spectroscopy
Contact Angle Measurements Liquid used : water Surface Approximate contact angle ( ) SiO2 30 SiOH 30 OTS 90 HMDS 70 http://www.ksvinc.com/contact_angle.htm
Conclusions Using silane derivative we have been able to get bigger crystals and better ordered crystal structure FTIR results do not show any surface changes but using the contact angle we can tell that OTS and HMDS have bonded
Acknowledgements NSF- REU; Grant NSF CTS 0630470, EEC 0453432 DoD ASSURE Motorola Lin Jiang Dr. Jie Zhang Dr. Christos Takoudis AMReL Lab Members
References Shaw J.M., Seidler P.F.; IBM J. Res. & Dev. 45 (1), 2001 Dimitrakopoulos C. D. ; Mascaro D. J. ; IBM J. Res. & Dev. 45 (1), 2001
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