Great Idea #4: Parallelism. CS 61C: Great Ideas in Computer Architecture. Pipelining Hazards. Agenda. Review of Last Lecture

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Kenneth Hardy
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CS 61C: Gat das i Comput Achitctu Pipliig Hazads Gu Lctu: Jui Hsia 4/12/2013 Spig 2013 Lctu #31 1 Gat da #4: Paalllism Softwa Paalll Rqus Assigd to comput.g. sach Gacia Paalll Thads Assigd to co.g. lookup, ads Paalll uctios > 1 iuctio @ o tim.

1 CS 61C: Gat das i Comput Achitctu Pipliig Hazads Gu Lctu: Jui Hsia 4/12/2013 Spig 2013 Lctu #31 1 Gat da #4: Paalllism Softwa Paalll Rqus Assigd to comput.g. sach Gacia Paalll Thads Assigd to co.g. lookup, ads Paalll uctios > 1 o tim.g. 5 piplid iuctios Paalll Data > 1 data o tim.g. add of 4 pais of wods Hadwa dsciptios All gats fuctioig i paalll at sam tim Lvag Paalllism & Achiv High Pfomac Hadwa Wahous Scal Comput Co uctio Uit(s) Fuctioal Uit(s) A 0 +B 0 A 1 +B 1 A 2 +B 2 A 3 +B 3 Cach Mmoy Comput Co Mmoy Co put/utput Smat Pho Logic Gats 4/12/2013 Spig 2013 Lctu #31 2 Rviw of La Lctu mplmtig cotoll fo you datapath Tak dcodd sigals fom iuctio ad gat cotol sigals Us AND ad R Logic schm Pipliig impovs pfomac by xploitig uctio Lvl Paalllism 5 ag pipli fo MPS: F, D, EX, MEM, WB Excuts multipl iuctios i paalll What ca go wog??? 4/12/2013 Spig 2013 Lctu #31 3 Agda Pipliig Pfomac Stuctual Hazads Admiiivia Data Hazads Fowadig Load Dlay Slot Cotol Hazads 4/12/2013 Spig 2013 Lctu #31 4 Rviw: Piplid Datapath 4/12/2013 Spig 2013 Lctu #31 5 Piplid Excutio Rpstatio Tim F D EX MEM WB F D EX MEM WB F D EX MEM WB F D EX MEM WB F D EX MEM WB F D EX MEM WB Evy iuctio mu tak sam umb of ps, so som ags will idl.g. MEM ag fo ay aithmtic iuctio 4/12/2013 Spig 2013 Lctu #31 6 1

2 PC MUX Gaphical Pipli Diagams +4 iuctio mmoy 1. uctio Ftch d t s imm i Fil 2. Dcod/ 3. Excut 4. Mmoy 5. Wit i Rad Back Us datapath figu blow to pst pipli: F D EX Mm WB Data mmoy 4/12/2013 Spig 2013 Lctu #31 7 Gaphical Pipli Rpstatio Fil: lft half is wit, ight half is ad s t d Load Add Sto Sub 4/12/2013 Spig 2013 Lctu #31 8 Pipliig Pfomac (1/3) Us T c ( tim btw compltio of iuctios ) to masu spdup Equality oly achivd if ags a balacd (i.. tak th sam amout of tim) f ot balacd, spdup is ducd Spdup du to icasd thoughput Latcy fo ach iuctio dos ot dcas 7/24/2012 Summ 2012 Lctu #21 9 Pipliig Pfomac (2/3) Assum tim fo ags is 100ps fo gi ad o wit 200ps fo oth ags ftch i ad op Mmoy accss i wit Total tim lw 200ps 100 ps 200ps 200ps 100 ps 800ps sw 200ps 100 ps 200ps 200ps 700ps R-fomat 200ps 100 ps 200ps 100 ps 600ps bq 200ps 100 ps 200ps 500ps What is piplid clock at? Compa piplid datapath with sigl cycl datapath 7/24/2012 Summ 2012 Lctu #21 10 Sigl cycl T c = 800 ps Piplid T c = 200 ps Pipliig Pfomac (3/3) 7/24/2012 Summ 2012 Lctu #21 11 Pipliig Hazads A hazad is a situatio that pvts atig th xt iuctio i th xt clock cycl 1) Stuctual hazad A quid souc is busy (.g. dd i multipl ags) 2) Data hazad Data dpdcy btw iuctios Nd to wait fo pvious iuctio to complt its data ad/wit 3) Cotol hazad Flow of xcutio dpds o pvious iuctio 4/12/2013 Spig 2013 Lctu #

3 Agda Pipliig Pfomac Stuctual Hazads Admiiivia Data Hazads Fowadig Load Dlay Slot Cotol Hazads 1. Stuctual Hazads Coflict fo us of a souc MPS pipli with a sigl mmoy? Load/Sto quis mmoy accss fo data uctio ftch would hav to all fo that cycl Causs a pipli Hc, piplid datapaths qui spaat iuctio/data mmois Spaat L1 ad L1 tak ca of this 4/12/2013 Spig 2013 Lctu # /12/2013 Spig 2013 Lctu #31 14 Stuctual Hazad #1: Sigl Mmoy Stuctual Hazad #2: is (1/2) Load 1 Tyig to ad sam mmoy twic i sam clock cycl Load 1 Ca w ad ad wit to gis simultaously? d 2 d /12/2013 Spig 2013 Lctu # /12/2013 Spig 2013 Lctu #31 16 Stuctual Hazad #2: is (2/2) Two difft solutios hav b usd: 1) Split Fil accss i two: Wit duig 1 half ad Rad duig 2 d half of ach clock cycl Possi bcaus Fil accss is VERY fa (taks lss tha half th tim of ag) 2) Build Fil with idpdt ad ad wit pots Coclusio: Rad ad Wit to gis duig sam clock cycl is okay Agda Pipliig Pfomac Stuctual Hazads Admiiivia Data Hazads Fowadig Load Dlay Slot Cotol Hazads 4/12/2013 Spig 2013 Lctu # /12/2013 Spig 2013 Lctu #

4 Admiiivia Pojct 2: Pfomac ptimizatio Pat 1 du Suday (4/14) Pat 2 lasd by Suday ight, du 4/21 Built i pfomac comptitio fo Pat 2! Nv too aly to at lookig at pa xams! Da has movd his H bcaus of tavlig S Piazza Agda Pipliig Pfomac Stuctual Hazads Admiiivia Data Hazads Fowadig Load Dlay Slot Cotol Hazads 4/12/2013 Spig 2013 Lctu # /12/2013 Spig 2013 Lctu # Data Hazads (1/2) Cosid th followig squc of iuctios: add $t0, $t1, $t2 sub $t4, $t0, $t3 ad $t5, $t0, $t6 o $t7, $t0, $t8 xo $t9, $t0, $t10 2. Data Hazads (2/2) Data flow backwads i tim a hazads F D/RF EX MEM WB add $t0,$t1,$t2 d sub $t4,$t0,$t3 ad $t5,$t0,$t6 o $t7,$t0,$t8 xo $t9,$t0,$t10 4/12/2013 Spig 2013 Lctu # /12/2013 Spig 2013 Lctu #31 22 Data Hazad Solutio: Fowadig Fowad sult as soo as it is availa K that it s ot od i Fil yt Datapath fo Fowadig (1/2) What chags d to b mad h? add $t0,$t1,$t2 sub $t4,$t0,$t3 ad $t5,$t0,$t6 F D/RF EX MEM WB o $t7,$t0,$t8 xo $t9,$t0,$t10 4/12/2013 Spig 2013 Lctu # /12/2013 Spig 2013 Lctu #

5 Datapath fo Fowadig (2/2) Hadld by fowadig uit Data Hazad: Loads (1/4) Rcall: Dataflow backwads i tim a hazads lw $t0,0($t1) F D/RF EX MEM WB sub $t3,$t0,$t2 4/12/2013 Spig 2013 Lctu #31 25 Ca t solv all cass with fowadig Mu all iuctio dpdt o load, th fowad (mo hadwa) 4/12/2013 Spig 2013 Lctu #31 26 Data Hazad: Loads (2/4) Hadwa alls pipli Calld hadwa itlock lw $t0, 0($t1) sub $t3,$t0,$t2 ad $t5,$t0,$t4 F D/RF EX MEM WB How to all o $t7,$t0,$t6 ju pat of pipli? Schmatically, this is what w wat, but i ality alls do hoizotally 4/12/2013 Spig 2013 Lctu #31 27 Data Hazad: Loads (3/4) Stall is quivalt to op lw $t0, 0($t1) op sub $t3,$t0,$t2 ad $t5,$t0,$t4 o $t7,$t0,$t6 4/12/2013 Spig 2013 Lctu #31 28 Data Hazad: Loads (4/4) Slot aft a load is calld a load dlay slot f that iuctio uss th sult of th load, th th hadwa itlock will all it fo o cycl Lttig th hadwa all th iuctio i th dlay slot is quivalt to puttig a op i th slot (xcpt th latt uss mo cod spac) da: Lt th compil put a ulatd iuctio i that slot o all! 4/12/2013 Spig 2013 Lctu #31 29 Cod Schdulig to Avoid Stalls Rod cod to avoid us of load sult i th xt iuctio! MPS cod fo D=A+B; E=A+C; Stall! Stall! # Mthod 1: lw $t1, 0($t0) lw $t2, 4($t0) add $t3, $t1, $t2 sw $t3, 12($t0) lw $t4, 8($t0) add $t5, $t1, $t4 sw $t5, 16($t0) # Mthod 2: lw $t1, 0($t0) lw $t2, 4($t0) lw $t4, 8($t0) add $t3, $t1, $t2 sw $t3, 12($t0) add $t5, $t1, $t4 sw $t5, 16($t0) 13 cycls 11 cycls 4/12/2013 Spig 2013 Lctu #

6 Mo Pipliig Stuctual Hazads Admiiivia Data Hazads Fowadig Load Dlay Slot Cotol Hazads Agda 3. Cotol Hazads Bach (bq, b) dtmis flow of cotol Ftchig xt iuctio dpds o bach outcom Pipli ca t always ftch coct iuctio Still wokig o D ag of bach Simpl Solutio: Stall o vy bach util w hav th w PC valu How log mu w all? 4/12/2013 Spig 2013 Lctu # /12/2013 Spig 2013 Lctu #31 32 Bach Stall Wh is compaiso sult availa? d bq TW s quid p bach! 4/12/2013 Spig 2013 Lctu #31 33 Summay Hazads duc ffctivss of pipliig Caus alls/s Stuctual Hazads Coflict i us of datapath compot Data Hazads Nd to wait fo sult of a pvious iuctio Cotol Hazads Addss of xt iuctio uctai/ukow Mo to com xt lctu! 4/12/2013 Spig 2013 Lctu #31 34 Quio: Fo ach cod squcs blow, choos o of th atmts blow: Cod Squc 1 1: lw $t0,0($t0) add $t1,$t0,$t0 A) B) C) No alls as is No alls with fowadig Mu all 2: add $t1,$t0,$t0 $t2,$t0,5 $t4,$t1,5 3: $t1,$t0,1 $t2,$t0,2 $t3,$t0,2 $t3,$t0,4 $t5,$t1,5 d lw add i i i Mu all 35 7/25/2012 Summ 2012 Lctu #

7 d add Cod Squc 2 fowadig o fowadig No alls with fowadig d Cod Squc 3 No alls as is i i 7/25/2012 Summ 2012 Lctu # /25/2012 Summ 2012 Lctu #

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