CHAPTER 3 SYSTEM RECONFIGURATION FOR UNBALANCED DISTRIBUTION SYSTEM

Transcription

1 52 CHAPTER 3 SYSTEM RECONFIGURATION FOR UNBALANCED DISTRIBUTION SYSTEM 3.1 INTRODUCTION Mostly distribution systems are unbalanced nature due to sglephase, two-phase, unbalanced three-phase loads and unbalanced impedance. With the replacement of three-phase load flow for sgle-phase load flow, the algorithm proposed chapter 2 has been practiced for handlg loss reduction for unbalanced distribution system this chapter. With the troduction of PGSA, search space has been greatly reduced by a detailed description on switch state and decision variables. Furthermore, SaHDE has been corporated to improve the searchg efficacy. 3.2 FORMULATION OF THREE-PHASE LOAD FLOW Load flow is a very important and fundamental tool for analysis of any power system and is used the operational as well as planng stages. Certa applications, particularly distribution automation and optimization of a power system, require repeated load flow solutions. In these applications it is very important to solve the load flow problem as efficiently as possible. The goal was to develop a solution algorithm for solvg load flow large three-phase unbalanced systems which exploits the radial topological

2 53 structure to reduce the number of equations and unknown ones the distribution systems Three-phase Distribution System Modelg For power flow studies, radial distribution system shown Figure 3.1 has been modeled as a system of buses connected by distribution les, switches, or transformers to a voltage specified source bus (Zimmerman and Chiang (1995)). Each bus may also have shunt capacitor and voltage regulator addition to the connected load to it. S a, S,b m I a,m n Two phase Lateral o Distribution le, Switch, or transformer I b,m I b,m S a S b S c V m V n Sgle phase Lateral V o I Cc,n I Cc,n I Cc,n S a Shunt capacitor S c,n S b, S a,n Figure 3.1 Three phase distribution system with components Le model Figure 3.2 shows the le section, m, between buses m and n. The le parameters can be obtaed usg the method developed by Carson s equations. The primitive impedance matrix is obtaed from equation (3.1),

3 54 m I a,m, n Z aa,m V a,m I b,m, Z bb,m Z ab,m Z ac,m V a,n V b,m I c,m Z cc,m Z bc,m Z an,m V b,n V c, I n,m, Z cn,m Z bn,m V c,n Z nn,m Figure 3.2 Three phase Le Section Z Z Z Z Z Z Z Z aa,m ab,m ac,m an,m ab,m bb,m bc,m bn,m Zm Z ac,m Zbc,m Zcc,m Z cn,m Z Z Z Z an,m bn,m cn,m nn,g (3.1) The impedance matrix shown Equation (3.2) can be calculated by applyg the Kron reduction rule for Equation (3.1). For any phase which fails to present, the correspondg row and column this matrix will conta null-entries. Z Z Z Z Z Z Z Z Z Z aa,m ab,m ac,m m ab,m bb,m bc,m ac,m bc,m cc,m (3.2)

4 Shunt Capacitor Model Shunt capacitors are modeled as wye-connected or delta connected constant admittance. The jected current as a function of voltage for the grounded wye-connected case is given Equation (3.3) ICa,n Y Ca,n 0 0 Va,n I Cb,n 0 Y Cb,n 0 Vb,n I 0 0 Y V Cc,n Cc,n c,n (3.3) Load model The load model used is a general model which allows each load to be either wye-connected or delta-connected or else either constant impedance, constant current, or constant complex power. For the wye-connected case the jected currents can be computed as shown Equations (3.4)-(3.6). Injected currents for delta connected loads are computed by takg the differences of the appropriate elements Equations (3.4)-(3.6). This model could easily be generalized to be a lear combation of all of the above types. For any phase which fails to present, the correspondg row and column this matrix will conta null-entries. Constant Z Load I Ln V n / ZLn (3.4) Constant I Load ILn ILn (3.5) Constant PQ Load I S / V * (3.6) Ln Ln n

5 Voltage Regulator Model Voltage regulator is used to control the voltage an amount up to 5 or 10%. The voltage regulator can be modeled as series impedance and a transformer with tap on the secondary wdg. The voltages and currents are given by, I a I (3.7). m R n V a V (3.8). m R n where a R Tap (3.9) Transformer model Three-phase transformer banks are used the distribution substation to transfer the voltage from the transmission or sub-transmission level to the distribution feeder level. Therefore, it is important to model the various three-phase transformer connections. This thesis describes the grounded wye-grounded wye transformer model, as the case studies this thesis utilize this respective model. For grounded wye-grounded-wye type transformer, the voltage and current at the secondary can be calculated usg the Equations (3.10) and (3.11) n V t a,n Va,n Z I ta 0 0 a,n 1 Vb,n 0 0 Vb,n 0 Z tb 0 Ib,n n t V 0 0 Z c,n V c,n tc I c,n nt (3.10)

6 57 Ia,n n I t 0 0 a,m I b,n 0 n t 0 Ib,m I 0 0 n I c,n t c,m (3.11) Calculation of Distribution System Parameters The voltages at the buses of the distribution system have been calculated usg the backward and forward substitution. The iterative procedure starts with backward substitution. The backward substitution is used to calculate the current each branch. The current the last branch is equal to the current jection at the correspondg end node. The voltage values are kept constant. The system is traced the backward direction. The currents all the other branches can be found out by usg KCL as given by the Equation (3.12). Ia,m ILa,n Iap ICa,n I b,m I Lb,n I bp I Cb,n (3.12) p M I I cp c,m I Lc,n I Cc,n where I a,m, I b,m and I c,m are branch current of le section (m) and i ap, i bp i cp are current branch m before updatg and M is the set of le sections connected to m th branch. Once the phase/branch currents are calculated, the fe tung of the voltage at the buses are geared up by forward substitution. The feeder bus voltage is set to its specified value. The current each branch is held constant at the value obtaed the backward substitution. T hus, usg the branch currents for calculation the backward substitution, the values of voltages are calculated by usg the Equation (3.13),

7 58 Va,n Va,m Z aa,m Z ab,m Zac,m Ia,m V b,n V b,mz ab,m Z bb,m Z bc,m * Ia,m V c,n V c,m Z ac,m Z bc,m Z cc,m I a,m (3.13) where m and n are the parent node and child node respectively. These values of the voltages are used for calculatg the currents by backward substitution the next iteration. The forward and backward substitutions are performed each iteration of the load flow. The voltage magnitudes at each bus iteration are compared with their values the previous iteration. If the error is with the tolerance limit, the procedure is stopped. Otherwise, the steps of backward substitution, forward substitution and check for convergence are repeated. 3.3 PGSA-SaHDE ALGORITHM FOR SYSTEM RECONFIGURATION The reconfiguration scheme begs with fdg the solution sets of the radial distribution system described through PGSA. Then, the total number of switches present each set/loop is calculated. With the use of SaHDE, the optimal solution for the reconfiguration is obtaed. The real power loss, branch currents and bus voltages correspondg to respective configuration are calculated usg radial load flow. The reconfiguration procedure based on hybrid PGSA-SaHDE is illustrated the flowchart shown Figure 3.3.

8 59 Start Read Le data and load data Keep all the switches closed and execute three phase RLF and fd itial configuration loss P oloss Apply PGSA and fd the dividual loops (variables and number of switches considered each loop) Set NP, CR_Variance, CR_Mean, F_Mean, F_Variance, itial population matrix (Z), iter=0 Run three phase Radial load flow for chromosomes (Z) and fd losses P z_loss Apply Mutation with F=getGaussian(F_Mean,F_Variance) Apply Crossover with CR=getGaussian(CR_Mean,CR_Variance) Run three phase Radial load flow for new chromosomes (Z plus ) and fd losses P zplus_loss If P z_loss >P zplus_loss Yes No Update CRMemory Fd P nloss =m(p z_loss,p zplus_loss ) Set P oloss =P nloss Apply Acceleration and Migration and calculate CR_Mean = Mean (CRMemory) and check for iteration count Prt the best solution Stop Figure 3.3 Flowchart for reconfiguration of unbalanced system through hybrid PGSA-SaHDE

9 SIMULATION RESULTS The effectiveness of the PGSA-SaHDE algorithm has been validated through two test distribution systems. Also the reconfiguration was carried out by considerg both the systems workg under different loadg conditions of daily load pattern The 25 Node Unbalanced RDS (Test System III) System Description The test system III shown Figure 3.4 is a 4.16kV system. It consists of 25 nodes and three tie les. The total load conditions are kW and 2393kVAR. The characteristic data of test system is given Table 3.1 and all the branches current capacity are assumed (for I S1 =500A, I S2 =300A, from I S3 to I S25 current capacity was set as 200A accordance with system characteristic) and voltage limits are V m =0.9 pu and V max =1.0 pu. The itial condition of the system is identified by the open switches S 25, S 26, S 27, the closed switches S 1 to S 24. The correspondg power loss is kW. Figure 3.4 The 25-bus distribution system with loop numbers (Test System III)

10 Table 3.1 System data of 25-bus RDS (Test System III) Branch No. Sendg end bus Receivg end bus Receivg end bus load Conductor Length kva type (ft) Receivg end bus load BranchSendg Receivg Conductor Length kva No. end bus end bus type (ft.) A B C A B C j35 60+j45 50+j j25 40+j30 45+j j25 45+j32 40+j j30 45+j32 35+j j40 60+j45 50+j j30 35+j25 45+j j30 40+j30 40+j j25 40+j30 45+j j30 40+j30 40+j j30 35+j25 45+j j45 50+j40 50+j j45 50+j35 50+j j35 60+j45 50+j j30 40+j30 40+j j25 45+j32 40+j j45 50+j40 50+j j45 50+j30 50+j j j j35 50+j40 60+j j30 40+j30 40+j j25 40+j30 45+j j32 35+j25 40+j j100 61

11 62 Table 3.2 Impedance for different types of conductors for Test System III Type Impedance ohms/mile j j j j j j j j j j j j j j j j j j j j j j j j j j j Implementation of PGSA-SaHDE algorithm As per the PGSA, decision variables are designed for the Test System III. As per the proposed approach, all the switches of the loops are considered as closed. Test System III with decision variables is shown the Figure 3.4. The possible solution sets are, L S,S,S,S,S L S,S,S,S,S,S L S,S,S,S,S,S,S,S,S,S,S,S,S,S,S (3.14) After describg the switches four states, the chance for the unfeasible solutions the iterative procedure has been elimated. By closg some switches permanently closed, the search space was reduced as follows,

12 L S,S,S,S,S,S,S,S,S,S,S,S,S (3.15) Inclusion of the concept of temporary closed state avoids fdg the unfeasible solutions due to the terrelation of some switches. As a result, the possible solution sets shown Equations (3.14) and (3.15) were reduced. The search space is reduced to, L S,S,S,S,S L S,S,S,S,S,S L S,S,S,S,S,S,S,S (3.16) From the above equation, it is clear that the Test system III has three-control variables (L 1, L 2, and L 5 ) and those variables have ranges from 1 to 5, 6 and 8 respectively. For an stance for control variable L 1, by the control strategy DE/current-to-rand/1 the value generated is 3 then S 11 is the switch assumed as opened the loop 1 and the same process is contued for the rest of the variables. The itial population and their respective losses were calculated and stored. With the itial values of F_Mean=0.5, F_Variance=0.1, CR_Mean=0.5 and CR_Variance=0.1 the new chromosomes were generated and their respective losses were calculated and stored. The CRMemory has been created, which stores only the CR_Mean values of the best new chromosomes. The mean of the CRMemory has been considered as CR_Mean for the next iteration. The best solution and its respective configuration have been stored at the end of each iteration. The same process has been repeated for the fixed number of iterations. The loss has been reduced to kW from its itial configuration loss. The identified switches to be opened are S 15, S 17 and S 22. The fal configuration bus voltages and branch currents are shown Figure 3.5 and Figure 3.6 respectively. The results obtaed through

13 64 proposed methodology have been compared with other technologies proposed earlier for reconfiguration Table 3.3 for Test system III and it is realized that proposed algorithm receives global optimum with mimum time consumption of seconds. Voltage p.u Phase A Phase B Phase C Bus Number Figure 3.5 Fal configuration bus voltages under Actual Load condition through PGSA-SaHDE for Test System III Figure 3.6 Fal configuration branch currents under Actual Load condition through PGSA-SaHDE for Test System III

14 65 Table 3.3 Simulation results of Test System III through Hybrid PGSA- SaHDE Algorithm Item Initial configuration Raju et al (2008) Fal Configuration Vulasala. et al (2009) Subrahmanyam et al (2010) Proposed Method Tie Switches S 25, S 26, S 27 S 15, S 17, S 22 S 15, S 17, S 22 S 15, S 17, S 22 S 15, S 17, S 22 Loss(kW) Loss Reduction (%) Mimum Voltage (p.u) Phase A Phase B Phase C Implementation under daily load pattern The daily load pattern has been applied to Test system III to validate the robustness of the proposed algorithm. The bus voltages under actual, mimum and maximum load levels after reconfiguration have been shown the tables from Table 3.4 to Table 3.6. The load values kva for 24 hours along with mimum bus voltage and real power loss before and after reconfiguration have been shown the Table 3.7. From the tables, it is observed that the real power loss has been reduced significantly by the implementation of the proposed algorithm and matas the mimum value of bus voltage well above the mimum voltage of 0.9 pu.

15 66 Table 3.4 Voltage Magnitude and Phase Angle under Actual load condition through PGSA-SaHDE Algorithm for Test System III Bus No. a pu V a deg. b pu V b degrees c pu V c deg

16 67 Table 3.5 Voltage Magnitude and Phase Angle under Mimum load condition through PGSA-SaHDE Algorithm for Test System III Bus No. a pu V a deg. b pu V b degrees c pu V c deg

17 68 Table 3.6 Voltage Magnitude and Phase Angle under Maximum load condition through PGSA-SaHDE Algorithm for Test System III Bus No. a pu V a deg. b pu V b degrees c pu V c deg

18 69 Table 3.7 Power loss and Mimum Voltage Magnitude before and after applyg the PGSA-SaHDE Algorithm under Daily Load Pattern for Test System III Hours Load kva Power Loss kw Before Reconfiguration After Reconfiguration Voltage Magnitude p.u Before Reconfiguration After Reconfiguration j j j j j j j j j j j j j j j j j j j j j j j j

19 Modified IEEE 125 Node RDS (Test System IV) System Description The Test System IV (IEEE Distribution Planng Workg Group Report (1991)) shown Figure 3.7 is an unbalanced distribution system with base kv of 4.16 kv and base MVA of 100. It consists of 125 nodes and two tie les. The actual total load conditions are 3490kW and 1925kVAR. The characteristic data of test system is given tables from Table 3.8 to Table 3.12 and the current capacity of all the branches are assumed as 500A accordance with system characteristic and voltage limits are V m =0.9pu and V max =1.05 pu. It is characterized by overhead and underground le segments, four step- type voltage regulator, and shunt capacitors and switchg to provide alternate paths of power flow. The itial loadg at the phases a, b and c are A, A and A respectively. It consists of 125 les and 2 loops with 26 and 9 switches respective loops Implementation of PGSA-SaHDE algorithm under actual load condition As per the PGSA, decision variables are designed for the system shown Figure 3.7. After applyg the proposed methodology, the real power loss is reduced from kw to kw. The fal configuration bus voltages are shown Table The identified switches to be opened at the fal configuration are S 73 and S 97. The results obtaed through proposed methodology have been compared with other technologies proposed earlier for reconfiguration Table 3.14 for Test system IV and it is realized that proposed algorithm receives global optimum with mimum time consumption of 14.2 seconds.

20 Sectionalizg switch Voltage Regulator Tie switch Figure 3.7 Modified IEEE 125 bus Power Distribution System (Test System IV)

21 72 Table 3.8 System data of modified IEEE 125 bus Test System Receivg end bus load Receivg end bus load Branch Sendg Receivg Conductor Length Branch kva Sendg Receivg Conductor Length kva No. end bus end bus type (ft) No. end bus end bus type (ft) A B C A B C j j j j j j j j j j j j j j j j j j j j j j j j j j j j

22 73 Table 3.8 (Contued) Receivg end bus load Receivg end bus load Branch Sendg Receivg Conductor Length Branch kva Sendg Receivg Conductor Length kva No. end bus end bus type (ft) No. end bus end bus type (ft) A B C A B C j j j j j j j j j j j25 35+j25 70+j j j j j j j j j j j j j j j j j j80 70+j50 70+j j j j j j

23 74 Table 3.8 (Contued) Receivg end bus load Receivg end bus load Branch Sendg Receivg Conductor Length Branch kva Sendg Receivg Conductor Length kva No. end bus end bus type (ft) No. end bus end bus type (ft) A B C A B C j25 70+j50 35+j j25 35+j25 35+j j j50 70+j50 70+j j j j j j j j j j j j j j j j j j j j j

24 75 Table 3.9 Regulator Data for Test System IV Regulator ID: Le Segment: Location: Phases: A-B-C A A-C A-B-C Connection: 3-Ph, Wye 1-Ph, L-G 2-Ph,L-G 3-Ph, LG Monitorg Phase: A A A & C A-B-C Bandwidth: 2.0 volts 2.0 volts 1 2 PT Ratio: Primary CT Ratg: Compensator: Ph-A Ph-A Ph-A Ph- C Ph-A Ph-B Ph-C R - Settg: X - Settg: Voltage Level: Table 3.10 Configuration data for Test System IV Config. Phasg Phase Conductor Neutral Conductor ACSR ACSR 1 A B C N 336,400 26/7 4/0 6/1 2 C A B N 336,400 26/7 4/0 6/1 3 B C A N 336,400 26/7 4/0 6/1 4 C B A N 336,400 26/7 4/0 6/1 5 B A C N 336,400 26/7 4/0 6/1 6 A C B N 336,400 26/7 4/0 6/1 7 A C N 336,400 26/7 4/0 6/1 8 A B N 336,400 26/7 4/0 6/1 9 A N 1/0 1/0 10 B N 1/0 1/0 11 C N 1/0 1/0

25 76 Table 3.11 Capacitor Data for Test System IV Node Phase A Phase B Phase C kvar kvar kvar Total Table 3.12 Conductor Data for Test System IV Conductor 60 Hz Conductor Geometric Ampacity size Type of resistance at outside Mean at 50 AWG or conductor 50 degrees C diameter Radius degrees C kcmil (ohms/mile) (ches) (ft.) (amps) ACSR # 4/0 ACSR # 1/0 ACSR

26 77 Table 3.13 Bus Voltage Magnitude and Phase Angle under Actual Load Condition through hybrid PGSA-SaHDE Algorithm of Test System IV Bus No. a V a b V b c pu degrees pu degrees pu degrees V c

27 78 Bus No. a V a Table 3.13 (Contued) b V b c pu degrees pu degrees pu degrees V c

28 79 a V a Table 3.13 (Contued) b V b c Bus No. pu degrees pu degrees pu degrees V c

29 80 Table 3.14 Simulation results through hybrid PGSA-SaHDE Algorithm for Test System IV Item Initial configuration GA Fal Configuration SA Proposed method Tie Switches S 2 and S 3 S 73 and S 97 S 73 and S 97 S 73 and S 97 Loss (kw) Loss Reduction (%) MimumPhase A Voltage Phase B (p.u) Phase C Implementation under daily load pattern The effectiveness and robustness of the proposed algorithm has been further validated by handlg the test system with the daily load pattern. The bus voltages under mimum and maximum load levels after reconfiguration have been shown the Table 3.15 and Table 3.16 respectively. The load values kva for 24 hours along with mimum bus voltage and real power loss before and after reconfiguration have been shown the Table It is observed that the real power loss has been reduced significantly by the reconfiguration and matas the bus voltage well above the mimum voltage of 0.9 pu.

30 81 Table 3.15 Bus Voltage Magnitude and Phase Angle under mimum Bus No. Load Condition through hybrid PGSA-SaHDE Algorithm for Test System IV a V a b V b c pu degrees pu degrees pu degrees V c

31 82 Table 3.15 (Contued) Bus a V a b V b c V c No. pu degrees pu degrees pu degrees

32 83 Table 3.15 (Contued) Bus a V a b V b c V c No. pu degrees pu degrees pu degrees

33 84 Table 3.16 Bus Voltage Magnitude and Phase Angle under maximum Load Condition through hybrid PGSA-SaHDE Algorithm for Test System IV a Bus V a b V b c V c No. pu degrees pu degrees pu degrees

34 85 Table 3.16 (Contued) Bus a V a b V b c V c No. pu degrees pu degrees pu degrees

35 86 Table 3.16 (Contued) Bus a V a b V b c V c No. pu degrees pu degrees pu degrees

36 87 Table 3.17 Power loss and Mimum Voltage Magnitude before and after applyg the PGSA-SaHDE Algorithm under Daily Load Pattern for Test System IV Time Load kva Hours Power Loss kw Voltage Magnitude p.u Before After Before After Reconfiguration Reconfiguration Reconfiguration Reconfiguration j j j j j j j j j j j j j j j j j j j j j j j j

37 CONCLUSION With the proposed algorithm for Test system III and Test system IV under Actual Load condition, the power loss reduction of 11.08% and 35.94% has been achieved respectively. Also, the bus voltages and branch currents are mataed with the limits. In addition, by the use of PGSA the chances of unfeasible solution occurrences are removed and with the troduction of SaHDE, the numbers of radial load flow executions are comparatively reduced and the global optimum is obtaed. The proposed algorithm provides reduction search space, crease performance, and the best solution reconfiguration. It also addresses the constrats such as bus voltage limits and branch currents limit. Though the proposed algorithm provides solution for real power loss reduction through reconfiguration, it becomes significant on reduction of phase current deviation of the unbalanced distribution system. A severely unbalanced circuit can result excessive voltage drops on the heavy phase. An unbalanced system can be enhanced to balance the system by phase swappg. Ever sce, the balanced system has smaller peak, load voltage drops and energy losses.