Frequency-Controlled Current-Fed Resonant Converter with No Input Ripple Current

Transcription

1 energes Artcle Frequency-Controlled Current-Fed Resonnt Converter wth No Input Rpple Current Bor-Ren Ln * Gun-Hong Ln Deprtment Electrcl Engneerng, Ntonl Yunln Unversty Scence echnology, Yunln 640, wn; M @yuntech.edu.tw * Correspondence: lnr@yuntech.edu.tw; el.: Receved: 5 Jnury 018; Accepted: 9 Ferury 018; Pulshed: 11 Ferury 018 Astrct: hs pper studes -controlled -fed resonnt crcut. he dopted drect (DC)-to-DC converter contns two oost crcuts resonnt crcut on prmry sde. Frst, two oost crcuts re connected n prllel to cheve voltge step-up reduce nput rpple y usng nterleved pulse-wdth modulton. herefore, sze rtng oost nductors re decresed n proposed converter. Second, oost voltge s connected to resonnt crcut to relze mechnsm zero-voltge swtchng ll ctve swtches zero- swtchng ll dodes. wo oost crcuts resonnt crcut use sme power devces n order to lessen swtch counts. he voltge douler topology s dopted on secondry sde (hgh-voltge sde). herefore, voltge rtng dodes on hgh-voltge sde s clmped t output voltge. he feslty studed crcut s confrmed y expermentl tests wth 1 kw prototype crcut. Keywords: -fed resonnt converter; control; rpple ; oost converter 1. Introducton Due to ncresed glol wrmng clmng temperture ssues, renewle energy sources hve een developed to produce clen energy. A fuel cell s knd renewle energy source tht converts chemcl energy to electrc drect (DC) or lterntng (AC) power. A solr cell s or source renewle energy to convert photovoltc (P) energy to electrc DC or AC power. he outputs fuel cell stcks P pnels re low voltge. For connectng fuel cell stcks P pnels to AC grds or DC grds [1,], voltge oost crcut n solton trnsformer re necessry. he hgh-voltge oost converters cn e voltge source type [3,4] or source type [5 7] crcut topologes. Normlly, nput rpple source converters s much smller thn voltge source converters. However, mn prolems hgh-voltge oost converters opertng under hgh swtchng re serous core losses swtchng losses. Power converters wth st-swtchng turn-on or turn-f chrcterstcs hve een proposed studed to overcome se prolems. Duty cycle control [8 13] control schemes [14 16] re normlly used to regulte lod voltge lso reduce swtchng losses under zero-voltge or zero-. he dvntges duty cycle control wth fxed swtchng re esy mplementton wth commercl ntegrted crcuts mny vlle crcut topologes. However, drwck se topologes s poor crcut effcency t low lod, due to hrd swtchng t low output power. Resonnt converters [14 16] wth modulton hve developed to cheve dvntges low swtchng losses t whole lod rnge hgh effcency under low lod condtons. wo oost converters two full-rdge resonnt converters wth nterleved pulse-wdth modulton (PWM) re dopted n [5] to otn hgh voltge gn less nput rpple for electrc vehcle (E) hyrd electrc vehcle (HE) pplctons. However, more power devces (10 power swtches) re used n ths crcut topology such tht cost s ncresed rellty s reduced. Energes 018, 11, 413; do: /en

2 Energes 018, 11, hs pper proposes studes smple voltge-oost -fed resonnt DC/DC crcut. he studed converter hs two voltge oost crcuts, -controlled full-rdge crcut voltge douler rectfer. he voltge oost crcuts full-rdge crcut use sme ctve devces so tht totl ctve devces re decresed. Interleved PWM s dpted to control two voltge oost crcuts. Due to nterleved PWM operton wth one-hlf cycle phse shft, nput rpple proposed converter s reduced to zero. Snce full-rdge crcut s controlled y modulton, mechnsm zero-voltge swtchng ll ctve swtches zero- swtchng ll dodes cn e relzed t whole lod rnge. herefore, turn-on swtchng losses ctve swtches turn-f swtchng losses or reverse recovery losses dodes re decresed. A voltge douler crcut topology s used on secondry sde (hgh-voltge sde) n order to lmt voltge stress dode t lod voltge. In Secton, crcut dgrm structure studed crcut topology re presented dscussed. he crcut operton s presented n Secton 3. he crcut performnce desgn exmples re provded n Secton 4. Fnlly, feslty developed crcut s verfed y 1 kw prototype crcut n Secton 5, followed y conclusons.. Proposed Converter Fgure 1 gves crcut schemtc studed converter. n s nput voltge, o s output voltge, Q 1 ~Q 4 re ctve swtches, L 1 L re oost nductors, C s oost cpctor, C r L r re resonnt cpctor nductor, s n solton trnsformer, D 1 D re fst recovery dodes, C o re output cpctors. On secondry sde (hgh-voltge sde), voltge douler rectfer s employed to lmt voltge rtng fst recovery dodes for hgh voltge output pplctons. he proposed crcut ncludes two nterleved oost converters ( n, Q 1 ~Q 4, L 1, L C ) full-rdge resonnt converter (C, Q 1 ~Q 4, L r, C r,, D 1, D, C o ) to cheve hgh voltge gn, no nput rpple st swtchng ctve swtches. In Fgure 1, two voltge oost converters re operted y usng nterleved PWM to cheve voltge step-up. Snce duty cycle ech ctve swtches Q 1 ~Q 4 s 0.5, t cn otn = n. Snce gted sgnls two voltge oost converters re phse-shfted y one-hlf swtchng perod, oost nductor rpple s L1 L1 re cncelled ech or so tht nput rpple n = L1 + L = 0. herefore, no rpple ( n = 0) s relzed t nput sde. In Fgure 1c, full-rdge resonnt crcut s operted y control to produce nerly snusodl voltge on resonnt tnk y L r, C r. Due to resonnt tnk full-rdge crcut eng worked t nductve lod, zero-voltge swtchng Q 1 ~Q 4 s relzed t whole lod. Frequency modulton s used to control lod voltge. he studed converter cn e used n ttery chrger/dschrger wth swtches on hgh-voltge termnl n proposed converter low-voltge nput renewle energy source such s solr cell pnel.

3 crcut s operted y control to produce nerly snusodl voltge on resonnt tnk y Lr, Cr Lm. Due to resonnt tnk full-rdge crcut eng worked t nductve lod, zero-voltge swtchng Q1~Q4 s relzed t whole lod. Frequency modulton s used to control lod voltge. he studed converter cn e used n ttery Energes chrger/dschrger 018, 11, 413 wth swtches on hgh-voltge termnl n proposed converter 3 13 low-voltge nput renewle energy source such s solr cell pnel. C Q C Q L 1 L1 L L n Q 1 Q1 C Q D Q C Q1 D Q1 Q4 Q 4 Q 3 Q3 C Q4 D Q4 C Q3 D Q3 C r Lr L r D 1 C R o D C o o I o Q C Q L 1 L1 L n L n Q 1 Q1 C Q D Q C Q1 D Q1 Q4 Q 4 Q 3 Q3 D Q4 C Q3 D Q3 Energes 018, 10, x FOR PEER REIEW 3 1 () Energes 018, 10, x FOR PEER REIEW Q C Q Q4 I o 3 1 C o Q4 Q Lr Q 4 D 1 Q C DC Q Q Q4 D Q4 C r L r I o C o Q4 v Q Cr Lr Q 4 D 1 R o C D Q D Q4 C Q1 C Q3 C r L r Q 1 Q 3 D R C o Q1 D Q1 Q3 D o C Q1 Q3 C Q3 Q 1 Q 3 (c) D C Q1 D Q1 Q3 D o Q3 Fgure 1. Proposed converter crcut dgrm () oost converter operton (c) full-rdge resonnt (c) converter operton. Fgure 1. Proposed converter crcut dgrm () oost converter operton (c) full-rdge resonnt converter operton. Fgure 1. Proposed converter crcut dgrm () oost converter operton (c) full-rdge resonnt converter operton. 3. Crcut Operton 3. Crcut Operton wo oost crcuts wth nterleved PWM schemes re connected n prllel to decrese 3. Crcut Operton wo oost stress crcuts ctve wth devces nterleved to PWM otn schemes no nput re rpple connected. Snce prllel Q1~Q4 toll decrese hve 0.5 duty stress cycles, ctve wo t cn oost devces otn crcuts to oost wth otn nterleved voltge no nput PWM = rpple n. schemes he. full-rdge re Snce connected resonnt Q 1 ~Qn 4 prllel ll crcut hves to 0.5 operted decrese duty cycles, t t nductve lod wth control. herefore, Q1~Q4 cn otn stress oost voltge ctve devces hve zero-voltge swtchng wth low = to n. he otn full-rdge no nput rpple resonnt. crcut Snce Q1~Q4 s operted ll t hve nductve 0.5 duty lod swtchng cycles, loss, cn otn D1 D oost hve voltge zero- = swtchng n. he full-rdge wth no reverse resonnt recovery crcut s operted loss. he t wth control. herefore, Q 1 ~Q 4 hve zero-voltge swtchng wth low swtchng loss, studed nductve converter lod wth s ssumed L1 = control. L = L, herefore, CQ1 = CQ = Q1~Q4 CQ3 = hve CQ4 = zero-voltge CQ, Co1 = Co swtchng o1 = o wth = o/. low D 1 D hve zero- swtchng wth no reverse recovery loss. he studed converter Fgure swtchng gves loss, PWM D1 wveforms D hve zero- studed swtchng crcut t wth swtchng no reverse cycle. recovery Bsed on swtchng loss. he s ssumed L sttes studed D1, converter 1 = L D = L s Q1~Q4, ssumed, C Q1 = C studed Q = C converter Q3 = C Q4 = C cn e Q, C dvded o1 = C nto o sx opertng o1 = o = steps o /. Fgure L1 = L = L, CQ1 = CQ = CQ3 = CQ4 = CQ, Co1 = Co o1 = o n = ech o/. gvesswtchng Fgure PWM gves perod wveforms when PWM wveforms seres studed resonnt crcut studed t crcut swtchng s more t thn swtchng cycle. swtchng Bsed cycle. Bsed on. on swtchng swtchng Fgure sttes 3 D 1, Dgves sttes se Q 1 D1, ~Q sx D 4 equvlent, studed Q1~Q4, crcuts. converter studed Before step cn converter 1, eq1~q4 dvded cn re e f, nto dvded D sx conducts, opertng nto sx L1 opertng > steps 0, L > n0 steps ech n Lr swtchng > ech 0. perodswtchng when perod seres when resonnt seres resonnt s more thns more swtchng thn swtchng.. Fgure 3Fgure gves3 se sx equvlent gves se crcuts. sx equvlent Beforecrcuts. stepv1, Q1,g Before Q, v 1 Q4,g ~Q 4 step re1, f, Q1~Q4 Dv Q,g conducts, re, vf, Q3,g D conducts, L1 > 0, L1 L > 0, 0L > 0 Lr > 0. Lr > 0. v Q,d, v v Q3,d Q1,g, v Q4,g v Q1,d, v v Q4,d Q,g, v Q3,g L1 L L1 v Q,d, v Q3,d Lm Lr v Q1,d, v Q4,d L Q1 Lm Lr Q1 Q Q Q3 Q4 Q4 D Q3 C L 1 L1 C L L L 1 D D1 t 1 t t 3 t 4 t 5 t 0 D1 Fgure. PWM wveforms developed crcut. t t 1 t t 3 t 4 t 5 t 0 Fgure. PWM wveforms developed crcut. I o Fgure. PWM wveforms developed crcut. o C C Q4 Q 4 D Q4 Q4 Q 4 L1 D Q4 n Q 1 L Q1 D Q1 L n Q 1 C r C r Lr L r Lr L r R o D C o R o D C o t o I o

4 Q4 D D1 t t 1 t t 3 t 4 t 5 t 0 Energes 018, 11, Fgure. PWM wveforms developed crcut. Q4 I o o C Q Lr 4 L C 1 L1 D Q4 C r L r L R o L n Q 1 D C Q1 D o Q1 Energes 018, 10, x FOR PEER REIEW 4 1 C Q4 I o o C Lr Q 4 L 1 L1 C r L r L L n Q 1 Q1 () C o R o C Q C L 1 L1 L C Q Q4 C Q4 C r Lr L r D 1 o I o n L Q1 C Q1 Q3 C Q3 C o (c) C Q Q Lr o I o C L L 1 L1 D 1 D Q C r L r n L Q 3 Q3 D Q3 C o (d) C Q I o o C Q Lr L 1 L1 C r L r L n L Q 3 Q3 (e) C o C Q C Q Q4 C Q4 Lr o I o C L 1 L1 L L n Q1 L r C r C C Q1 Q3 D Q3 C o R o (f) Fgure 3. Sx equvlent crcuts n swtchng perod opertng step 1 () opertng step (c) Fgure 3. Sx equvlent crcuts n swtchng perod opertng step 1 () opertng step opertng step (d) opertng step 4 (e) opertng step 5 (f) opertng step 6. (c) opertng step 3 (d) opertng step 4 (e) opertng step 5 (f) opertng step 6. Step 1 [t0~t1]: At tme t0, cpctors CQ1 CQ4 re dschrged to zero voltge. Snce L1 Lr < 0 StepLr 1 + [t L 0 ~t > 0, 1 ]: Atody tmedodes t 0, cpctors DQ1 DQ4 C Q1 re forwrd C Q4 re sed. dschrged At ths tme to zero nstnt, voltge. swtches Snce Q1 L1 Lr Q4 re turned on under zero-voltge swtchng. Snce Q1 Q4 re turned on n ths step, v < 0 = 0 Lr + L > 0, ody dodes D Q1 D Q4 re forwrd sed. At ths tme nstnt, swtches v =. he oost nductor voltges vl1 = n vl = n. Snce > n, L1 Q ncreses lnerly 1 Q 4 re turned on under zero-voltge swtchng. Snce Q 1 Q 4 re turned on n ths step, v = L decreses lnerly. d dt = L L1 n, d L n = (1) dt L For full-rdge resonnt converter, energy s trnsferred from C to secondry sde (hgh-voltge sde) through resonnt tnk wth Lr Cr. Snce D s forwrd sed, prmry wndng voltge vlm = o/, Lm, Lm, decreses lnerly wth no/(lm) Co s chrged

5 Energes 018, 11, v =. he oost nductor voltges v L1 = n v L = n. Snce > n, L1 ncreses lnerly L decreses lnerly. d L1 dt = n, d L L dt = n L (1) For full-rdge resonnt converter, energy s trnsferred from C to secondry sde (hgh-voltge sde) through resonnt tnk wth L r C r. Snce D s forwrd sed, prmry wndng voltge v Lm = o /,, Lm, decreses lnerly wth n o /( ) C o s chrged from secondry trnsformer. In ths step, L r C r re resonnt wth f r = 1/π L r C r. he solutons prmry sde voltge re gven s Lr (t) = [ n o n (t 0 )] Lr /C r sn t t 0 Lr C r + Lr (t 0 ) cos t t 0 Lr C r () (t) = Lr (t 0 ) L r /C r sn t t 0 Lr C r + n o n [ n o n (t 0 )] cos t t 0 Lr C r (3) where n = n p /n s. If seres resonnt f r s more thn swtchng f sw, n secondry sde trnsformer decreses to zero t tme t 1 crcut operton goes to step. Orwse, crcut operton wll go to step 3 under f sw > f r condton. Step [t 1 ~t ]: D decreses to zero t tme t 1 D ecomes reverse sed. In ths step, L1 ncreses lnerly, L decreses lnerly Lr freewheels through Q 1 Q 4. In ths step, L r, C r re resonnt wth ω p = 1/ (L r + )C r. he solutons prmry Lr resonnt cpctor voltge n ths freewheelng stte re gven n (4) (5). Lr (t) = [ n + (t 1 )] (Lr + )/C r sn (t) = n + [ n + (t 1 )] cos t t 1 (Lr + )C r + Lr (t 1 ) cos t t 1 (Lr + )C r (4) t t 1 t t + Lr (t 1 ) (L r + )/C r sn 1 (5) (Lr + )C r (Lr + )C r Step 3 [t ~t 3 ]: Q 1 Q 4 re turned f t tme t under zero voltge. Snce L1 Lr > 0 Lr + L < 0, C Q C Q3 re dschrged lnerly. dv CQ dt = L1 Lr, dv CQ3 C Q dt = Lr + L C Q (6) In ths step, D 1 s forwrd sed prmry wndng voltges v Lm s clmped t n o /. he dschrge tme C Q C Q3 s soon enough so tht L1, L Lr re lmost constnt durng ths step. Step 4 [t 3 ~t 4 ]: he voltges on C Q C Q3 re decresed to zero voltge t tme t 3. Snce L1 Lr > 0 Lr + L < 0, D Q1 D Q4 re forwrd sed. herefore, Q Q 3 cn e turned on fter t 3 zero-voltge swtchng Q Q 3 s cheved. In ths step, v = v = 0 so tht v L1 = n v L = n. herefore, L1 decreses lnerly L ncreses lnerly. d L1 dt = n, d L L dt = n L (7) he energy s trnsferred from C to through L r C r. Snce D 1 s forwrd sed, prmry wndng voltge v Lm = o /, Lm ncreses lnerly s chrged. If seres resonnt f r s more thn swtchng f sw, n dode D1 wll decrese to zero t tme t 4 crcut goes to step 5. On or h, crcut wll go to step 6 under f sw > f r condton.

6 Energes 018, 11, Step 5 [t 4 ~t 5 ]: D1 decreses to zero t t 4 D 1 ecomes reverse sed. Durng step 5, L1 decreses, L ncreses Lr freewheels through Q Q 3. C r, L r re resonnt n step 5. Step 6 [t 5 ~t 0 ]: At tme t 5, Q Q 3 turn f under zero voltge. Snce L1 Lr < 0 Lr + L > 0, C Q1 C Q4 re dschrged lnerly. dv CQ1 dt = L1 Lr, dv CQ4 C Q dt = Lr + L C Q (8) Rectfer dode D s forwrd sed v Lm = n o /. Snce dschrge tme C Q1 C Q4 n step 6 s very soon, L1, L Lr re lmost constnt n ths tme ntervl. 4. Crcut Chrcterstcs 4.1. Boost Converter wo nterleved voltge oost crcuts re worked n contnuous conducton mode under followng ssumptons: (1) power devces re del; () nductors cpctors re lner tme-nvrnt. Snce verge vlue voltges cross L 1 L s zero, t s possle to clculte followng equton sed on flux lnce on oost nductors. = n /(1 D) (9) where D s duty rto Q 1 Q 4. Snce D s fxed t 0.5 n studed crcut, t cn e clculted s = n DC voltge trnsfer functon oost converter s gven s M. oost = o / n =. he PWM wveforms Q 1 Q 3 re phse shfted y sw /. he rpple s, L1 L1, on two oost nductors L 1 L re cncelled ech or whch gves n = L1 + L = 0. hus, re s no rpple ( n = 0) from nput voltge. he voltge rtngs Q 1 ~Q 4 re equl to (= n ). he verge nductor s I L1 I L equl to P o /( n ). 4.. Full-Brdge Resonnt Converter he full-rdge resonnt crcut ncludes two swtchng legs to drw two pulses per swtchng cycle from nput voltge termnl to delver more output power thn hlf-rdge resonnt crcut. o otn dvntges good lght lod effcency seres resonnt crcut lty to control lod voltge t lght or open lod prllel resonnt crcut, full-rdge LLC resonnt crcut s employed n studed crcut topology. Fundmentl hrmonc nlyss from Stegerwld s rtcle [17] s used to otn AC gn chrcterstcs. Due to PWM wveforms Q 1 ~Q 4, voltge v s squre wveform wth two voltge levels, (= n ) (= n ). hus, fundmentl voltge v,f s expressed s v, f = (8 n /π) sn(π f sw t) (10) Due on-f sttes D 1 D, trnsformer prmry voltge v Lm s squre wveform fundmentl mgnetzng voltge s gven s v Lm, f = n o π sn(π f swt θ) (11) he fundmentl secondry trnsformer s derved s s, = πi o sn(π f sw t θ) (1) Bsed on (11) (1), R c s otned from secondry lod R o reflected nto prmry sde.

7 Energes 018, 11, R c = v Lm, f s, /n = n π R o (13) Fgure 4 gves AC equvlent crcut dopted resonnt crcut. v,f s n effectvely snusodl nput voltge R c s n effectve lod. herefore, gn chrcterstcs studed resonnt crcut under dfferent swtchng frequences s clculted s G c ( f sw ) = jω sw L r R c jω sw R c +jω sw j ω sw C r + R = c jω sw R c +jω sw K(1 1 F ) + jq(f 1 F ) (14) where f sw s swtchng, f r = 1/π L r C r, F = f sw / f r, K = L r / Q = L r /C r /R c. Energes 018, 10, x FOR PEER REIEW 7 1 he mpltude AC gn from (14) cn e furr expressed s 1 G c ( fg sw c) ( f= sw) = (15) 1 [1 K(1 1F )] + Q 1 [1 + K )] (F 1F + Q ( F ) F F ) (15) C r L r Lr v,f R c Fgure 4. AC equvlent crcut full-rdge resonnt crcut. Fgure 4. AC equvlent crcut full-rdge resonnt crcut Desgn Procedure Developed Converter 4.3. Desgn Procedure Developed Converter A 1000 W prototype s set up to nvestgte mn crcut prmeter desgn consdertons. Ahe 1000 electrcl W prototype specfctons s set up to developed nvestgte converter mn re nput crcut voltge prmeter n = 44~5 desgn, output consdertons. voltge he electrcl o = 400, specfctons output power Po = 1000 developed W, converter seres resonnt re nput voltgefr = n 100 = 44~5 khz. Frst,, output oost voltge o = 400 converter, output wth power nterleved P o = PWM 1000 W, s used to oost seres nput resonnt voltge reduce f r nput = 100rpple khz.. Frst, he oost duty cycle Q1~Q4 s fxed t 0.5 wth modulton. he rpple s ΔL1 ΔL converter wth nterleved PWM s used to oost nput voltge reduce nput rpple. re he duty cycle clculted Q s 1 ~Q 4 s fxed t 0.5 wth modulton. he rpple s L1 L re clculted s nsw Δ Lo1 = ΔLo = (16) L Lo1 = Lo = n sw (16) L Snce gte sgnls Q1 Q3 re phse shfted y sw/ ech duty cycle swtches s Snce equl to 0.5, gte t s sgnls ovous tht Q 1 Q 3 re rpple phse on shfted nput y sde sw s / decresed ech sgnfcntly duty cycle swtches equls s equlzero. to 0.5, he t s dopted ovous oost thtnductors L1 rpple on L re 37 µh. nput ht sde mens s decresed tht rpple sgnfcntly s on equls L1 zero. hel dopted t mxmum oostnput nductors voltge L 1 seres L resonnt re 37 µh. ht mens re tht rpple s on L 1 L t mxmum nput voltge seres resonnt re Δ 1 = Δ = n sw Lo Lo = 7 A L (17) In order to mke sure Lo1 = output Lo = n sw voltge cn = e regulted t ll 7 A nput voltge rnges, (17) L mnmum DC voltge gn Gdc,mn under C,mx nput s desgned s unty. hus, turn-rto s In otned order ton mke (18). sure output voltge cn e regulted t ll nput voltge rnges, mnmum DC voltge gn G dc,mn under C,mx nput Gdc,,mns desgned C,mx 1 5s unty. hus, turn-rto s otned n n = = = 0.5 (18). (18) o / 400 / n = G dc,mn C,mx = 1 5 = 0.5 (18) rnsformer s mplemented y o ferrte / core DK 400/ PC40 EER-4 wth np = 13 ns = 5. hen, oretcl mxmum DC voltge gn under mnmum nput voltge s gven s rnsformer s mplemented y ferrte core DK PC40 EER-4 wth n p = 13 n s = 5. hen, oretcl mxmum DC voltge no G gn dc, mx = under mnmum = nput = 1.18voltge s gven s C, mn 44 (19) Bsed on (13), Rc under Gfull dc,mx lod = condtons n o = cn e clculted = s 1.18 (19) C,mn 44 n Rc = = Ω Ro π he nductor rto K = Lr/Lm wll ffect crcultng loss on prmry sde resonnt converter. he lower nductor rto K cn reduce crcultng loss due to lrger Lm. However, AC gn resonnt converter s reduced. he hgher nductor rto K cn otn (0)

8 Energes 018, 11, Bsed on (13), R c under full lod condtons cn e clculted s R c = n π R o = Ω (0) 1000 he nductor rto K = L r / wll ffect crcultng loss on prmry sde resonnt converter. he lower nductor rto K cn reduce crcultng loss due to lrger. However, AC gn resonnt converter s reduced. he hgher nductor rto K cn otn lrger AC voltge gn. However, crcultng loss s ncresed to reduce crcut effcency. herefore, selecton K s compromse etween AC voltge gn crcultng loss. Normlly, K s selected etween Consderng se fctors, nductor rto qulty fctor re desgned s K = L r / = 1/6 Q = 0.3. herefore, L r C r re clculted s 1 C r = 4π L r fr L r = QR c π f r = µh (1) π 100,000 1 = 606 nf () 4π (100,000) Consderng prctcl vlue C r, 600 nf flm cpctor s used for C r. In smlr wy, resonnt nductor L r s ctully selected s 4. µh. Snce nductor rto K = L r / = 1/6 s dopted, mgnetzng nductnce s clculted s = L r /k = 4. µh 1/6 5.3 µh (3) he voltge stress verge fst recovery dodes D 1 D re clculted n (4) (5). v D1,stress = v D1,stress o = 400 (4) D1,v = D,v = I o =.5 A (5) Dodes OM56SW wth 1000 voltge rtng 1 A verge rtng re dopted for D 1 D. he voltge rtng Q 1 ~Q 4 re 5 = 104. he MOSFEs IRFB5N15D wth 150 voltge rtng 60 A rtng re dopted for Q 1 ~Q 4. he 1100 µf cpctor s used for C 360 µf cpctors re used for C o. 5. Expermentl Results he developed converter s mplemented y 1 kw prototype to demonstrte crcut performnce verfy feslty effectveness studed crcut. Fgure 5 gves expermentl crcut dgrm developed crcut. he photocoupler PC817 voltge regultor L431 re dopted to control lod voltge. he resonnt mode control ntegrted crcut UCC5600 s used to relze modulton cheve zero-voltge swtchng. he crcut prmeters ctve pssve components developed crcut re dscussed otned from prevous secton. From expermentl n Fgures 6 1, test expermentl gree wth PWM wveforms n Fgure. he expermentl gte voltges Q 1 ~Q 4 t rted power re llustrted n Fgure 6. It cn e oserved tht Q 1 (Q ) Q 3 (Q 4 ) hve complementry PWM wveforms. he swtchng Q 1 t 44 nput s less thn swtchng t 5 nput so tht resonnt crcut cn otn lrger voltge gn to regulte lod voltge. he expermentl wveforms nput oost nductor s t rted power re gven n Fgure 7. It cn e oserved tht L1 L re nterleved wth ech or lnced well. he PWM wveforms two oost crcuts re nterleved y phse shft sw / so tht nput rpple n s reduced lmost to zero.

9 t rted power re llustrted n Fgure 6. It cn e oserved tht Q1 (Q) Q3 (Q4) hve complementry PWM wveforms. he swtchng Q1 t 44 nput s less thn swtchng t 5 nput so tht resonnt crcut cn otn lrger voltge gn to regulte lod voltge. he expermentl wveforms nput oost nductor s t rted power re gven n Fgure 7. It cn e oserved tht L1 L re nterleved wth ech or well. he PWM wveforms two oost crcuts re nterleved y phse shft 9 13 Energes 018, 11, lnced 413 sw/ so tht nput rpple Δn s reduced lmost to zero. C C Q Q L1 L1 L L n CQ Q4 CQ4 Q4 DQ DQ4 CQ3 CQ1 vcr Cr Lr Lr o Io D1 Co1 Ro Lm Q3 Q1 DQ1 Q3 DQ3 Q1~Q4 D Co Isolted Gte Drves ref x o PC817 PWM Genertor (UCC5600) L431 Fgure 5. he prototype crcut dgrm studed crcut. Fgure 5. he prototype crcut dgrm studed crcut. Energes 018, 10, x FOR PEER REIEW Energes 018, 10, x FOR PEER REIEW vq,g vq,g vq,g vq,g vq3,g vq3,g vq3,g vq3,g vq4,g vq4,g vq4,g vq4,g () () Fgure 6. Expermentl gtng sgnls Q1~Q4 under rted power n = 44 Fgure 6. Expermentl gtng sgnls Q1 ~Q4 under rted power n = 44 Fgure Expermentl gtng sgnls Q1~Q4 under rted power n = 44 [~vq4,g: 10 /dv; tme: 4 µs/dv]. () n =6.5 () () [v [ ~v~vq4,g : 10 /dv; tme: 4 µs/dv]. n =5 n = 5 Q1,g Q4,g: 10 /dv; tme: 4 µs/dv]. n n L1 L1 L1 L L1 L n n L L () () Fgure 7. Expermentl nput oost s under rted power n Fgure 7. Expermentl nput oost s under rted power n = 44 () n = 5 [n, L1, L: 5 A/dv; 4 µs/dv]. Fgure 7. Expermentl nputtme: oost s under rted power = 44 () n = 5 [n, L1, L: 5 A/dv; tme: 4 µs/dv]. n = 44 () n = 5 [n, L1, L : 5 A/dv; tme: 4 µs/dv]. he test oost voltge, oost C swtch s Q Q4 under test re oost voltge cler, oost C swtch Q4 under twce Q Q rtedhe power shown n Fgure 8. It s tht C ss s twce rted power re shown n Fgure 8. It tht he test voltge s oost C swtch s Q under Q4. Fgure 9 gves oost test prmry voltge C full-rdge resonnt crcut under Q4Q, cler Q4. Fgure 9 gves voltge full-rdge resonnt crcut under rtedre power. It cn e seen8.tht hgher swtchng nput result n rted power shown ntest Fgure It prmry s cler tht Cts5twce wll low Q rted power. cn e seen tht hgher swtchng 5 nputresonnt wll result n lowunder crcultng compred to tprmry 44 nput. Q4. Fgure 9 gves It test voltge t full-rdge crcut crcultng compred to t 44 nput. rted power. It cn e seen tht hgher swtchng t 5 nput wll result n low crcultng compred to t 44 nput. Q Q Q4 Q4 C C Q Q Q4 Q4 C C

10 Fgure 7. Expermentl nput oost s under rted power n = 44 () n = 5 [n, L1, L: 5 A/dv; tme: 4 µs/dv]. he test oost voltge, oost C swtch s Q Q4 under rted power re shown n Fgure 8. It s cler tht C s twce Q Q4. Fgure 9 gves test prmry voltge full-rdge resonnt crcut under Energes 018, 11,rted 413 power. It cn e seen tht hgher swtchng t 5 nput wll result n low crcultng compred to t 44 nput. Q Q Energes 018, 10, x FOR PEER REIEW 10 1 Q4 v C Q4 v C () Lr Fgure 8. Mesured wveforms, C, Q Q4 under rted power n = 44 () n = Fgure 8. 5 Mesured wveforms A/dv;, C, Q Q4 under rtedvcr power n = 44 Q, Q4, C: 0 tme: 4 µs/dv]. [: 50 /dv; () n = 5 [ : 50 /dv; Q, Q4, C : 0 A/dv; tme: 4 µs/dv]. vcr Energes 018, 10, x FOR PEER REIEW Lr v () 10 1 v Fgure 9. Mesured wveforms v, Lr vcr under rted power 44 nput voltge () 5 nput voltge [v, vcr: 100 /dv; Lr: 0 A/dv; tme: µs/dv]. Lr Fgure 10 llustrtes test L1, L, ~Q4 Lr under rted power. he pek vcr s lrger thn pek Q due to = L1 Lr Lr < 0 when Q1 s conductng. he test expermentl Lr s under vcr output cpctor voltges rectfer dode rted power re shown n Fgure 11. o1 o re lnced well D1 D re turned f under zero- swtchng. Fgure 1 llustrtes test swtch Q1 t 0%, 50% 100% lods. It cn e oserved tht Snce Q~Q4 hve zero-voltge swtchng swtch Q1 s relzed. () sme operton chrcterstcs Q1, t cn e expected tht zero-voltge swtchng swtches Fgure 9. Mesured wveforms v, Lr vcr under rted power 44 nput voltge () ~Q4 re lso cheved. he mesured effcences developed converter re 90.5% (t 0% lod), FgureQ9. Mesured wveforms /dv; v, Lr : vcr under rted power 44 nput voltge, vcr: A/dv; µs/dv].he mesured swtchng frequences 5 nput voltge [v94.5% 9.6% (t 50% lod) (t 100%Lrlod) undertme: 5 nput. () 5 nput voltge [v, vcr : 100 /dv; Lr : 0 A/dv; tme: µs/dv]. re 131 khz (t 0% lod), 118 khz (t 50% lod) 99 khz (t 100% lod) under 5 nput. Fgure 10 llustrtes test L1, L, ~Q4 Lr under rted power. he pek s lrger thn pek Q due to = L1 Lr Lr < 0 when Q1 s conductng. L dode s under he test expermentl L1 output cpctor voltges rectfer rted power re shown n Fgure 11. o1 o re lnced well D1 D re turned f Fgure 1 llustrtes test swtch QQ3 under zero- swtchng. 1 t 0%, 50% 100% lods. It cn e oserved tht zero-voltge swtchng swtch Q1 s relzed. Snce Q~Q4 hve Q Q4 sme operton chrcterstcs Q1, t cn e expected tht zero-voltge swtchng swtches Q~Q4 re lso cheved. he mesured effcences developed converter re 90.5% (t 0% lod), Lrswtchng frequences 9.6% (t 50% lod) 94.5% (t 100%Lrlod) under 5 nput. he mesured re 131 khz (t 0% lod), 118 khz (t 50% lod) 99 khz (t 100% lod) under 5 nput. () L L1 L1 L Q3 Q Q4 Q Lr Q3 Q4 Lr Lr Lr () (c) L1 (d) L Fgure 10. est swtch nductor on prmry sde under rted Q3 44 Fgure 10. power est swtch nductor on prmry sde under rted L1,, Q Lr t Q1 nput cse () L, Q3, Q4 Lr t 44 nput cse (c) L1,, Q power LrL1,, t 44 nput cse (),, t 44 nput (c) L1,, t 5Q1 nput L: 10 Lr A/dv; ~Q4, Lr: 0cse A/dv; Q cse (d) Lr L, Q3, Q4 Q3 [L1 Q4 L cse,q4 Q Lr t 5 nput tme: µs/dv]. Q Lr t 5 nput cse (d) L, Q3, Q4 Lr t 5 nput cse [L1, L : 10 A/dv; ~Q4, Lr : 0 A/dv; tme: µs/dv]. Lr Lr (c) (d) Fgure 10. est swtch nductor on prmry sde under rted power L1,, Q Lr t 44 nput cse () L, Q3, Q4 Lr t 44 nput cse (c) L1,, Q Lr t 5 nput cse (d) L, Q3, Q4 Lr t 5 nput cse [L1, L: 10 A/dv; ~Q4, Lr: 0 A/dv; tme: µs/dv].

11 Energes 018, 11, Energes 018, 10, x FOR PEER REIEW Energes 018, 10, x FOR PEER REIEW o1 o1 D1 D1 o1 o1 D1 D1 o o D D o o D D () () Fgure 11. est o1, o, D1 D under rted power 44 nput cse () n = 5 Fgure 11. est o1, o, D1 D under rted power 44 nput cse Fgure est o1, o,d1 D1, D under 4rted power 44 nput cse () n = 5 nput11. cse [o1, o: 100 /dv; D: 5A/dv; tme: µs/dv]. () n = 5 cse nput [o1/dv;, o :D1 100 D1tme:, D4: µs/dv]. 5 A/dv; tme: 4 µs/dv]. nput [o1,cse o: 100, D/dv; : 5 A/dv; (c) (c) (e) (e) () () (d) (d) (f) (f) Fgure 1. Mesured swtch Q1 under n = 44 0% lod () n = 44 50% lod Fgure 1. Mesured swtch Q1 under n = 44 0% lod () n = 44 50% lod 44 full lod (d) n = 5 0% lod (e) n = 5 50% lod (f) n = 5 full (c)1. n =Mesured Fgure swtch Q1 under n = 44 0% lod () n = 44 50% 44: 10 fullvlod (d)/dv; n = 5 0%for lod (e) n = 5 50%for lod (f)tme: n = 5µs/dv]. full (c) n[v=q1,g /dv; Q1,d: 50 : 0 A/dv (,,d,e) 50 A/dv (c,f); lod lod (c) n = 44 full lod (d) n = 5 0% lod (e) n = 5 50% lod (f) n = 5 lod [: 10 /dv; : 50 /dv; : 0 A/dv for (,,d,e) 50 A/dv for (c,f); tme: µs/dv]. full lod [ : 10 /dv; : 50 /dv; : 0 A/dv for (,,d,e) 50 A/dv for (c,f); tme: 6. Conclusons 6.µs/dv]. Conclusons A novel -controlled -fed resonnt crcut wth no nput rpple s A novel -controlled -fedexmnton resonnt crcut wth no nputdemonstrte rpple proposed verfed n ths pper. heoretcl test verfcton tht s Fgure 10 llustrtes testpper. L1, L, ~Q4 Lr under rted power.tht he pek proposed verfed n ths heoretcl exmnton test verfcton demonstrte hgh-performnce resonnt crcut wth low swtchng losses nput rpple-free s cheved developed s lrger thn topology. pek Q due to =ctve L1 Lrrpple-free Lr low-voltge <s0cheved when Q1 s hgh-performnce resonnt crcut wth low swtchng losses nput wth crcut he zero-voltge swtchng devces on conductng. he test expermentl output cpctor voltges rectfer wth developed crcut topology. he zero-voltge swtchng ctve devces on low-voltge sde zero- swtchng rectfer dodes on hgh-voltge sde re lso relzed t dode sde under zero- rectfer on11. hgh-voltge sdelnced reprovde lso relzed t s rted power reshown Fgure o re well D1 whole lod rnge. heswtchng test wth n1dodes kw lortory clerly clmed o1prototype whole lod rnge. he test wth 1 kw lortory prototype clerly provde clmed chrcterstcs. he constructed converter cn e ppled n renewle energy converson systemq1 t D re turned f under zero- swtchng. Fgure 1 llustrtes test swtch chrcterstcs. he constructed converter cn e ppled n ) renewle converson nput (48 ) hgh-voltge output (400 wth no energy nput 0%, wth 50% low-voltge 100% lods. It cn e oserved tht zero-voltge swtchng swtchrpple. Q1 system s he relzed. wth low-voltge nput (48 ) hgh-voltge output (400 )wth wthswtches no nputon rpple. he studed converter cn e used n ttery chrger/dschrger hgh-voltge Snce Q ~Q4 hve sme operton chrcterstcs Q1, t cn e expected tht zero-voltge studed converter cn e used n ttery chrger/dschrger swtches on hgh-voltge termnl n proposed If nput voltge s fromwth P solr cell pnel, slghtly swtchng swtches Q ~Q4 converter. re lso cheved. he mesured effcences developed converter termnl n proposed converter. If nput voltge s from P solr cell pnel, slghtly re 90.5% (t 0% lod), 9.6% (t 50% lod) 94.5% (t 100% lod) under 5 nput. he mesured swtchng frequences re 131 khz (t 0% lod), 118 khz (t 50% lod) 99 khz (t 100% lod) under 5 nput.

12 Energes 018, 11, Conclusons A novel -controlled -fed resonnt crcut wth no nput rpple s proposed verfed n ths pper. heoretcl exmnton test verfcton demonstrte tht hgh-performnce resonnt crcut wth low swtchng losses nput rpple-free s cheved wth developed crcut topology. he zero-voltge swtchng ctve devces on low-voltge sde zero- swtchng rectfer dodes on hgh-voltge sde re lso relzed t whole lod rnge. he test wth 1 kw lortory prototype clerly provde clmed chrcterstcs. he constructed converter cn e ppled n renewle energy converson system wth low-voltge nput (48 ) hgh-voltge output (400 ) wth no nput rpple. he studed converter cn e used n ttery chrger/dschrger wth swtches on hgh-voltge termnl n proposed converter. If nput voltge s from P solr cell pnel, slghtly wder nput voltge vrton s expected. hen, wder swtchng rnge mxmum power pont trckng must e mplemented to regulte lod voltge. Acknowledgments: hs reserch s supported y Mnstry Scence echnology, wn, under contrct MOS E MY. he uthors would lso lke to thnk nonymous revewers for r vlule comments suggestons to mprove qulty pper. Author Contrutons: Bor-Ren Ln desgned mn prts project ws lso responsle for wrtng pper. Gun-Hong Ln ult prototype crcut mesured expermentl wveforms. Conflcts Interest: he uthor declres no potentl conflct nterest. References 1. Wng, J.; Peng, F.Z.; Anderson, J.; Joseph, A.; Buffenrger, R. Low cost fuel cell converter system for resdentl power generton. IEEE rns. Power Electron. 004, 19, [CrossRef]. Nym, M.; Andersen, M.A.E. Hgh-effcency solted oost dc dc converter for hgh-power low-voltge fuel-cell pplctons. IEEE rns. Ind. Electron. 010, 57, [CrossRef] 3. Zhng, Z.; homsen, O.C.; Andersen, M.A.E. St-swtched dul-nput DC DC converter comnng oost-hlf-rdge cell voltge-fed full-rdge cell. IEEE rns. Power Electron. 013, 8, [CrossRef] 4. Yun, Y.; Wu, Q. One zero-voltge-swtchng three-trnsstor push pull converter. IE Power Electron. 013, 6, [CrossRef] 5. Moon, D.; Prk, J.; Cho, S. New nterleved -fed resonnt converter wth sgnfcntly reduced hgh sde output flter for E HE pplctons. IEEE rns. Power Electron. 015, 30, [CrossRef] 6. Prsnn, U.R.; Rthore, A.K. Extended rnge ZS ctve-clmped -fed full-rdge solted dc/dc converter for fuel cell pplctons: Anlyss, desgn expermentl. IEEE rns. Ind. Electron. 013, 60, Km, H.; Yoon, C.; Cho, S. An mproved -fed ZS solted oost converter for fuel cell pplcton. IEEE rns. Power Electron. 001, 5, [CrossRef] 8. Korotkov, S.; Meleshn,.; Nemchnov, A.; Frdln, S. Smll-sgnl modelng st-swtched symmetrcl hlf-rdge DC/DC converter. In Proceedngs IEEE-APEC Conference on Appled Power Electroncs Conference Exposton, Dlls, X, USA, 5 9 Mrch 1995; olume, pp schrhrt, D.J.; Jn, P.K. Desgn procedure for hgh- operton modfed seres-resonnt APWM converter to reduce sze crcultng. IEEE rns. Power Electron. 01, 7, [CrossRef] 10. Km, B.C.; Prk, K.B.; Moon, G.W. Asymmetrc PWM control scheme durng hold-up tme for LLC resonnt converter. IEEE rns. Ind. Electron. 01, 59, [CrossRef] 11. Mshm,.; Akmtsu, K.; Nkok, M. A hgh -lnk secondry-sde phse-shfted full-rdge st-swtchng PWM DC-DC converter wth ZCS ctve rectfer for E ttery chrged. IEEE rns. Power Electron. 013, 8, [CrossRef]

13 Energes 018, 11, Ln, B.R.; Shu,.Y. Zero-voltge swtchng full-rdge DC/DC converter wth prllel-connected output wthout output nductor. IE Power Electron. 013, 6, [CrossRef] 13. Sfee, A.; Jn, P.; Bkhsh, A. A ZS pulsewdth modulton full-rdge converter wth low RMS resonnt uxlry crcut. IEEE rns. Power Electron. 016, 31, [CrossRef] 14. Hg, H.; Kurokw, F. A novel modulton method full rdge three-level LLC resonnt converter for ttery chrger electrcl vehcles. In Proceedngs IEEE Energy Converson Congress Exposton (ECCE), Montrel, QC, Cnd, 0 4 Septemer 015; pp Johnson, S.; Erckson, R. Stedy-stte nlyss desgn prllel resonnt converter. IEEE rns. Power Electron. 1988, 3, [CrossRef] 16. Gu, Y.; Lu, Z.; Hng, L.; Qn, Z.; Hung, G. hree-level LLC seres resonnt DC/DC converter. IEEE rns. Power Electron. 005, 0, [CrossRef] 17. Stegerwld, R.L. A comprson hlf-rdge resonnt converter topologes. IEEE rns. Power Electron. 1988, 3, [CrossRef] 018 y uthors. Lcensee MDPI, Bsel, Swtzerl. hs rtcle s n open ccess rtcle dstruted under terms condtons Cretve Commons Attruton (CC BY) lcense (